| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2017-06-28 | [AArch64] Add dot product support for AArch64 to binutils | Tamar Christina | 1 | -0/+2 |
| 2017-02-24 | [AArch64] Additional SVE instructions | Richard Sandiford | 1 | -0/+6 |
| 2017-02-24 | [AArch64] Add a "compnum" feature | Richard Sandiford | 1 | -1/+3 |
| 2017-01-04 | [AArch64] Add separate feature flag for weaker release consistent load insns | Szabolcs Nagy | 1 | -1/+3 |
| 2017-01-02 | Update year range in copyright notice of all files. | Alan Modra | 1 | -1/+1 |
| 2016-12-13 | [Binutils][AARCH64]Remove Cn register for coprocessor CRn, CRm field | Renlin Li | 1 | -3/+3 |
| 2016-11-18 | [AArch64] Add ARMv8.3 FCMLA and FCADD instructions | Szabolcs Nagy | 1 | -0/+5 |
| 2016-11-18 | [AArch64] Add ARMv8.3 combined pointer authentication load instructions | Szabolcs Nagy | 1 | -0/+2 |
| 2016-11-11 | [AArch64] Add ARMv8.3 PACGA instruction | Szabolcs Nagy | 1 | -0/+1 |
| 2016-11-11 | [AArch64] Add ARMv8.3 command line option and feature flag | Szabolcs Nagy | 1 | -14/+7 |
| 2016-09-21 | [AArch64] Add SVE condition codes | Richard Sandiford | 1 | -1/+1 |
| 2016-09-21 | [AArch64][SVE 31/32] Add SVE instructions | Richard Sandiford | 1 | -0/+13 |
| 2016-09-21 | [AArch64][SVE 30/32] Add SVE instruction classes | Richard Sandiford | 1 | -0/+12 |
| 2016-09-21 | [AArch64][SVE 29/32] Add new SVE core & FP register operands | Richard Sandiford | 1 | -0/+6 |
| 2016-09-21 | [AArch64][SVE 28/32] Add SVE FP immediate operands | Richard Sandiford | 1 | -0/+4 |
| 2016-09-21 | [AArch64][SVE 27/32] Add SVE integer immediate operands | Richard Sandiford | 1 | -0/+21 |
| 2016-09-21 | [AArch64][SVE 26/32] Add SVE MUL VL addressing modes | Richard Sandiford | 1 | -0/+7 |
| 2016-09-21 | [AArch64][SVE 25/32] Add support for SVE addressing modes | Richard Sandiford | 1 | -0/+39 |
| 2016-09-21 | [AArch64][SVE 24/32] Add AARCH64_OPND_SVE_PATTERN_SCALED | Richard Sandiford | 1 | -1/+3 |
| 2016-09-21 | [AArch64][SVE 23/32] Add SVE pattern and prfop operands | Richard Sandiford | 1 | -0/+5 |
| 2016-09-21 | [AArch64][SVE 22/32] Add qualifiers for merging and zeroing predication | Richard Sandiford | 1 | -0/+3 |
| 2016-09-21 | [AArch64][SVE 21/32] Add Zn and Pn registers | Richard Sandiford | 1 | -0/+21 |
| 2016-09-21 | [AArch64][SVE 20/32] Add support for tied operands | Richard Sandiford | 1 | -0/+9 |
| 2016-09-21 | [AArch64][SVE 13/32] Add an F_STRICT flag | Richard Sandiford | 1 | -1/+3 |
| 2016-07-01 | [AArch64] Fix +nofp16 handling | Szabolcs Nagy | 1 | -4/+7 |
| 2016-06-28 | [AArch64] Make register indices be full 64-bit values | Richard Sandiford | 1 | -3/+3 |
| 2016-04-28 | Add support to AArch64 disassembler for verifying instructions. Add verifier... | Nick Clifton | 1 | -0/+3 |
| 2016-01-01 | Copyright update for binutils | Alan Modra | 1 | -1/+1 |
| 2015-12-14 | [AArch64][PATCH 11/14] Add support for the 2H vector type. | Matthew Wahab | 1 | -0/+1 |
| 2015-12-11 | [AArch64][Patch 5/5] Add instruction PSB CSYNC | Matthew Wahab | 1 | -0/+1 |
| 2015-12-11 | [AArch64][Patch 4/5] Support HINT aliases taking operands. | Matthew Wahab | 1 | -0/+2 |
| 2015-12-11 | [AArch64][Patch 1/5] Support the ARMv8.2 Statistical Profiling Extension. | Matthew Wahab | 1 | -0/+1 |
| 2015-12-10 | [AArch64][PATCH 2/2] Support ARMv8.2 DC CVAP instruction. | Matthew Wahab | 1 | -0/+3 |
| 2015-12-10 | [AArch64][PATCH 1/2] Add support for ARMv8.2 DC CVAP instruction. | Matthew Wahab | 1 | -1/+3 |
| 2015-12-10 | [AArch64][PATCH 1/2] Add support for RAS instruction ESB. | Matthew Wahab | 1 | -0/+2 |
| 2015-12-10 | [AArch64] Fix ARMv8.1 and ARMv8.2 feature settings. | Matthew Wahab | 1 | -2/+5 |
| 2015-11-27 | [AArch64] Add ARMv8.2 instructions BFC and REV64. | Matthew Wahab | 1 | -0/+1 |
| 2015-11-27 | [AArch64] Add feature flags and command line for ARMv8.2 FP16 support. | Matthew Wahab | 1 | -0/+2 |
| 2015-11-20 | [AArch64] Add support for ARMv8.1 Virtulization Host Extensions. | Matthew Wahab | 1 | -0/+2 |
| 2015-11-19 | [AArch64] Add ARMv8.2 command line option and feature flag. | Matthew Wahab | 1 | -1/+9 |
| 2015-10-28 | Pass noaliases_p to aarch64_decode_insn | Yao Qi | 1 | -1/+1 |
| 2015-10-07 | Avoid using 'template' C++ keyword | Yao Qi | 1 | -1/+1 |
| 2015-10-07 | Wrap include/opcode/aarch64.h in extern "C" for C++ | Yao Qi | 1 | -0/+8 |
| 2015-10-02 | Make aarch64_zero_register_p declaration starts from column one | Yao Qi | 1 | -2/+2 |
| 2015-10-02 | [aarch64] expose disas_aarch64_insn and rename it to aarch64_decode_insn | Yao Qi | 1 | -0/+3 |
| 2015-06-04 | [AArch64] Add support for ARMv8.1 command line option | Matthew Wahab | 1 | -0/+9 |
| 2015-06-02 | [AArch64] Support for ARMv8.1a Adv.SIMD instructions | Matthew Wahab | 1 | -0/+1 |
| 2015-06-02 | [AArch64] Support for ARMv8.1a Limited Ordering Regions extension | Matthew Wahab | 1 | -0/+1 |
| 2015-06-01 | [AArch64][libopcode] Add support for PAN architecture extension | Matthew Wahab | 1 | -0/+5 |
| 2015-01-02 | ChangeLog rotatation and copyright year update | Alan Modra | 1 | -1/+1 |
