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path: root/include/opcode/aarch64.h
AgeCommit message (Expand)AuthorFilesLines
2022-06-29opcodes/aarch64: split off creation of comment text in disassemblerAndrew Burgess1-1/+1
2022-05-18AArch64: Enable FP16 by default for Armv9-A.Tamar Christina1-0/+1
2022-01-02Update year range in copyright notice of binutils filesAlan Modra1-1/+1
2021-12-16aarch64: Add support for Armv9.1-A to Armv9.3-ARichard Sandiford1-40/+62
2021-12-02aarch64: Add BC instructionRichard Sandiford1-1/+3
2021-12-02aarch64: Enforce P/M/E order for MOPS instructionsRichard Sandiford1-7/+25
2021-12-02aarch64: Add support for +mopsRichard Sandiford1-1/+6
2021-12-02aarch64: Add support for Armv8.8-ARichard Sandiford1-0/+3
2021-12-02aarch64: Tweak insn sequence codeRichard Sandiford1-7/+5
2021-11-17aarch64: [SME] SVE2 instructions added to support SMEPrzemyslaw Wirkus1-0/+1
2021-11-17aarch64: [SME] Add SME mode selection and state access instructionsPrzemyslaw Wirkus1-0/+3
2021-11-17aarch64: [SME] Add LD1x, ST1x, LDR and STR instructionsPrzemyslaw Wirkus1-1/+11
2021-11-17aarch64: [SME] Add ZERO instructionPrzemyslaw Wirkus1-0/+1
2021-11-17aarch64: [SME] Add MOV and MOVA instructionsPrzemyslaw Wirkus1-0/+14
2021-11-17aarch64: [SME] Add SME instructionsPrzemyslaw Wirkus1-0/+4
2021-11-17aarch64: [SME] Add +sme option to -marchPrzemyslaw Wirkus1-0/+3
2021-09-30aarch64: add armv9-a architecture to -marchPrzemyslaw Wirkus1-0/+5
2021-07-01opcodes: constify aarch64_opcode_tablesMike Frysinger1-1/+1
2021-03-31Use bool in includeAlan Modra1-20/+20
2021-03-31Remove bfd_stdint.hAlan Modra1-1/+1
2021-03-29TRUE/FALSE simplificationAlan Modra1-7/+5
2021-03-29opcodes int vs bfd_boolean fixesAlan Modra1-1/+1
2021-01-11aarch64: Remove support for CSREKyrylo Tkachov1-2/+0
2021-01-01PR27116, Spelling errors found by Debian style checkerAlan Modra1-1/+1
2021-01-01Update year range in copyright notice of binutils filesAlan Modra1-1/+1
2020-11-16aarch64: Extract Condition flag manipulation feature from Armv8.4-APrzemyslaw Wirkus1-1/+3
2020-11-09aarch64: Limit Rt register number for LS64 load/store instructionsPrzemyslaw Wirkus1-0/+1
2020-11-06aarch64: Extract Pointer Authentication feature from Armv8.3-APrzemyslaw Wirkus1-0/+2
2020-11-04aarch64: Update feature RAS system registersPrzemyslaw Wirkus1-2/+2
2020-11-03[PATCH][GAS] aarch64: Add atomic 64-byte load/store instructions for Armv8.7Przemyslaw Wirkus1-1/+3
2020-10-28aarch64: Add CSR PDEC instructionPrzemyslaw Wirkus1-0/+2
2020-10-28aarch64: Add DSB instruction Armv8.7-a variantPrzemyslaw Wirkus1-0/+2
2020-10-28aarch64: Add basic support for armv8.7-a architecturePrzemyslaw Wirkus1-0/+3
2020-09-08aarch64: Add support for Armv8-R system registersAlex Coplan1-2/+4
2020-09-08aarch64: Add base support for Armv8-RAlex Coplan1-1/+7
2020-08-10aarch64: Don't assert on long sysreg namesAlex Coplan1-0/+2
2020-08-10[aarch64] GAS doesn't validate the architecture version for any tlbi register...Przemyslaw Wirkus1-5/+3
2020-06-22aarch64: Normalize and sort feature bit macrosAlex Coplan1-64/+47
2020-06-11[PATCH]: aarch64: Refactor representation of system registersAlex Coplan1-0/+4
2020-04-30AArch64: add GAS support for UDF instructionAlex Coplan1-0/+1
2020-01-01Update year range in copyright notice of binutils filesAlan Modra1-1/+1
2019-12-05Arm64: simplify Crypto arch extension handlingJan Beulich1-1/+3
2019-11-07[binutils][aarch64] Matrix Multiply extension enablement [8/X]Matthew Malcomson1-1/+9
2019-11-07[binutils][aarch64] Bfloat16 enablement [2/X]Matthew Malcomson1-5/+10
2019-11-07[gas][aarch64] Armv8.6-a option [1/X]Matthew Malcomson1-1/+3
2019-07-01[gas][aarch64][SVE2] Fix pmull{t,b} requirement on SVE2-AESMatthew Malcomson1-1/+1
2019-05-09[binutils][aarch64] New SVE_SHLIMM_UNPRED_22 operand.Matthew Malcomson1-0/+1
2019-05-09[binutils][aarch64] New sve_size_tsz_bhs iclass.Matthew Malcomson1-0/+1
2019-05-09[binutils][aarch64] New SVE_Zm4_11_INDEX operand.Matthew Malcomson1-0/+1
2019-05-09[binutils][aarch64] New sve_shift_tsz_bhsd iclass.Matthew Malcomson1-0/+1
generated by cgit v1.1 at 2024-11-23 13:51:39 +0000