| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2020-06-22 | aarch64: Normalize and sort feature bit macros | Alex Coplan | 1 | -64/+47 |
| 2020-06-11 | [PATCH]: aarch64: Refactor representation of system registers | Alex Coplan | 1 | -0/+4 |
| 2020-04-30 | AArch64: add GAS support for UDF instruction | Alex Coplan | 1 | -0/+1 |
| 2020-01-01 | Update year range in copyright notice of binutils files | Alan Modra | 1 | -1/+1 |
| 2019-12-05 | Arm64: simplify Crypto arch extension handling | Jan Beulich | 1 | -1/+3 |
| 2019-11-07 | [binutils][aarch64] Matrix Multiply extension enablement [8/X] | Matthew Malcomson | 1 | -1/+9 |
| 2019-11-07 | [binutils][aarch64] Bfloat16 enablement [2/X] | Matthew Malcomson | 1 | -5/+10 |
| 2019-11-07 | [gas][aarch64] Armv8.6-a option [1/X] | Matthew Malcomson | 1 | -1/+3 |
| 2019-07-01 | [gas][aarch64][SVE2] Fix pmull{t,b} requirement on SVE2-AES | Matthew Malcomson | 1 | -1/+1 |
| 2019-05-09 | [binutils][aarch64] New SVE_SHLIMM_UNPRED_22 operand. | Matthew Malcomson | 1 | -0/+1 |
| 2019-05-09 | [binutils][aarch64] New sve_size_tsz_bhs iclass. | Matthew Malcomson | 1 | -0/+1 |
| 2019-05-09 | [binutils][aarch64] New SVE_Zm4_11_INDEX operand. | Matthew Malcomson | 1 | -0/+1 |
| 2019-05-09 | [binutils][aarch64] New sve_shift_tsz_bhsd iclass. | Matthew Malcomson | 1 | -0/+1 |
| 2019-05-09 | [binutils][aarch64] New SVE_SHRIMM_UNPRED_22 operand. | Matthew Malcomson | 1 | -0/+2 |
| 2019-05-09 | [binutils][aarch64] New sve_size_013 iclass. | Matthew Malcomson | 1 | -0/+1 |
| 2019-05-09 | [binutils][aarch64] New sve_size_bh iclass. | Matthew Malcomson | 1 | -0/+1 |
| 2019-05-09 | [binutils][aarch64] New sve_size_sd2 iclass. | Matthew Malcomson | 1 | -0/+1 |
| 2019-05-09 | [binutils][aarch64] New SVE_ADDR_ZX operand. | Matthew Malcomson | 1 | -0/+1 |
| 2019-05-09 | [binutils][aarch64] New SVE_Zm3_11_INDEX operand. | Matthew Malcomson | 1 | -0/+1 |
| 2019-05-09 | [binutils][aarch64] New iclass sve_size_hsd2. | Matthew Malcomson | 1 | -0/+1 |
| 2019-05-09 | [binutils][aarch64] Introduce SVE_IMM_ROT3 operand. | Matthew Malcomson | 1 | -0/+1 |
| 2019-05-09 | [binutils][aarch64] SVE2 feature extension flags. | Matthew Malcomson | 1 | -0/+7 |
| 2019-05-01 | [BINUTILS, AArch64] Enable Transactional Memory Extension | Sudakshina Das | 1 | -1/+3 |
| 2019-04-11 | [BINUTILS, AArch64, 2/2] Update Store Allocation Tag instructions | Sudakshina Das | 1 | -0/+1 |
| 2019-01-25 | AArch64: Remove ldgv and stgv instructions from Armv8.5-A Memory Tagging Exte... | Sudi Das | 1 | -2/+0 |
| 2019-01-01 | Update year range in copyright notice of binutils files | Alan Modra | 1 | -1/+1 |
| 2018-11-12 | [BINUTILS, AARCH64, 6/8] Add Tag getting instruction in Memory Tagging Extension | Sudakshina Das | 1 | -0/+2 |
| 2018-11-12 | [BINUTILS, AARCH64, 4/8] Add Tag setting instructions in Memory Tagging Exten... | Sudakshina Das | 1 | -0/+8 |
| 2018-11-12 | [BINUTILS, AARCH64, 2/8] Add Tag generation instructions in Memory Tagging Ex... | Sudakshina Das | 1 | -0/+2 |
| 2018-11-12 | [BINUTILS, AARCH64, 1/8] Add support for Memory Tagging Extension for ARMv8.5-A | Sudakshina Das | 1 | -0/+2 |
| 2018-10-09 | [PATCH, BINUTULS, AARCH64, 9/9] Add SSBS to MSR/MRS | Sudakshina Das | 1 | -1/+4 |
| 2018-10-09 | [PATCH, BINUTILS, AARCH64, 8/9] Add SCXTNUM_ELx and ID_PFR2_EL1 system registers | Sudakshina Das | 1 | -1/+8 |
| 2018-10-09 | [PATCH, BINUTILS, AARCH64, 7/9] Add BTI instruction | Sudakshina Das | 1 | -1/+12 |
| 2018-10-09 | [PATCH, BINUTILS, AARCH64, 6/9] Add Random number instructions | Sudakshina Das | 1 | -0/+2 |
| 2018-10-09 | [PATCH, BINUTILS, AARCH64, 5/9] Add DC CVADP instruction | Sudakshina Das | 1 | -1/+4 |
| 2018-10-09 | [PATCH, BINUTILS, AARCH64, 4/9] Add Execution and Data Restriction instructions | Sudakshina Das | 1 | -1/+6 |
| 2018-10-09 | [PATCH, BINUTILS, AARCH64, 3/9] Add instruction SB for ARMv8.5-A | Sudakshina Das | 1 | -1/+4 |
| 2018-10-09 | [PATCH, BINUTILS, AARCH64, 2/9] Add Data procoessing instructions for ARMv8.5-A | Sudakshina Das | 1 | -1/+8 |
| 2018-10-09 | [PATCH, BINUTILS, AARCH64, 1/9] Add -march=armv8.5-a and related internal fea... | Sudakshina Das | 1 | -0/+4 |
| 2018-10-03 | AArch64: Add SVE constraints verifier. | Tamar Christina | 1 | -2/+8 |
| 2018-10-03 | AArch64: Refactor verifiers to make more general. | Tamar Christina | 1 | -1/+3 |
| 2018-10-03 | AArch64: Refactor err_type. | Tamar Christina | 1 | -1/+11 |
| 2018-10-03 | AArch64: Wire through instr_sequence | Tamar Christina | 1 | -2/+22 |
| 2018-10-03 | AArch64: Mark sve instructions that require MOVPRFX constraints | Tamar Christina | 1 | -2/+16 |
| 2018-06-29 | Fix AArch64 encodings for by element instructions. | Tamar Christina | 1 | -0/+2 |
| 2018-05-15 | Implement Read/Write constraints on system registers on AArch64 | Tamar Christina | 1 | -1/+5 |
| 2018-05-15 | Allow non-fatal errors to be emitted and for disassembly notes be placed on A... | Tamar Christina | 1 | -1/+3 |
| 2018-05-15 | Modify AArch64 Assembly and disassembly functions to be able to fail and repo... | Tamar Christina | 1 | -3/+12 |
| 2018-03-28 | Enhance the AARCH64 assembler to support LDFF1xx instructions which use REG+R... | Nick Clifton | 1 | -0/+1 |
| 2018-01-03 | Update year range in copyright notice of binutils files | Alan Modra | 1 | -1/+1 |
