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path: root/include/opcode/ChangeLog
AgeCommit message (Expand)AuthorFilesLines
2015-06-19Allow for optional operands with non-zero default values.Peter Bergner1-0/+5
2015-06-04[AArch64] Add support for ARMv8.1 command line optionMatthew Wahab1-0/+4
2015-06-03[ARM] Support for ARMv8.1 command line optionMatthew Wahab1-0/+9
2015-06-02[ARM] Add support for ARMv8.1 PAN extensionMatthew Wahab1-0/+5
2015-06-02[ARM] Rework CPU feature selection in the disassemblerMatthew Wahab1-0/+4
2015-06-02[AArch64] Support for ARMv8.1a Adv.SIMD instructionsMatthew Wahab1-0/+4
2015-06-02[AArch64] Support for ARMv8.1a Limited Ordering Regions extensionMatthew Wahab1-0/+4
2015-06-01[AArch64][libopcode] Add support for PAN architecture extensionMatthew Wahab1-0/+6
2015-04-30Make RL78 disassembler and simulator respect ISA for mul/divDJ Delorie1-0/+5
2015-03-24Extend arm_feature_set struct to provide more bitsTerry Guo1-0/+17
2015-02-19Wrap a few opcodes headers in extern "C" for C++Pedro Alves1-0/+9
2015-01-28FT32 initial supportAlan Modra1-0/+4
2015-01-16S/390: Add support for IBM z13.Andreas Krebbel1-0/+4
2015-01-02ChangeLog rotatation and copyright year updateAlan Modra1-1/+5
2014-12-27Limit moxie sto/ldo offsets to 16 bitsAnthony Green1-0/+5
2014-12-06Add Visium support to opcodesEric Botcazou1-0/+4
2014-11-28Remove broken nios2 assembler dwim support.Sandra Loosemore1-0/+6
2014-11-06Add mach parameter to nios2_find_opcode_hash.Sandra Loosemore1-0/+5
2014-10-23Refactoring/cleanup of nios2 opcodes and assembler code.Sandra Loosemore1-0/+50
2014-10-17opcodes, elf: annotate instructions with HWCAP2_VIS3B.Jose E. Marchesi1-0/+4
2014-10-09This is a series of patches that add support for the SPARC M7 cpu toJose E. Marchesi1-0/+20
2014-09-16NDS32/opcodes: Add audio ISA extension and modify the disassemble implemnt.Kuan-Lin Chen1-0/+4
2014-09-15Add support for MIPS R6.Andrew Bennett1-0/+20
2014-09-03[PATCH/AArch64] Implement LSE featureJiong Wang1-0/+8
2014-08-26MIPS: Make the CODE10 operand code consistent between ISAsMaciej W. Rozycki1-0/+5
2014-07-29[MIPS] Rename COPROC related macrosMatthew Fortune1-0/+7
2014-07-01Add support for the AVR Tiny series of microcontrollers.Barney Stratford1-0/+12
2014-05-20Fix MSP430 assembler to support #hi(<symbol>).Nick Clifton1-0/+4
2014-05-07Add MIPS r3 and r5 support.Andrew Bennett1-0/+24
2014-05-01include/opcode/Richard Sandiford1-0/+4
2014-04-22Remove support for the (deprecated) openrisc and or32 configurations and replaceChristian Svensson1-0/+4
2014-03-05Update copyright yearsAlan Modra1-1/+5
2013-12-16Range of element index is too large on MIPS MSA element selection instructions.Andrew Bennett1-0/+5
2013-12-13Add support for Andes NDS32:Kuan-Lin Chen1-0/+5
2013-12-07strip off +x bits on non-executable/script filesMike Frysinger1-0/+4
2013-11-20gas/testsuite/Yufeng Zhang1-0/+5
2013-11-18Add support for armv7ve to gas.Yufeng Zhang1-0/+6
2013-11-18Revert "Add support for AArch64 trace unit registers."Yufeng Zhang1-0/+9
2013-11-15gas/Yufeng Zhang1-0/+5
2013-11-05gas/Yufeng Zhang1-0/+6
2013-11-05gas/Yufeng Zhang1-0/+5
2013-10-142013-10-14 Chao-ying Fu <Chao-ying.Fu@imgtec.com>Chao-ying Fu1-0/+13
2013-08-23 PR binutils/15834Nick Clifton1-1/+6
2013-08-19include/opcode/Richard Sandiford1-0/+4
2013-08-19include/opcode/Richard Sandiford1-0/+4
2013-08-19include/opcode/Richard Sandiford1-0/+5
2013-08-04include/opcode/Richard Sandiford1-0/+10
2013-08-03include/opcode/Richard Sandiford1-0/+6
2013-08-01include/opcode/Richard Sandiford1-0/+26
2013-08-01include/opcode/Richard Sandiford1-0/+6
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