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2022-06-27drop XC16x bitsJan Beulich1-40/+0
Commit 04f096fb9e25 ("Move the xc16x target to the obsolete list") moved the architecture from the "obsolete but still available" to the "obsolete / support removed" list in config.bfd, making the architecture impossible to enable (except maybe via "enable everything" options"). Note that I didn't touch */po/*.po{,t} on the assumption that these would be updated by some (half)automatic means.
2022-06-08HOWTO size encodingAlan Modra1-69/+69
This changes the HOWTO macro to encode the howto.size field from a value given in bytes. This of course requires editing all target uses of HOWTO, a major pain, but makes it a little nicer to specify new target HOWTOs. Object files before/after this patch are unchanged in .data and .rodata. bfd/ * reloc.c (HOWTO_RSIZE): Encode size in bytes. (EMPTY_HOWTO): Adjust to keep it all zero. * aout-ns32k.c, * aoutx.h, * coff-alpha.c, * coff-arm.c, * coff-i386.c, * coff-mcore.c, * coff-mips.c, * coff-rs6000.c, * coff-sh.c, * coff-tic30.c, * coff-tic4x.c, * coff-tic54x.c, * coff-x86_64.c, * coff-z80.c, * coff-z8k.c, * coff64-rs6000.c, * elf-hppa.h, * elf-m10200.c, * elf-m10300.c, * elf32-arc.c, * elf32-arm.c, * elf32-avr.c, * elf32-bfin.c, * elf32-cr16.c, * elf32-cris.c, * elf32-crx.c, * elf32-csky.c, * elf32-d10v.c, * elf32-d30v.c, * elf32-dlx.c, * elf32-epiphany.c, * elf32-fr30.c, * elf32-frv.c, * elf32-ft32.c, * elf32-gen.c, * elf32-h8300.c, * elf32-i386.c, * elf32-ip2k.c, * elf32-iq2000.c, * elf32-lm32.c, * elf32-m32c.c, * elf32-m32r.c, * elf32-m68hc11.c, * elf32-m68hc12.c, * elf32-m68k.c, * elf32-mcore.c, * elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c, * elf32-mips.c, * elf32-moxie.c, * elf32-msp430.c, * elf32-mt.c, * elf32-nds32.c, * elf32-nios2.c, * elf32-or1k.c, * elf32-pj.c, * elf32-ppc.c, * elf32-pru.c, * elf32-rl78.c, * elf32-rx.c, * elf32-s12z.c, * elf32-s390.c, * elf32-score.c, * elf32-score7.c, * elf32-sh-relocs.h, * elf32-spu.c, * elf32-tic6x.c, * elf32-tilepro.c, * elf32-v850.c, * elf32-vax.c, * elf32-visium.c, * elf32-wasm32.c, * elf32-xc16x.c, * elf32-xgate.c, * elf32-xstormy16.c, * elf32-xtensa.c, * elf32-z80.c, * elf64-alpha.c, * elf64-bpf.c, * elf64-gen.c, * elf64-mips.c, * elf64-mmix.c, * elf64-nfp.c, * elf64-ppc.c, * elf64-s390.c, * elf64-x86-64.c, * elfn32-mips.c, * elfnn-aarch64.c, * elfxx-ia64.c, * elfxx-loongarch.c, * elfxx-mips.c, * elfxx-riscv.c, * elfxx-sparc.c, * elfxx-tilegx.c, * mach-o-aarch64.c, * mach-o-arm.c, * mach-o-i386.c, * mach-o-x86-64.c, * pdp11.c, * reloc.c, * som.c, * vms-alpha.c: Adjust all uses of HOWTO. * bfd-in2.h: Regenerate. include/ * elf/arc-reloc.def: Adjust all uses of HOWTO.
2022-05-27Remove use of bfd_uint64_t and similarAlan Modra1-1/+1
Requiring C99 means that uses of bfd_uint64_t can be replaced with uint64_t, and similarly for bfd_int64_t, BFD_HOST_U_64_BIT, and BFD_HOST_64_BIT. This patch does that, removes #ifdef BFD_HOST_* and tidies a few places that print 64-bit values.
2022-04-07Recognize the NT_ARM_SYSTEM_CALL register setLuis Machado1-0/+2
Update binutils to recognize the NT_ARM_SYSTEM_CALL set that is dumped by Linux to core files.
2022-04-01Recognize FreeBSD core dump note for x86 segment base registers.John Baldwin1-0/+1
This core dump note contains the value of the base address of the %fs and %gs segments for both i386 and amd64 core dumps. It is primarily useful in resolving the address of TLS variables in core dumps. binutils/ChangeLog: * readelf.c (get_freebsd_elfcore_note_type): Handle NT_FREEBSD_X86_SEGBASES. include/ChangeLog: * elf/common.h (NT_FREEBSD_X86_SEGBASES): Define.
2022-03-20LoongArch: Update ABI eflag in elf header.liuzhensong1-14/+23
Update LoongArch ABI eflag in elf header. ilp32s 0x5 ilp32f 0x6 ilp32d 0x7 lp64s 0x1 lp64f 0x2 lp64d 0x3 bfd/ * elfnn-loongarch.c Check object flags while ld. gas/ * tc-loongarch.c Write eflag to elf header. include/elf * loongarch.h Define ABI number.
2022-03-16binutils/readelf: handle AMDGPU relocation typesSimon Marchi1-0/+21
Make readelf recognize AMDGPU relocation types, as documented here: https://llvm.org/docs/AMDGPUUsage.html#amdgpu-relocation-records The user-visible change looks like: -000000000004 000400000001 unrecognized: 1 0000000000000000 SCRATCH_RSRC_DWORD0 -00000000000c 000500000001 unrecognized: 1 0000000000000000 SCRATCH_RSRC_DWORD1 -000000000014 000600000007 unrecognized: 7 0000000000000000 global_var0 -00000000001c 000700000008 unrecognized: 8 0000000000000000 global_var1 -000000000024 000800000009 unrecognized: 9 0000000000000000 global_var2 -00000000002c 00090000000a unrecognized: a 0000000000000000 global_var3 -000000000034 000a0000000b unrecognized: b 0000000000000000 global_var4 +000000000004 000400000001 R_AMDGPU_ABS32_LO 0000000000000000 SCRATCH_RSRC_DWORD0 +00000000000c 000500000001 R_AMDGPU_ABS32_LO 0000000000000000 SCRATCH_RSRC_DWORD1 +000000000014 000600000007 R_AMDGPU_GOTPCREL 0000000000000000 global_var0 +00000000001c 000700000008 R_AMDGPU_GOTPCREL 0000000000000000 global_var1 +000000000024 000800000009 R_AMDGPU_GOTPCREL 0000000000000000 global_var2 +00000000002c 00090000000a R_AMDGPU_REL32_LO 0000000000000000 global_var3 +000000000034 000a0000000b R_AMDGPU_REL32_HI 0000000000000000 global_var4 binutils/ChangeLog: * readelf.c (dump_relocations): Handle EM_AMDGPU. include/ChangeLog: * elf/amdgpu.h: Add relocation values. Change-Id: I2ed4589f4cd37ea11ad2e0cb38d4b682271e1334
2022-03-16binutils/readelf: handle NT_AMDGPU_METADATA note nameSimon Marchi1-0/+4
Handle the NT_AMDGPU_METADATA note, which is described here: https://llvm.org/docs/AMDGPUUsage.html#code-object-v3-note-records As of this patch, just print out the name, not the contents, which is in the msgpack format. binutils/ChangeLog: * readelf.c (get_amdgpu_elf_note_type): New. (process_note): Handle "AMDGPU" notes. include/ChangeLog: * elf/amdgcn.h (NT_AMDGPU_METADATA): New. Change-Id: Id2dba2e2aeaa55ef7464fb35aee9c7d5f96ddb23
2022-03-16binutils/readelf: decode AMDGPU-specific e_flagsSimon Marchi1-0/+54
Decode and print the AMDGPU-specific fields of e_flags, as documented here: https://llvm.org/docs/AMDGPUUsage.html#header That is: - The specific GPU model - Whether the xnack and sramecc features are enabled The result looks like: - Flags: 0x52f + Flags: 0x52f, gfx906, xnack any, sramecc any The flags for the "HSA" OS ABI are properly versioned and documented on that page. But the NONE, PAL and MESA3D OS ABIs are not well documented nor versioned. Taking a peek at the LLVM source code, we see that they encode their flags the same way as HSA v3. For example, for PAL: https://github.com/llvm/llvm-project/blob/c8b614cd74a92d85936aed5ac7c642af75ffdc29/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp#L601 So for those other OS ABIs, we read them the same as HSA v3. binutils/ChangeLog: * readelf.c: Include elf/amdgcn.h. (decode_AMDGPU_machine_flags): New. (get_machine_flags): Handle flags for EM_AMDGPU machine type. include/ChangeLog: * elf/amdgcn.h: Add EF_AMDGPU_MACH_AMDGCN_* and EF_AMDGPU_FEATURE_* defines. Change-Id: Ib5b94df7cae0719a22cf4e4fd0629330e9485c12
2022-03-16binutils/readelf: handle AMDGPU OS ABIsSimon Marchi1-0/+2
When the machine is EM_AMDGPU, handle the various OS ABIs described here: https://llvm.org/docs/AMDGPUUsage.html#header For a binary with the HSA OS ABI, the change looks like: - OS/ABI: <unknown: 40> + OS/ABI: AMD HSA binutils/ChangeLog: * readelf.c (get_osabi_name): Handle EM_AMDGPU OS ABIs. include/ChangeLog: * elf/common.h (ELFOSABI_AMDGPU_PAL, ELFOSABI_AMDGPU_MESA3D): New. Change-Id: I383590c390f7dc2fe0f902f50038735626d71863
2022-03-16bfd: add AMDGCN architectureSimon Marchi2-0/+37
Add support for the AMDGCN architecture to BFD. This is the bare minimum to get $ ./configure --target=amdgcn-hsa-amdhsa --disable-gas $ make all-binutils working later in this series. The specific AMDGCN models added here are a bit arbitrary, based on what we intend to initially support in GDB. This list will need to be updated in the future anyway. The complete up-to-date list of existing AMDGPU models can be found here: https://llvm.org/docs/AMDGPUUsage.html#processors The ELF format for this architecture is documented here: https://llvm.org/docs/AMDGPUUsage.html#elf-code-object The flags for the "HSA" OS ABI are properly versioned and documented on that page. But the NONE, PAL and MESA3D OS ABIs are not well documented nor versioned. Taking a peek at the LLVM source code, we see that they encode their flags the same way as HSA v3. For example, for PAL: https://github.com/llvm/llvm-project/blob/c8b614cd74a92d85936aed5ac7c642af75ffdc29/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp#L601 So at least, we know that all AMDGPU objects (of which AMDGCN objects are a subset of) at the time of writing encode the specific GPU model in the EF_AMDGPU_MACH field of e_flags. bfd/ChangeLog: * Makefile.am (ALL_MACHINES, ALL_MACHINES_CFILES): Add cpu-amdgcn.c. (BFD64_BACKENDS): Add elf64-amdgcn.lo. (BFD64_BACKENDS_CFILES): Add elf64-amdgcn.c. * Makefile.in: Re-generate. * cpu-amdgcn.c: New. * elf64-amdgcn.c: New. * archures.c (bfd_architecture): Add bfd_arch_amdgcn and related mach defines. (bfd_amdgcn_arch): New. (bfd_archures_list): Add bfd_amdgcn_arch. * bfd-in2.h: Re-generate. * config.bfd: Handle amdgcn* target. * configure.ac: Handle amdgcn_elf64_le_vec. * configure: Re-generate. * elf-bfd.h (elf_target_id): Add AMDGCN_ELF_DATA. * targets.c (amdgcn_elf64_le_vec): New. (_bfd_target_vector): Add amdgcn_elf64_le_vec. include/ChangeLog: * elf/amdgpu.h: New. * elf/common.h (ELFOSABI_AMDGPU_HSA): Add. Change-Id: I969f7b14960797e88891c308749a6e341eece5b2
2022-02-13PR28882, build failure with gcc-4.2 due to use of 0b literalsAlan Modra1-8/+8
PR 28882 * elf/loongarch.h: Replace binary literals with hex.
2022-02-03Rename EM_56800V4 to EM_56800EF.Cary Coutant1-1/+1
include/elf: * common.h: Rename EM_56800V4 to EM_56800EF.
2022-02-03Add new e_machine values.Cary Coutant1-0/+3
include/elf: * common.h: Add EM_U16_U8CORE, EM_TACHYUM, EM_56800V4.
2022-01-25Fix a probem building the binutils on SPARC/amd64Klaus Ziegler1-0/+2
PR 28816 * elf/common.h (AT_SUN_HWCAP): Make definition conditional.
2022-01-02Update year range in copyright notice of binutils filesAlan Modra83-83/+83
The result of running etc/update-copyright.py --this-year, fixing all the files whose mode is changed by the script, plus a build with --enable-maintainer-mode --enable-cgen-maint=yes, then checking out */po/*.pot which we don't update frequently. The copy of cgen was with commit d1dd5fcc38ead reverted as that commit breaks building of bfp opcodes files.
2021-12-07Support AT_FXRNG and AT_KPRELOAD on FreeBSD.John Baldwin1-0/+2
FreeBSD's kernel has recently added two new ELF auxiliary vector entries. AT_FXRNG points to a root seed version for the kernel's PRNG. Userland can use this to reseed a userland PRNG after the kernel's PRNG has reseeded. AT_KPRELOAD is the base address of a kernel-provided vDSO. This change displays the proper name and description of these entries in 'info auxv'. include/ChangeLog: * elf/common.h (AT_FREEBSD_FXRNG, AT_FREEBSD_KPRELOAD): Define.
2021-12-01readelf: recognize FDO Packaging Metadata ELF noteLuca Boccassi1-0/+3
As defined on: https://systemd.io/COREDUMP_PACKAGE_METADATA/ this note will be used starting from Fedora 36. Allow readelf --notes to pretty print it: Displaying notes found in: .note.package Owner Data size Description FDO 0x00000039 FDO_PACKAGING_METADATA Packaging Metadata: {"type":"deb","name":"fsverity-utils","version":"1.3-1"} Signed-off-by: Luca Boccassi <luca.boccassi@microsoft.com>
2021-11-19RISC-V: Support STO_RISCV_VARIANT_CC and DT_RISCV_VARIANT_CC.Nelson Chu1-0/+6
This is the original discussion, https://github.com/riscv/riscv-elf-psabi-doc/pull/190 And here is the glibc part, https://sourceware.org/pipermail/libc-alpha/2021-August/129931.html For binutils part, we need to support a new direcitve: .variant_cc. The function symbol marked by .variant_cc means it need to be resolved directly without resolver for dynamic linker. We also add a new dynamic entry, STO_RISCV_VARIANT_CC, to indicate there are symbols with the special attribute in the dynamic symbol table of the object. I heard that llvm already have supported this in their mainline, so I think it's time to commit this. bfd/ * elfnn-riscv.c (riscv_elf_link_hash_table): Added variant_cc flag. It is used to check if relocations for variant CC symbols may be present. (allocate_dynrelocs): If the symbol has STO_RISCV_VARIANT_CC flag, then raise the variant_cc flag of riscv_elf_link_hash_table. (riscv_elf_size_dynamic_sections): Added dynamic entry for variant_cc. (riscv_elf_merge_symbol_attribute): New function, used to merge non-visibility st_other attributes, including STO_RISCV_VARIANT_CC. binutils/ * readelf.c (get_riscv_dynamic_type): New function. (get_dynamic_type): Called get_riscv_dynamic_type for riscv targets. (get_riscv_symbol_other): New function. (get_symbol_other): Called get_riscv_symbol_other for riscv targets. gas/ * config/tc-riscv.c (s_variant_cc): Marked symbol that it follows a variant CC convention. (riscv_elf_copy_symbol_attributes): Same as elf_copy_symbol_attributes, but without copying st_other. If a function symbol has special st_other value set via directives, then attaching an IFUNC resolver to that symbol should not override the st_other setting. (riscv_pseudo_table): Support variant_cc diretive. * config/tc-riscv.h (OBJ_COPY_SYMBOL_ATTRIBUTES): Defined. * testsuite/gas/riscv/variant_cc-set.d: New testcase. * testsuite/gas/riscv/variant_cc-set.s: Likewise. * testsuite/gas/riscv/variant_cc.d: Likewise. * testsuite/gas/riscv/variant_cc.s: Likewise. include/ * elf/riscv.h (DT_RISCV_VARIANT_CC): Defined to (DT_LOPROC + 1). (STO_RISCV_VARIANT_CC): Defined to 0x80. ld/ * testsuite/ld-riscv-elf/variant_cc-1.s: New testcase. * testsuite/ld-riscv-elf/variant_cc-2.s: Likewise. * testsuite/ld-riscv-elf/variant_cc-now.d: Likewise. * testsuite/ld-riscv-elf/variant_cc-r.d: Likewise. * testsuite/ld-riscv-elf/variant_cc-shared.d: Likewise. * testsuite/ld-riscv-elf/ld-riscv-elf.exp: Updated.
2021-11-16readelf: Support SHT_RELR/DT_RELR for -rFangrui Song2-1/+9
The -r output for SHT_RELR looks like: Relocation section '.relr.dyn' at offset 0x530 contains 4 entries: 7 offsets 00000000000028c0 00000000000028c8 0000000000003ad0 0000000000003ad8 0000000000003ae0 0000000000003ae8 0000000000003af0 For --use-dynamic, the header looks like 'RELR' relocation section at offset 0x530 contains 32 bytes: include/ * elf/common.h (DT_ENCODING): Bump to 38. * elf/external.h (Elf32_External_Relr): New. (Elf64_External_Relr): New. binutils/ * readelf.c (enum relocation_type): New. (slurp_relr_relocs): New. (dump_relocations): Change is_rela to rel_type. Dump RELR. (dynamic_relocations): Add DT_RELR. (process_relocs): Check SHT_RELR and DT_RELR. (process_dynamic_section): Store into dynamic_info for DT_RELR/DT_RELRENT/DT_RELRSZ.
2021-11-15PowerPC64 @notoc in non-power10 codeAlan Modra1-0/+1
R_PPC64_REL24_P9NOTOC is a variant of R_PPC64_REL24_NOTOC for use on @notoc cals from non-power10 code in the rare case that using such a construct is useful. R_PPC64_REL24_P9NOTOC will be emitted by gas rather than R_PPC64_REL24_NOTOC when @notoc is used in a branch instruction if power10 instructions are not enabled at that point. The new relocation tells the linker to not use power10 instructions on any stub emitted for that branch, unless overridden by --power10-stubs=yes. The current linker heuristic of only generating power10 instructions for stubs if power10-only relocations are detected, continues to be used. include/ * elf/ppc64.h (R_PPC64_REL24_P9NOTOC): Define. bfd/ * reloc.c (BFD_RELOC_PPC64_REL24_P9NOTOC): Define. * elf64-ppc.c (ppc64_elf_howto_raw): Add entry for new reloc. (ppc64_elf_reloc_type_lookup): Handle it. (enum ppc_stub_type): Delete. (enum ppc_stub_main_type, ppc_stub_sub_type): New. (struct ppc_stub_type): New. (struct ppc_stub_hash_entry): Use the above new type. (struct ppc_link_hash_table): Update stub_count. (is_branch_reloc, ppc64_elf_check_relocs), (toc_adjusting_stub_needed): Handle new reloc. (stub_hash_newfunc, select_alt_stub, ppc_merge_stub), (ppc_type_of_stub, plt_stub_size, build_plt_stub), (build_tls_get_addr_head, build_tls_get_addr_tail), (ppc_build_one_stub, ppc_size_one_stub, ppc64_elf_size_stubs), (ppc64_elf_build_stubs, ppc64_elf_relocate_section): Handle new reloc. Modify stub handling to suit new scheme. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. gas/ * config/tc-ppc.c (ppc_elf_suffix): When power10 is not enabled return BFD_RELOC_PPC64_REL24_P9NOTOC for @notoc. (fixup_size, ppc_force_relocation, ppc_fix_adjustable): Handle BFD_RELOC_PPC64_REL24_P9NOTOC. ld/ * testsuite/ld-powerpc/callstub-2.s: Add .machine power10.
2021-11-06readelf: Support RELR in -S and -d and outputFangrui Song1-0/+4
readelf -r dumping support is not added in this patch. include/ * elf/common.h: Add SHT_RELR, DT_RELR{,SZ,ENT} bfd/ * elf.c (_bfd_elf_print_private_bfd_data): Add DT_RELR{,SZ,ENT}. binutils/ * readelf.c (get_dynamic_type): Add DT_RELR{,SZ,ENT}. (get_section_type_name): Add SHT_RELR.
2021-11-01arm: add armv9-a architecture to -marchPrzemyslaw Wirkus1-1/+5
Update also include: + New value of Tag_CPU_arch EABI attribute (22) is added. + Updated missing Tag_CPU_arch EABI attributes. + Updated how we combine archs 'v4t_plus_v6_m' as this mechanism have to handle new Armv9 as well. Regression tested on `arm-none-eabi` cross Binutils and no issues. bfd/ * archures.c: Define bfd_mach_arm_9. * bfd-in2.h (bfd_mach_arm_9): Define bfd_mach_arm_9. * cpu-arm.c: Add 'armv9-a' option to -march. * elf32-arm.c (using_thumb2_bl): Update assert check. (arch_has_arm_nop): Add TAG_CPU_ARCH_V9. (bfd_arm_get_mach_from_attributes): Add case for TAG_CPU_ARCH_V9. Update assert. (tag_cpu_arch_combine): Updated table. (v9): New table.. binutils/ * readelf.c (arm_attr_tag_CPU_arch): Update with elfcpp/ * arm.h: Update TAG_CPU_ARCH_ enums with correct values. gas/ * NEWS: Update docs. * config/tc-arm.c (get_aeabi_cpu_arch_from_fset): Return Armv9-a for -amarch=all. (aeabi_set_public_attributes): Update assert. * doc/c-arm.texi: Update docs. * testsuite/gas/arm/armv9-a_arch.d: New test. * testsuite/gas/arm/attr-march-all.d: Update test with v9. include/ * elf/arm.h Update TAG_CPU_ARCH_ defines with correct values. * opcode/arm.h (ARM_EXT3_V9A): New macro. (ARM_ARCH_NONE): Updated with arm_feature_set.core size. (FPU_NONE): Updated. (ARM_ANY): Updated. (ARM_ARCH_UNKNOWN): New macro. (ARM_FEATURE_LOW): Updated. (ARM_FEATURE_CORE): Updated. (ARM_FEATURE_CORE_LOW): Updated. (ARM_FEATURE_CORE_HIGH): Updated. (ARM_FEATURE_COPROC): Updated. (ARM_FEATURE): Updated. (ARM_FEATURE_ALL): New macro. opcodes/ * arm-dis.c (select_arm_features): Support bfd_mach_arm_9. Also Update bfd_mach_arm_unknown to use new macro ARM_ARCH_UNKNOWN.
2021-10-24LoongArch bfd supportliuzhensong2-1/+130
2021-10-22 Chenghua Xu <xuchenghua@loongson.cn> Zhensong Liu <liuzhensong@loongson.cn> Weinan Liu <liuweinan@loongson.cn> bfd/ * Makefile.am: Add LoongArch. * archures.c: Likewise. * config.bfd: Likewise. * configure.ac: Likewise. * cpu-loongarch.c: New. * elf-bfd.h: Add LoongArch. * elf.c: Add LoongArch elfcore_grok_xxx. * elfnn-loongarch.c: New. * elfxx-loongarch.c: New. * elfxx-loongarch.h: New. * reloc.c: Add LoongArch BFD RELOC ENUM. * targets.c: Add LoongArch target. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * po/BLD-POTFILES.in: Regenerate. * po/SRC-POTFILES.in: Regenerate. include/ * elf/common.h: Add NT_LARCH_{CPUCFG,CSR,LSX,LASX}. * elf/loongarch.h: New.
2021-09-30Add Solaris specific ELF note processingLibor Bukata1-0/+23
Add elfcore_grok_solaris_note function that enables to obtain process status, register values, and program info from Solaris's core files. bfd/ * elf.c (elfcore_grok_solaris_note): Solaris specific ELF note parser. Better GDB's coredump analysis on Solaris... (elfcore_grok_solaris_note_impl): New function. (elfcore_grok_solaris_prstatus): New function. (elfcore_grok_solaris_info): New function. (elfcore_grok_solaris_lwpstatus): New function. (elf_parse_notes): Added "CORE" groker element. include/ * elf/common.h: Add note segment constants for core files on Solaris systems.
2021-09-07Revert: [AArch64] MTE corefile supportLuis Machado1-6/+0
bfd * elf.c (elfcore_make_memtag_note_section): New function. (elfcore_grok_note): Handle NT_MEMTAG note types. binutils* readelf.c (get_note_type): Handle NT_MEMTAG note types. include * elf/common.h (NT_MEMTAG): New constant. (NT_MEMTAG_TYPE_AARCH_MTE): New constant.
2021-08-17PATCH [4/4] arm: Add Tag_PACRET_use build attributeAndrea Corallo1-0/+1
bfd/ 2021-07-06 Andrea Corallo <andrea.corallo@arm.com> * elf32-arm.c (elf32_arm_merge_eabi_attributes): Add 'Tag_PACRET_use' case. binutils/ 2021-07-06 Andrea Corallo <andrea.corallo@arm.com> * readelf.c (arm_attr_tag_PAC_extension): Declare. (arm_attr_public_tags): Add 'PAC_extension' lookup. elfcpp/ 2021-07-06 Andrea Corallo <andrea.corallo@arm.com> * arm.h: Define 'Tag_PACRET_use' enum. gas/ 2021-07-06 Andrea Corallo <andrea.corallo@arm.com> * config/tc-arm.c (arm_convert_symbolic_attribute): Add 'Tag_PACRET_use' to the attribute_table. include/ 2021-07-06 Andrea Corallo <andrea.corallo@arm.com> * elf/arm.h (elf_arm_reloc_type): Add 'Tag_PACRET_use'.
2021-08-17PATCH [3/4] arm: Add Tag_BTI_use build attributeAndrea Corallo1-0/+1
bfd/ 2021-07-06 Andrea Corallo <andrea.corallo@arm.com> * elf32-arm.c (elf32_arm_merge_eabi_attributes): Add 'Tag_BTI_use' case. binutils/ 2021-07-06 Andrea Corallo <andrea.corallo@arm.com> * readelf.c (arm_attr_tag_PAC_extension): Declare. (arm_attr_public_tags): Add 'PAC_extension' lookup. elfcpp/ 2021-07-06 Andrea Corallo <andrea.corallo@arm.com> * arm.h: Define 'Tag_BTI_use' enum. gas/ 2021-07-06 Andrea Corallo <andrea.corallo@arm.com> * config/tc-arm.c (arm_convert_symbolic_attribute): Add 'Tag_BTI_use' to the attribute_table. include/ 2021-07-06 Andrea Corallo <andrea.corallo@arm.com> * elf/arm.h (elf_arm_reloc_type): Add 'Tag_BTI_use'.
2021-08-17PATCH [2/4] arm: Add Tag_BTI_extension build attributeAndrea Corallo1-0/+1
bfd/ 2021-07-06 Andrea Corallo <andrea.corallo@arm.com> * elf32-arm.c (elf32_arm_merge_eabi_attributes): Add 'Tag_BTI_extension' case. binutils/ 2021-07-06 Andrea Corallo <andrea.corallo@arm.com> * readelf.c (arm_attr_tag_PAC_extension): Declare. (arm_attr_public_tags): Add 'PAC_extension' lookup. elfcpp/ 2021-07-06 Andrea Corallo <andrea.corallo@arm.com> * arm.h: Define 'Tag_BTI_extension' enum. gas/ 2021-07-06 Andrea Corallo <andrea.corallo@arm.com> * config/tc-arm.c (arm_convert_symbolic_attribute): Add 'Tag_BTI_extension' to the attribute_table. include/ 2021-07-06 Andrea Corallo <andrea.corallo@arm.com> * elf/arm.h (elf_arm_reloc_type): Add 'Tag_BTI_extension'.
2021-08-17PATCH [1/4] arm: Add Tag_PAC_extension build attributeAndrea Corallo1-0/+1
bfd/ 2021-07-06 Andrea Corallo <andrea.corallo@arm.com> * elf32-arm.c (elf32_arm_merge_eabi_attributes): Add 'Tag_PAC_extension' case. binutils/ 2021-07-06 Andrea Corallo <andrea.corallo@arm.com> * readelf.c (arm_attr_tag_PAC_extension): Declare. (arm_attr_public_tags): Add 'PAC_extension' lookup. elfcpp/ 2021-07-06 Andrea Corallo <andrea.corallo@arm.com> * arm.h: Define 'Tag_PAC_extension' enum. gas/ 2021-07-06 Andrea Corallo <andrea.corallo@arm.com> * config/tc-arm.c (arm_convert_symbolic_attribute): Add 'Tag_PAC_extension' to the attribute_table. include/ 2021-07-06 Andrea Corallo <andrea.corallo@arm.com> * elf/arm.h (elf_arm_reloc_type): Add 'Tag_PAC_extension'.
2021-08-11Add 3 new PAC-related ARM note typesLuis Machado1-0/+9
The following patch synchronizes includes/objdump/readelf with the Linux Kernel in terms of ARM regset notes. We're currently missing 3 of them: NT_ARM_PACA_KEYS NT_ARM_PACG_KEYS NT_ARM_PAC_ENABLED_KEYS We don't need GDB to bother with this at the moment, so this doesn't update bfd/elf.c. If needed, we can do it in the future. binutils/ * readelf.c (get_note_type): Handle new ARM PAC notes. include/elf/ * common.h (NT_ARM_PACA_KEYS, NT_ARM_PACG_KEYS) (NT_ARM_PAC_ENABLED_KEYS): New constants.
2021-07-08elf: Add GNU_PROPERTY_1_NEEDEDH.J. Lu1-0/+7
Add GNU_PROPERTY_1_NEEDED: #define GNU_PROPERTY_1_NEEDED GNU_PROPERTY_UINT32_OR_LO to indicate the needed properties by the object file. Add GNU_PROPERTY_1_NEEDED_INDIRECT_EXTERN_ACCESS: #define GNU_PROPERTY_1_NEEDED_INDIRECT_EXTERN_ACCESS (1U << 0) to indicate that the object file requires canonical function pointers and cannot be used with copy relocation. binutils/ * readelf.c (decode_1_needed): New. (print_gnu_property_note): Handle GNU_PROPERTY_1_NEEDED. include/ * elf/common.h (GNU_PROPERTY_1_NEEDED): New. (GNU_PROPERTY_1_NEEDED_INDIRECT_EXTERN_ACCESS): Likewise. ld/ * testsuite/ld-elf/property-1_needed-1a.d: New file. * testsuite/ld-elf/property-1_needed-1.s: Likewise.
2021-07-06RISC-V: Add PT_RISCV_ATTRIBUTES and add it to PHDR.Kito Cheng1-0/+5
We added PT_RISCV_ATTRIBUTES to program header to make .riscv.attribute easier to find in dynamic loader or kernel. Ref: https://github.com/riscv/riscv-elf-psabi-doc/pull/71 ChangeLog: bfd/ * elfnn-riscv.c(RISCV_ATTRIBUTES_SECTION_NAME): New. (riscv_elf_additional_program_headers): Ditto. (riscv_elf_modify_segment_map): Ditto. (elf_backend_additional_program_headers): Ditto. (elf_backend_modify_segment_map): Ditto. (elf_backend_obj_attrs_section): Use RISCV_ATTRIBUTES_SECTION_NAME rather than string literal. binutils/ * readelf.c(get_riscv_segment_type): New. (get_segment_type): Handle EM_RISCV. include/ * elf/riscv.h (PT_RISCV_ATTRIBUTES): New. * testsuite/ld-elf/orphan-region.ld: Discard .riscv.attributes section for simplify testcase. * testsuite/ld-riscv-elf/attr-phdr.d: New. * testsuite/ld-riscv-elf/attr-phdr.s: Ditto. * testsuite/ld-riscv-elf/ld-riscv-elf.exp: Add attr-phdr to testcase.
2021-06-18elf: Add GNU_PROPERTY_UINT32_AND_XXX/GNU_PROPERTY_UINT32_OR_XXXH.J. Lu1-0/+10
Implement GNU_PROPERTY_UINT32_AND_XXX/GNU_PROPERTY_UINT32_OR_XXX: https://sourceware.org/pipermail/gnu-gabi/2021q1/000467.html 1. GNU_PROPERTY_UINT32_AND_LO..GNU_PROPERTY_UINT32_AND_HI #define GNU_PROPERTY_UINT32_AND_LO 0xb0000000 #define GNU_PROPERTY_UINT32_AND_HI 0xb0007fff A bit in the output pr_data field is set only if it is set in all relocatable input pr_data fields. If all bits in the the output pr_data field are zero, this property should be removed from output. If the bit is 1, all input relocatables have the feature. If the bit is 0 or the property is missing, the info is unknown. 2. GNU_PROPERTY_UINT32_OR_LO..GNU_PROPERTY_UINT32_OR_HI #define GNU_PROPERTY_UINT32_OR_LO 0xb0008000 #define GNU_PROPERTY_UINT32_OR_HI 0xb000ffff A bit in the output pr_data field is set if it is set in any relocatable input pr_data fields. If all bits in the the output pr_data field are zero, this property should be removed from output. If the bit is 1, some input relocatables have the feature. If the bit is 0 or the property is missing, the info is unknown. bfd/ * elf-properties.c (_bfd_elf_parse_gnu_properties): Handle GNU_PROPERTY_UINT32_AND_LO, GNU_PROPERTY_UINT32_AND_HI, GNU_PROPERTY_UINT32_OR_LO and GNU_PROPERTY_UINT32_OR_HI. (elf_merge_gnu_properties): Likewise. binutils/ * readelf.c (print_gnu_property_note): Handle GNU_PROPERTY_UINT32_AND_LO, GNU_PROPERTY_UINT32_AND_HI, GNU_PROPERTY_UINT32_OR_LO and GNU_PROPERTY_UINT32_OR_HI. include/ * elf/common.h (GNU_PROPERTY_UINT32_AND_LO): New. (GNU_PROPERTY_UINT32_AND_HI): Likewise. (GNU_PROPERTY_UINT32_OR_LO): Likewise. (GNU_PROPERTY_UINT32_OR_HI): Likewise. ld/ * testsuite/ld-elf/property-and-1.d: New file. * testsuite/ld-elf/property-and-1.s: Likewise. * testsuite/ld-elf/property-and-2.d: Likewise. * testsuite/ld-elf/property-and-2.s: Likewise. * testsuite/ld-elf/property-and-3.d: Likewise. * testsuite/ld-elf/property-and-3.s: Likewise. * testsuite/ld-elf/property-and-4.d: Likewise. * testsuite/ld-elf/property-and-empty.s: Likewise. * testsuite/ld-elf/property-or-1.d: Likewise. * testsuite/ld-elf/property-or-1.s: Likewise. * testsuite/ld-elf/property-or-2.d: Likewise. * testsuite/ld-elf/property-or-2.s: Likewise. * testsuite/ld-elf/property-or-3.d: Likewise. * testsuite/ld-elf/property-or-3.s: Likewise. * testsuite/ld-elf/property-or-4.d: Likewise. * testsuite/ld-elf/property-or-empty.s: Likewise.
2021-06-15Allow readelf to recognise GO buildid notes.Nick Clifton1-0/+1
binutils * readelf.c (get_note_type): Add support for NT_GO_BUILDID. include * elf/common.h (NT_GO_BUILDID): Define.
2021-05-28x86: Restore PC16 relocation overflow checkH.J. Lu1-1/+0
The x86-64 psABI has --- A program or object file using R_X86_64_8, R_X86_64_16, R_X86_64_PC16 or R_X86_64_PC8 relocations is not conformant to this ABI, these relocations are only added for documentation purposes. --- Since x86 PC16 relocations have been used for 16-bit programs in an ELF32 or ELF64 container, PC16 relocation should wrap-around in 16-bit address space. Revert commit a7664973b24a242cd9ea17deb5eaf503065fc0bd Author: Jan Beulich <jbeulich@suse.com> Date: Mon Apr 26 10:41:35 2021 +0200 x86: correct overflow checking for 16-bit PC-relative relocs and xfail the related tests. Also revert commit 50c95a739c91ae70cf8481936611aa1f5397a384 Author: H.J. Lu <hjl.tools@gmail.com> Date: Wed May 26 12:13:13 2021 -0700 x86: Propery check PC16 reloc overflow in 16-bit mode instructions while keeping PR ld/27905 tests for PC16 relocation in 16-bit programs. bfd/ PR ld/27905 * elf32-i386.c: Don't include "libiberty.h". (elf_howto_table): Revert commits a7664973b24 and 50c95a739c9. (elf_i386_rtype_to_howto): Revert commit 50c95a739c9. (elf_i386_info_to_howto_rel): Likewise. (elf_i386_tls_transition): Likewise. (elf_i386_relocate_section): Likewise. * elf64-x86-64.c (x86_64_elf_howto_table): Revert commits a7664973b24 and 50c95a739c9. (elf_x86_64_rtype_to_howto): Revert commit 50c95a739c9. * elfxx-x86.c (_bfd_x86_elf_parse_gnu_properties): Likewise. * elfxx-x86.h (elf_x86_obj_tdata): Likewise. (elf_x86_has_code16): Likewise. binutils/ PR ld/27905 * readelf.c (decode_x86_feature_2): Revert commit 50c95a739c9. gas/ PR ld/27905 * config/tc-i386.c (set_code_flag): Revert commit 50c95a739c9. (set_16bit_gcc_code_flag): Likewise. (x86_cleanup): Likewise. * testsuite/gas/i386/code16-2.d: Updated. * testsuite/gas/i386/x86-64-code16-2.d: Likewise. include/ PR ld/27905 * elf/common.h (GNU_PROPERTY_X86_FEATURE_2_CODE16): Removed. ld/ PR ld/27905 * testsuite/ld-i386/pcrel16-2.d: xfail. * testsuite/ld-x86-64/pcrel16-2.d: Likewise.
2021-05-26x86: Propery check PC16 reloc overflow in 16-bit mode instructionsH.J. Lu1-0/+1
commit a7664973b24a242cd9ea17deb5eaf503065fc0bd Author: Jan Beulich <jbeulich@suse.com> Date: Mon Apr 26 10:41:35 2021 +0200 x86: correct overflow checking for 16-bit PC-relative relocs caused linker failure when building 16-bit program in a 32-bit ELF container. Update GNU_PROPERTY_X86_FEATURE_2_USED with #define GNU_PROPERTY_X86_FEATURE_2_CODE16 (1U << 12) to indicate that 16-bit mode instructions are used in the input object: https://groups.google.com/g/x86-64-abi/c/UvvXWeHIGMA to indicate that 16-bit mode instructions are used in the object to allow linker to properly perform relocation overflow check for 16-bit PC-relative relocations in 16-bit mode instructions. 1. Update x86 assembler to always generate the GNU property note with GNU_PROPERTY_X86_FEATURE_2_CODE16 for .code16 in ELF object. 2. Update i386 and x86-64 linkers to use 16-bit PC16 relocations if input object is marked with GNU_PROPERTY_X86_FEATURE_2_CODE16. bfd/ PR ld/27905 * elf32-i386.c: Include "libiberty.h". (elf_howto_table): Add 16-bit R_386_PC16 entry. (elf_i386_rtype_to_howto): Add a BFD argument. Use 16-bit R_386_PC16 if input has 16-bit mode instructions. (elf_i386_info_to_howto_rel): Update elf_i386_rtype_to_howto call. (elf_i386_tls_transition): Likewise. (elf_i386_relocate_section): Likewise. * elf64-x86-64.c (x86_64_elf_howto_table): Add 16-bit R_X86_64_PC16 entry. (elf_x86_64_rtype_to_howto): Use 16-bit R_X86_64_PC16 if input has 16-bit mode instructions. * elfxx-x86.c (_bfd_x86_elf_parse_gnu_properties): Set elf_x86_has_code16 if relocatable input is marked with GNU_PROPERTY_X86_FEATURE_2_CODE16. * elfxx-x86.h (elf_x86_obj_tdata): Add has_code16. (elf_x86_has_code16): New. binutils/ PR ld/27905 * readelf.c (decode_x86_feature_2): Support GNU_PROPERTY_X86_FEATURE_2_CODE16. gas/ PR ld/27905 * config/tc-i386.c (set_code_flag): Update x86_feature_2_used with GNU_PROPERTY_X86_FEATURE_2_CODE16 for .code16 in ELF object. (set_16bit_gcc_code_flag): Likewise. (x86_cleanup): Always generate the GNU property note if x86_feature_2_used isn't 0. * testsuite/gas/i386/code16-2.d: New file. * testsuite/gas/i386/code16-2.s: Likewise. * testsuite/gas/i386/x86-64-code16-2.d: Likewise. * testsuite/gas/i386/i386.exp: Run code16-2 and x86-64-code16-2. include/ PR ld/27905 * elf/common.h (GNU_PROPERTY_X86_FEATURE_2_CODE16): New. ld/ PR ld/27905 * testsuite/ld-i386/code16.d: New file. * testsuite/ld-i386/code16.t: Likewise. * testsuite/ld-x86-64/code16.d: Likewise. * testsuite/ld-x86-64/code16.t: Likewise. * testsuite/ld-i386/i386.exp: Run code16. * testsuite/ld-x86-64/x86-64.exp: Likewise.
2021-05-23elf: Use official name LoongArch for EM_LOONGARCH.Chenghua Xu1-1/+1
The official name for Loongson Architecture is LoongArch, it is better to use LoongArch instead of Loongson Loongarch for EM_LOONGARCH to avoid confusion and keep consistent with the various of software in the future. The official documentation in Chinese: http://www.loongson.cn/uploadfile/cpu/LoongArch.pdf The translated version in English: https://loongson.github.io/LoongArch-Documentation/ binutils/ * readelf.c (get_machine_name): Change Loongson Loongarch to LoongArch. include/ * elf/common.h (EM_LOONGARCH): Change Loongson Loongarch to LoongArch.
2021-05-21[AArch64] MTE corefile supportLuis Machado1-0/+6
bfd * elf.c (elfcore_make_memtag_note_section): New function. (elfcore_grok_note): Handle NT_MEMTAG note types. binutils* readelf.c (get_note_type): Handle NT_MEMTAG note types. include * elf/common.h (NT_MEMTAG): New constant. (NT_MEMTAG_TYPE_AARCH_MTE): New constant.
2021-05-06or1k: Implement relocation R_OR1K_GOT_AHI16 for gotha()Stafford Horne1-0/+1
The gotha() relocation mnemonic will be outputted by OpenRISC GCC when using the -mcmodel=large option. This relocation is used along with got() to generate 32-bit GOT offsets. This increases the previous GOT offset limit from the previous 16-bit (64K) limit. This is needed on large binaries where the GOT grows larger than 64k. bfd/ChangeLog: PR 21464 * bfd-in2.h: Add BFD_RELOC_OR1K_GOT_AHI16 relocation. * elf32-or1k.c (or1k_elf_howto_table, or1k_reloc_map): Likewise. (or1k_final_link_relocate, or1k_elf_relocate_section, or1k_elf_check_relocs): Likewise. * libbfd.h (bfd_reloc_code_real_names): Likewise. * reloc.c: Likewise. cpu/ChangeLog: PR 21464 * or1k.opc (or1k_imm16_relocs, parse_reloc): Define parse logic for gotha() relocation. include/ChangeLog: PR 21464 * elf/or1k.h (elf_or1k_reloc_type): Define R_OR1K_GOT_AHI16 number. opcodes/ChangeLog: PR 21464 * or1k-asm.c: Regenerate. gas/ChangeLog: PR 21464 * testsuite/gas/or1k/reloc-1.s: Add test for new relocation. * testsuite/gas/or1k/reloc-1.d: Add test result for new relocation. Cc: Giulio Benetti <giulio.benetti@benettiengineering.com> fixup reloc, add tests
2021-03-31Use bool in includeAlan Modra2-4/+4
* bfdlink.h: Replace bfd_boolean with bool throughout. * coff/ecoff.h: Likewise. * coff/xcoff.h: Likewise. * dis-asm.h: Likewise. * elf/mmix.h: Likewise. * elf/xtensa.h: Likewise. * opcode/aarch64.h: Likewise, and FALSE with false, TRUE with true. * opcode/arc.h: Likewise. * opcode/mips.h: Likewise. * opcode/tic6x-opcode-table.h: Likewise. * opcode/tic6x.h: Likewise.
2021-03-31Remove bfd_stdint.hAlan Modra1-1/+1
If we require C99 for binutils then stdint.h is available. bfd/ * .gitignore: Delete bfd_stdint.h entry. * Makefile.am (bfdinclude_HEADERS): Delete bfd_stdint.h. (BUILD_HFILES, LOCAL_H_DEPS): Likewise. * bfd-in.h: Include stdint.h in place of bfd_stdint.h. * configure.ac: Don't invoke GCC_HEADER_STDINT. * configure.com: Don't create bfd_stdint.h. * Makefile.in: Regenerate. * aclocal.m4: Regenerate. * bfd-in2.h: Regenerate. * config.in: Regenerate. * configure: Regenerate. * doc/Makefile.in: Regenerate. * po/BLD-POTFILES.in: Regenerate. binutils/ * coffdump.c: Include stdint.h in place of bfd_stdint.h. * dwarf.c: Likewise. gas/ * config/tc-aarch64.c: Include stdint.h in place of bfd_stdint.h. * config/tc-crx.c: Likewise. * config/tc-nds32.h: Likewise. include/ * cgen/basic-modes.h: Include stdint.h in place of bfd_stdint.h. * elf/nfp.h: Likewise. * opcode/aarch64.h: Likewise. * opcode/cgen.h: Likewise. * opcode/nfp.h: Likewise. * opcode/ppc.h: Likewise. ld/ * elf-hints-local.h: Include stdint.h in place of bfd_stdint.h. * emultempl/nds32elf.em: Likewise. * testsuite/ld-elf/mbind2b.c: Likewise. * testsuite/ld-elf/pr18718.c: Likewise. * testsuite/ld-elf/pr18720a.c: Likewise. * testsuite/ld-elf/pr25749-1.c: Likewise. * testsuite/ld-elf/pr25749-1a.c: Likewise. * testsuite/ld-elf/pr25749-1b.c: Likewise. * testsuite/ld-elf/pr25749-1c.c: Likewise. * testsuite/ld-elf/pr25749-1d.c: Likewise. * testsuite/ld-elf/pr25749-2.c: Likewise. * testsuite/ld-elf/pr25754-1a.c: Likewise. * testsuite/ld-elf/pr25754-2a.c: Likewise. * testsuite/ld-elf/pr25754-3a.c: Likewise. * testsuite/ld-elf/pr25754-4a.c: Likewise. * testsuite/ld-elf/pr25754-5a.c: Likewise. * testsuite/ld-elf/pr25754-6a.c: Likewise. opcodes/ * aarch64-dis.c: Include stdint.h in place of bfd_stdint.h. * aarch64-dis.h: Likewise. * aarch64-opc.c: Likewise. * avr-dis.c: Likewise. * csky-dis.c: Likewise. * nds32-asm.c: Likewise. * nds32-dis.c: Likewise. * nfp-dis.c: Likewise. * riscv-dis.c: Likewise. * s12z-dis.c: Likewise. * wasm32-dis.c: Likewise.
2021-03-24AArch64: Add MTE register set support for GDB and gdbserverLuis Machado1-0/+3
AArch64 MTE support in the Linux kernel exposes a new register through ptrace. This patch adds the required code to support it. include/ChangeLog: 2021-03-24 Luis Machado <luis.machado@linaro.org> * elf/common.h (NT_ARM_TAGGED_ADDR_CTRL): Define. gdb/ChangeLog: 2021-03-24 Luis Machado <luis.machado@linaro.org> * aarch64-linux-nat.c (fetch_mteregs_from_thread): New function. (store_mteregs_to_thread): New function. (aarch64_linux_nat_target::fetch_registers): Update to call fetch_mteregs_from_thread. (aarch64_linux_nat_target::store_registers): Update to call store_mteregs_to_thread. * aarch64-tdep.c (aarch64_mte_register_names): New struct. (aarch64_cannot_store_register): Handle MTE registers. (aarch64_gdbarch_init): Initialize and setup MTE registers. * aarch64-tdep.h (gdbarch_tdep) <mte_reg_base>: New field. <has_mte>: New method. * arch/aarch64-linux.h (AARCH64_LINUX_SIZEOF_MTE): Define. gdbserver/ChangeLog: 2021-03-24 Luis Machado <luis.machado@linaro.org> * linux-aarch64-low.cc (aarch64_fill_mteregset): New function. (aarch64_store_mteregset): New function. (aarch64_regsets): Add MTE register set entry. (aarch64_sve_regsets): Add MTE register set entry.
2021-03-19elf: Rename EM_INTEL205 to EM_INTELGTH.J. Lu1-1/+1
Rename EM_INTEL205 to EM_INTELGT for Intel Graphics Technology. binutils/ * readelf.c (get_machine_name): Add EM_INTELGT. include/ * elf/common.h (EM_INTEL205): Renamed to ... (EM_INTELGT): This.
2021-03-12Add values for NetBSD .note.netbsd.ident notes (PaX).Frederic Cambus1-0/+9
* elf/common.h (NT_NETBSD_PAX, NT_NETBSD_PAX_MPROTECT) (NT_NETBSD_PAX_NOMPROTECT, NT_NETBSD_PAX_GUARD, NT_NETBSD_PAX_NOGUARD) (NT_NETBSD_PAX_ASLR, NT_NETBSD_PAX_NOASLR): Define.
2021-03-05bfd/binutils: add support for RISC-V CSRs in core filesAndrew Burgess1-0/+2
Adds support for including RISC-V control and status registers into core files. The value for the define NT_RISCV_CSR is set to 0x900, this corresponds to a patch I have proposed for the Linux kernel here: http://lists.infradead.org/pipermail/linux-riscv/2020-December/003910.html As I have not yet heard if the above patch will be accepted into the kernel or not I have set the note name string to "GDB", and the note type to NT_RISCV_CSR. This means that if the above patch is rejected from the kernel, and the note type number 0x900 is assigned to some other note type, we will still be able to distinguish between the GDB produced NT_RISCV_CSR, and the kernel produced notes, where the name would be set to "CORE". bfd/ChangeLog: * elf-bfd.h (elfcore_write_riscv_csr): Declare. * elf.c (elfcore_grok_riscv_csr): New function. (elfcore_grok_note): Handle NT_RISCV_CSR. (elfcore_write_riscv_csr): New function. (elfcore_write_register_note): Handle '.reg-riscv-csr'. binutils/ChangeLog: * readelf.c (get_note_type): Handle NT_RISCV_CSR. include/ChangeLog: * elf/common.h (NT_RISCV_CSR): Define.
2021-03-05bfd/binutils: support for gdb target descriptions in the core fileAndrew Burgess1-0/+4
This commit lays the ground work for allowing GDB to write its target description into a generated core file. The goal of this work is to allow a user to connect to a remote target, capture a core file from within GDB, then pass the executable and core file to another user and have the user be able to examine the state of the machine without needing to connect to a running target. Different remote targets can have different register sets and this information is communicated from the target to GDB in the target description. It is possible for a user to extract the target description from GDB and pass this along with the core file so that when the core file is used the target description can be fed back into GDB, however this is not a great user experience. It would be nicer, I think, if GDB could write the target description directly into the core file, and then make use of this description when loading a core file. This commit performs the binutils/bfd side of this task, adding the boiler plate functions to access the target description from within a core file note, and reserving a new number for a note containing the target description. Later commits will extend GDB to make use of this. The new note is given the name 'GDB' and a type NT_GDB_TDESC. This should hopefully protect us if there's ever a reuse of the number assigned to NT_GDB_TDESC by some other core file producer. It should also, hopefully, make it clearer to users that this note carries GDB specific information. bfd/ChangeLog: * elf-bfd.h (elfcore_write_gdb_tdesc): Declare new function. * elf.c (elfcore_grok_gdb_tdesc): New function. (elfcore_grok_note): Handle NT_GDB_TDESC. (elfcore_write_gdb_tdesc): New function. (elfcore_write_register_note): Handle NT_GDB_TDESC. binutils/ChangeLog: * readelf.c (get_note_type): Handle NT_GDB_TDESC. include/ChangeLog: * elf/common.h (NT_GDB_TDESC): Define.
2021-01-15RISC-V: Comments tidy and improvement.Nelson Chu1-2/+1
The GNU coding standards said the comments should be complete sentences and end with a period and two spaces. But sometimes it should be more cleaner when the comments only include a word or codes. Therefore, I made the following changes after referring to other target/generic codes, * Try to write sentences in comments, must end with a period and two spaces. * End with two spaces without a period for codes/instructions only. * End with one space without a period for a single word/variable only. Besids, also rewrite/remove some comments which are obsolete or too long, and fix indents for comments. bfd/ * elfnn-riscv.c: Comments tidy and improvement. * elfxx-riscv.c: Likewise. * elfxx-riscv.h: Likewise. gas/ * config/tc-riscv.c: Comments tidy and improvement. Also update comment "fallthru" to "Fall through" that end with a period and two spaces. include/ * elf/riscv.h: Comments tidy and improvement. * opcode/riscv-opc.h: Likewise. * opcode/riscv.h: Likewise. opcodes/ * riscv-dis.c: Comments tidy and improvement. * riscv-opc.c: Likewise.
2021-01-01Update year range in copyright notice of binutils filesAlan Modra82-82/+82
2020-12-23x86-64: Add Intel LAM property supportH.J. Lu1-0/+2
Add Intel Linear Address Masking (LAM) property support. LAM modifies the checking that is applied to 64-bit linear addresses, allowing software to use of the untranslated address bits for metadata. bfd/ * elf-linker-x86.h (elf_x86_cet_report): Renamed to ... (elf_x86_prop_report): This. (elf_linker_x86_params): Add lam_u48, lam_u57, lam_u48_report and lam_u57_report. * elfxx-x86.c (_bfd_x86_elf_link_setup_gnu_properties): Support GNU_PROPERTY_X86_FEATURE_1_LAM_U48 and GNU_PROPERTY_X86_FEATURE_1_LAM_U57. (_bfd_x86_elf_link_fixup_gnu_properties): Keep LAM features only for 64-bit output. binutils/ * NEWS: Mention LAM_U48 and LAM_U57 support. * elfedit.c (elf_x86_feature): Support lam_u48 and lam_u57. (usage): Add lam_u48 and lam_u57. * readelf.c (decode_x86_feature_1): Support LAM_U48 and LAM_U57. * doc/binutils.texi: Update elfedit with lam_u48 and lam_u57 support. * testsuite/binutils-all/x86-64/lam-u48.d: New file. * testsuite/binutils-all/x86-64/lam-u48.s: Likewise. * testsuite/binutils-all/x86-64/lam-u57.d: Likewise. * testsuite/binutils-all/x86-64/lam-u57.s: Likewise. include/ * elf/common.h (GNU_PROPERTY_X86_FEATURE_1_LAM_U48): New. (GNU_PROPERTY_X86_FEATURE_1_LAM_U57): Likewise. ld/ * NEWS: Mention LAM_U48 and LAM_U57 support. * ld.texi: Document LAM_U48 and LAM_U57 support. * emulparams/cet.sh: Updated. * emulparams/elf_x86_64.sh: Source x86-64-lam.sh. * emulparams/x86-64-lam.sh: New file. * testsuite/ld-x86-64/property-x86-lam-u48-1a.d: Likewise. * testsuite/ld-x86-64/property-x86-lam-u48-1b.d: Likewise. * testsuite/ld-x86-64/property-x86-lam-u48-2.d: Likewise. * testsuite/ld-x86-64/property-x86-lam-u48-3a.d: Likewise. * testsuite/ld-x86-64/property-x86-lam-u48-3b.d: Likewise. * testsuite/ld-x86-64/property-x86-lam-u48-4.d: Likewise. * testsuite/ld-x86-64/property-x86-lam-u48-5.d: Likewise. * testsuite/ld-x86-64/property-x86-lam-u48.s: Likewise. * testsuite/ld-x86-64/property-x86-lam-u57-1a.d: Likewise. * testsuite/ld-x86-64/property-x86-lam-u57-1b.d: Likewise. * testsuite/ld-x86-64/property-x86-lam-u57-2.d: Likewise. * testsuite/ld-x86-64/property-x86-lam-u57-3a.d: Likewise. * testsuite/ld-x86-64/property-x86-lam-u57-3b.d: Likewise. * testsuite/ld-x86-64/property-x86-lam-u57-4.d: Likewise. * testsuite/ld-x86-64/property-x86-lam-u57-5.d: Likewise. * testsuite/ld-x86-64/property-x86-lam-u57.s: Likewise. * testsuite/ld-x86-64/x86-64.exp: Run LAM tests.
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