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2007-01-08bfd/Kazu Hirata2-7/+9
* archures.c (bfd_mach_cpu32_fido): Rename to bfd_mach_fido. * bfd-in2.h: Regenerate. * cpu-m68k.c (arch_info_struct): Use bfd_mach_fido instead of bfd_mach_cpu32_fido. (m68k_arch_features): Use fido_a instead of cpu32. (bfd_m68k_compatible): Reject the combination of Fido and ColdFire. Accept the combination of CPU32 and Fido with a warning. * elf32-m68k.c (elf32_m68k_object_p, elf32_m68k_merge_private_bfd_data, elf32_m68k_print_private_bfd_data): Treat Fido as an architecture by itself. binutils/ * readelf.c (get_machine_flags): Treat Fido as an architecture by itself. gas/ * config/tc-m68k.c (m68k_archs, m68k_cpus): Treat Fido as an architecture by itself. (m68k_ip): Don't issue a warning for tbl instructions on fido. (m68k_elf_final_processing): Treat Fido as an architecture by itself. include/elf/ * m68k.h (EF_M68K_FIDO): New. (EF_M68K_ARCH_MASK): OR EF_M68K_FIDO. (EF_M68K_CPU32_FIDO_A, EF_M68K_CPU32_MASK): Remove. include/opcode/ * m68k.h (m68010up): OR fido_a. opcodes/ * m68k-opc.c (m68k_opcodes): Replace cpu32 with cpu32 | fido_a except on tbl instructions.
2006-12-25bfd/Kazu Hirata2-0/+10
* archures.c (bfd_mach_cpu32_fido): New. (bfd_mach_mcf_isa_a_nodiv, bfd_mach_mcf_isa_a, bfd_mach_mcf_isa_a_mac, bfd_mach_mcf_isa_a_emac, bfd_mach_mcf_isa_aplus, bfd_mach_mcf_isa_aplus_mac, bfd_mach_mcf_isa_aplus_emac, bfd_mach_mcf_isa_b_nousp, bfd_mach_mcf_isa_b_nousp_mac, bfd_mach_mcf_isa_b_nousp_emac, bfd_mach_mcf_isa_b, bfd_mach_mcf_isa_b_mac, bfd_mach_mcf_isa_b_emac, bfd_mach_mcf_isa_b_float, bfd_mach_mcf_isa_b_float_mac, bfd_mach_mcf_isa_b_float_emac): Increment the defined values. * bfd-in2.h: Regenerate. * cpu-m68k.c (arch_info_struct): Add en entry for bfd_mach_cpu32_fido. * elf32-m68k.c (elf32_m68k_object_p): Handle EF_M68K_CPU32_FIDO_A. (elf32_m68k_merge_private_bfd_data): Use EF_M68K_CPU32_MASK. (elf32_m68k_print_private_bfd_data): Handle EF_M68K_CPU32_FIDO_A. binutils/ * readelf.c (get_machine_flags): Handle EF_M68K_CPU32_FIDO_A. gas/ * config/tc-m68k.c (cpu_of_arch): Add fido. (m68k_archs, m68k_cpu): Add entries for fido. (m68k_elf_final_processing): Handle EF_M68K_CPU32_FIDO_A. include/elf/ * m68k.h (EF_M68K_CPU32_FIDO_A, EF_M68K_CPU32_MASK): New. include/opcode/ * m68k.h (fido_a): New.
2006-12-19bfd/Kazu Hirata2-1/+9
* elf32-m68k.c (elf32_m68k_object_p, elf32_m68k_print_private_bfd_data): Use EF_M68K_ARCH_MASK to extract architecture mask. include/elf/ * m68k.h (EF_M68K_ARCH_MASK): New.
2006-12-19 bfd/Nathan Sidwell2-0/+6
* elf.c (assign_file_positions_for_load_sections): Adjust p_vaddr by p_vaddr_offset. Copy alignment & use if it is valid. (rewrite_elf_program_headers): Cope with leading padding in a segment that does not contain file or program headers. (copy_elf_program_header): Likewise. include/elf/ * internal.h (struct elf_segment_map): Add p_vaddr_offset field.
2006-12-07bfd/Kazu Hirata2-12/+24
* elf32-m68k.c: Update uses of EF_M68K_*. binutils/ * readelf.c: Update uses of EF_M68K_*. gas/ * config/tc-m68k.c: Update uses of EF_M68K_*. include/elf * m68k.h (EF_M68K_ISA_MASK, EF_M68K_ISA_A_NODIV, EF_M68K_ISA_A, EF_M68K_ISA_A_PLUS, EF_M68K_ISA_B_NOUSP, EF_M68K_ISA_B, EF_M68K_ISA_C, EF_M68K_MAC_MASK, EF_M68K_MAC, EF_M68K_EMAC, EF_M68K_EMAC_B, EF_M68K_FLOAT): Rename to EF_M68K_CF_ISA_MASK, EF_M68K_CF_ISA_A_NODIV, EF_M68K_CF_ISA_A, EF_M68K_CF_ISA_A_PLUS, EF_M68K_CF_ISA_B_NOUSP, EF_M68K_CF_ISA_B, EF_M68K_CF_ISA_C, EF_M68K_CF_MAC_MASK, EF_M68K_CF_MAC, EF_M68K_CF_EMAC, EF_M68K_CF_EMAC_B, EF_M68K_CF_FLOAT, respectively.
2006-12-06Define ATTRIBUTE_PACKED and use as necessary.Nick Clifton2-5/+6
2006-10-28include/elf/Richard Sandiford2-1/+7
* mips.h (R_MIPS_GLOB_DAT): Define (R_MIPS_max): Bump by 1. bfd/ * elf32-mips.c (elf_mips_howto_table_rel): Add R_MIPS_GLOB_DAT. * elfn32-mips.c (elf_mips_howto_table_rel): Likewise. (elf_mips_howto_table_rela): Likewise. * elf64-mips.c (mips_elf64_howto_table_rel): Likewise. (mips_elf64_howto_table_rela): Likewise.
2006-10-25New Cell SPU port.Alan Modra3-0/+67
2006-10-19Fix score bugsNick Clifton2-10/+15
2006-10-17 bfd/Mark Shinwell1-0/+13
* elf32-arm.c (elf32_arm_howto_table_1): Change offset for R_THM_CALL to 25 and remove FIXME comment. (using_thumb2): New function. (elf32_arm_final_link_relocate): Cope with Thumb-2 BL encoding. include/ * elf/arm.h: Define TAG_CPU_ARCH_* constants. ld/testsuite/ * ld-arm/arm-elf.exp: Add thumb1-bl, thumb2-bl, thumb2-bl-as-thumb1-bad and thumb2-bl-bad tests. * ld-arm/thumb1-bl.d: New. * ld-arm/thumb1-bl.s: New. * ld-arm/thumb2-bl-as-thumb1-bad.d: New. * ld-arm/thumb2-bl-as-thumb1-bad.s: New. * ld-arm/thumb2-bl-bad.d: New. * ld-arm/thumb2-bl-bad.s: New. * ld-arm/thumb2-bl.d: New. * ld-arm/thumb2-bl.s: New.
2006-09-16Add support for Score target.Nick Clifton3-0/+130
2006-07-10include/Jakub Jelinek2-0/+6
* bfdlink.h (struct bfd_link_info): Add emit_hash and emit_gnu_hash bitfields. include/elf/ * common.h (SHT_GNU_HASH, DT_GNU_HASH): Define. ld/ * scripttempl/elf.sc: Add .gnu.hash section. * emultempl/elf32.em (OPTION_HASH_STYLE): Define. (gld${EMULATION_NAME}_add_options): Register --hash-style option. (gld${EMULATION_NAME}_handle_option): Handle it. (gld${EMULATION_NAME}_list_options): Document it. * ldmain.c (main): Initialize emit_hash and emit_gnu_hash. * ld.texinfo: Document --hash-style option. bfd/ * elf.c (_bfd_elf_print_private_bfd_data): Handle DT_GNU_HASH. (bfd_section_from_shdr, elf_fake_sections, assign_section_numbers): Handle SHT_GNU_HASH. (special_sections_g): Include .gnu.hash section. (bfd_elf_gnu_hash): New function. * elf-bfd.h (bfd_elf_gnu_hash, _bfd_elf_hash_symbol): New prototypes. (struct elf_backend_data): Add elf_hash_symbol method. * elflink.c (_bfd_elf_link_create_dynamic_sections): Create .hash only if info->emit_hash, create .gnu.hash section if info->emit_gnu_hash. (struct collect_gnu_hash_codes): New type. (elf_collect_gnu_hash_codes, elf_renumber_gnu_hash_syms, _bfd_elf_hash_symbol): New functions. (compute_bucket_count): Don't compute HASHCODES array, instead add that and NSYMS as arguments. Use bed->s->sizeof_hash_entry instead of bed->s->arch_size / 8. Fix .hash size estimation. When not optimizing, use the number of hashed symbols rather than dynsymcount. (bfd_elf_size_dynamic_sections): Only add DT_HASH if info->emit_hash, and ADD DT_GNU_HASH if info->emit_gnu_hash. (bfd_elf_size_dynsym_hash_dynstr): Size .hash only if info->emit_hash, adjust compute_bucket_count caller. Create and populate .gnu.hash section if info->emit_gnu_hash. (elf_link_output_extsym): Only populate .hash section if finfo->hash_sec != NULL. (bfd_elf_final_link): Adjust assertion. Handle DT_GNU_HASH. * elfxx-target.h (elf_backend_hash_symbol): Define if not yet defined. (elfNN_bed): Add elf_backend_hash_symbol. * elf64-x86-64.c (elf64_x86_64_hash_symbol): New function. (elf_backend_hash_symbol): Define. * elf32-i386.c (elf_i386_hash_symbol): New function. (elf_backend_hash_symbol): Define. binutils/ * readelf.c (get_dynamic_type): Handle DT_GNU_HASH. (get_section_type_name): Handle SHT_GNU_HASH. (dynamic_info_DT_GNU_HASH): New variable. (process_dynamic_section): Handle DT_GNU_HASH. (process_symbol_table): Print also DT_GNU_HASH histogram. ld/testsuite/ * ld-powerpc/tlsso32.r: Adjust. * ld-powerpc/tlsso32.d: Adjust. * ld-powerpc/tlsso32.g: Adjust. * ld-powerpc/tlsso.r: Adjust. * ld-powerpc/tlsso.g: Adjust. * ld-powerpc/tlstocso.g: Adjust.
2006-06-15 * include/elf/arm.h: Correct names of R_ARM_LDC_G{0,1,2}Mark Shinwell1-4/+3
to R_ARM_LDC_SB_G{0,1,2} respectively. bfd/ * bfd-in2.h: Regenerate. * elf32-arm.c (R_ARM_ALU_PC_G0_NC, R_ARM_ALU_PC_G0, R_ARM_ALU_PC_G1_NC, R_ARM_ALU_PC_G1, R_ARM_ALU_PC_G2, R_ARM_LDR_PC_G1, R_ARM_LDR_PC_G2, R_ARM_LDRS_PC_G0, R_ARM_LDRS_PC_G1, R_ARM_LDRS_PC_G2, R_ARM_LDC_PC_G0, R_ARM_LDC_PC_G1, R_ARM_LDC_PC_G2, R_ARM_ALU_SB_G0_NC, R_ARM_ALU_SB_G0, R_ARM_ALU_SB_G1_NC, R_ARM_ALU_SB_G1, R_ARM_ALU_SB_G2, R_ARM_LDR_SB_G0, R_ARM_LDR_SB_G1, R_ARM_LDR_SB_G2, R_ARM_LDRS_SB_G0, R_ARM_LDRS_SB_G1, R_ARM_LDRS_SB_G2, R_ARM_LDC_SB_G0, R_ARM_LDC_SB_G1, R_ARM_LDC_SB_G2): New relocation types. (R_ARM_PC13): Rename to AAELF name R_ARM_LDR_PC_G0 and adjust HOWTO entry to be consistent with R_ARM_LDR_PC_G1 and friends. (elf32_arm_howto_table_3): Delete; contents merged into elf32_arm_howto_table_2. (elf32_arm_howto_from_type): Adjust correspondingly. (elf32_arm_reloc_map): Extend with the above relocations. (calculate_group_reloc_mask): New function. (identify_add_or_sub): New function. (elf32_arm_final_link_relocate): Support for the above relocations. * reloc.c: Add enumeration entries for BFD_RELOC_ARM_... codes to correspond to the above relocations. gas/ * config/tc-arm.c (enum parse_operand_result): New. (struct group_reloc_table_entry): New. (enum group_reloc_type): New. (group_reloc_table): New array. (find_group_reloc_table_entry): New function. (parse_shifter_operand_group_reloc): New function. (parse_address_main): New function, incorporating code from the old parse_address function. To be used via... (parse_address): wrapper for parse_address_main; and (parse_address_group_reloc): new function, likewise. (enum operand_parse_code): New codes OP_SHG, OP_ADDRGLDR, OP_ADDRGLDRS, OP_ADDRGLDC. (parse_operands): Support for these new operand codes. New macro po_misc_or_fail_no_backtrack. (encode_arm_cp_address): Preserve group relocations. (insns): Modify to use the above operand codes where group relocations are permitted. (md_apply_fix): Handle the group relocations ALU_PC_G0_NC through LDC_SB_G2. (tc_gen_reloc): Likewise. (arm_force_relocation): Leave group relocations for the linker. (arm_fix_adjustable): Likewise. gas/testsuite/ * gas/arm/group-reloc-alu.d: New test. * gas/arm/group-reloc-alu-encoding-bad.d: New test. * gas/arm/group-reloc-alu-encoding-bad.l: New test. * gas/arm/group-reloc-alu-encoding-bad.s: New test. * gas/arm/group-reloc-alu-parsing-bad.d: New test. * gas/arm/group-reloc-alu-parsing-bad.l: New test. * gas/arm/group-reloc-alu-parsing-bad.s: New test. * gas/arm/group-reloc-alu.s: New test. * gas/arm/group-reloc-ldc.d: New test. * gas/arm/group-reloc-ldc-encoding-bad.d: New test. * gas/arm/group-reloc-ldc-encoding-bad.l: New test. * gas/arm/group-reloc-ldc-encoding-bad.s: New test. * gas/arm/group-reloc-ldc-parsing-bad.d: New test. * gas/arm/group-reloc-ldc-parsing-bad.l: New test. * gas/arm/group-reloc-ldc-parsing-bad.s: New test. * gas/arm/group-reloc-ldc.s: New test. * gas/arm/group-reloc-ldr.d: New test. * gas/arm/group-reloc-ldr-encoding-bad.d: New test. * gas/arm/group-reloc-ldr-encoding-bad.l: New test. * gas/arm/group-reloc-ldr-encoding-bad.s: New test. * gas/arm/group-reloc-ldr-parsing-bad.d: New test. * gas/arm/group-reloc-ldr-parsing-bad.l: New test. * gas/arm/group-reloc-ldr-parsing-bad.s: New test. * gas/arm/group-reloc-ldr.s: New test. * gas/arm/group-reloc-ldrs.d: New test. * gas/arm/group-reloc-ldrs-encoding-bad.d: New test. * gas/arm/group-reloc-ldrs-encoding-bad.l: New test. * gas/arm/group-reloc-ldrs-encoding-bad.s: New test. * gas/arm/group-reloc-ldrs-parsing-bad.d: New test. * gas/arm/group-reloc-ldrs-parsing-bad.l: New test. * gas/arm/group-reloc-ldrs-parsing-bad.s: New test. * gas/arm/group-reloc-ldrs.s: New test. ld/testsuite/ * ld-arm/group-relocs-alu-bad.d: New test. * ld-arm/group-relocs-alu-bad.s: New test. * ld-arm/group-relocs.d: New test. * ld-arm/group-relocs-ldc-bad.d: New test. * ld-arm/group-relocs-ldc-bad.s: New test. * ld-arm/group-relocs-ldr-bad.d: New test. * ld-arm/group-relocs-ldr-bad.s: New test. * ld-arm/group-relocs-ldrs-bad.d: New test. * ld-arm/group-relocs-ldrs-bad.s: New test. * ld-arm/group-relocs.s: New test. * ld-arm/arm-elf.exp: Wire in new tests.
2006-06-01include/elf/H.J. Lu2-15/+35
2006-05-31 H.J. Lu <hongjiu.lu@intel.com> * internal.h (ELF_SECTION_SIZE): New. (ELF_IS_SECTION_IN_SEGMENT): Likewise. (ELF_IS_SECTION_IN_SEGMENT_FILE): Updated. (ELF_IS_SECTION_IN_SEGMENT_MEMORY): Likewise. ld/testsuite/ 2006-05-31 H.J. Lu <hongjiu.lu@intel.com> * ld-elf/binutils.exp: Make it Linux only. (strip_test): Renamed to binutils_test. Check for unsupported options. Add more tests. * ld-elf/commonpage1.d: Make it Linux only. * ld-elf/maxpage1.d: Likewise. * ld-elf/maxpage1.s: Add main, start and __start. * ld-elf/maxpage2.d: New file. * ld-elf/tbss1.s: Likewise. * ld-elf/tbss2.s: Likewise. * ld-elf/tdata1.s: Likewise. * ld-elf/tdata2.s: Likewise.
2006-05-27bfd/Alan Modra2-1/+10
* elf.c (assign_file_positions_for_load_sections): Retrieve maxpagesize from m->p_align if it is valid. Set p_vaddr, p_paddr and p_align earlier. Revert 2006-05-19 change to p_align. (copy_elf_program_header): Copy p_align. Set p_align_valid. include/elf/ * internal.h (elf_segment_map): Add p_align and p_align_valid.
2006-05-24Add TLS support for hppa-linuxNick Clifton2-15/+46
2006-05-24Add support for AVR6 familyNick Clifton2-1/+8
2006-03-25 * elf/bfin.h (R_BFIN_GOT17M4, R_BFIN_GOTHI, R_BFIN_GOTLO,Bernd Schmidt1-0/+20
R_BFIN_FUNCDESC, R_BFIN_FUNCDESC_GOT17M4, R_BFIN_FUNCDESC_GOTHI, R_BFIN_FUNCDESC_GOTLO, R_BFIN_FUNCDESC_VALUE, R_BFIN_FUNCDESC_GOTOFF17M4, R_BFIN_FUNCDESC_GOTOFFHI, R_BFIN_FUNCDESC_GOTOFFLO, R_BFIN_GOTOFF17M4, R_BFIN_GOTOFFHI, R_BFIN_GOTOFFLO): New relocs. (EF_BFIN_PIC, EF_BFIN_FDPIC, EF_BFIN_PIC_FLAGS): New macros.
2006-03-23Patch by matz@suse.de:Andreas Jaeger1-1/+10
bfd/ChangeLog: * reloc.c: Add BFD_RELOC_X86_64_GOT64, BFD_RELOC_X86_64_GOTPCREL64, BFD_RELOC_X86_64_GOTPC64, BFD_RELOC_X86_64_GOTPLT64, BFD_RELOC_X86_64_PLTOFF64. * bfd-in2.h: Regenerated. * libbfd.h: Regenerated. * elf64-x86-64.c (x86_64_elf_howto_table): Correct comment. Add howtos for above relocs. (x86_64_reloc_map): Add mappings for new relocs. (elf64_x86_64_check_relocs): R_X86_64_GOT64, R_X86_64_GOTPCREL64, R_X86_64_GOTPLT64 need a got entry. R_X86_64_GOTPLT64 also a PLT entry. R_X86_64_GOTPC64 needs a .got section. R_X86_64_PLTOFF64 needs a PLT entry. (elf64_x86_64_gc_sweep_hook): Reflect changes from elf64_x86_64_check_relocs for the new relocs. (elf64_x86_64_relocate_section): Handle new relocs. gas/ChangeLog: * config/tc-i386.c (type_names): Correct placement of 'static'. (reloc): Map some more relocs to their 64 bit counterpart when size is 8. (output_insn): Work around breakage if DEBUG386 is defined. (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing different from i386. (output_imm): Ditto. (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also Imm64. (md_convert_frag): Jumps can now be larger than 2GB away, error out in that case. (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64. gas/testsuite/ChangeLog: * gas/i386/reloc64.s: Accept 64-bit forms. * gas/i386/reloc64.d: Adjust. * gas/i386/reloc64.l: Adjust. include/ChangeLog: * elf/x86-64.h: Add the new relocations with their official numbers.
2006-03-22 Richard Sandiford <richard@codesourcery.com>Richard Sandiford2-0/+12
Daniel Jacobowitz <dan@codesourcery.com> Phil Edwards <phil@codesourcery.com> Zack Weinberg <zack@codesourcery.com> Mark Mitchell <mark@codesourcery.com> Nathan Sidwell <nathan@codesourcery.com> bfd/ * bfd-in2.h: Regenerate. * config.bfd (mips*-*-vxworks*, mips*el-*-vxworks*): New stanzas. * configure.in (bfd_elf32_bigmips_vxworks_vec): New stanza. (bfd_elf32_littlemips_vxworks_vec): Likewise. (bfd_elf32_bigmips_vec): Add elf-vxworks.lo. (bfd_elf32_littlemips_vec): Likewise. (bfd_elf32_nbigmips_vec): Likewise. (bfd_elf32_nlittlemips_vec): Likewise. (bfd_elf32_ntradbigmips_vec): Likewise. (bfd_elf32_ntradlittlemips_vec): Likewise. (bfd_elf32_tradbigmips_vec): Likewise. (bfd_elf32_tradlittlemips_vec): Likewise. (bfd_elf64_bigmips_vec): Likewise. (bfd_elf64_littlemips_vec): Likewise. (bfd_elf64_tradbigmips_vec): Likewise. (bfd_elf64_tradlittlemips_vec): Likewise. * elf32-mips.c: Include elf-vxworks.h. (mips_info_to_howto_rel): Use elf_backend_mips_rtype_to_howto instead of calling mips_elf32_rtype_to_howto directly. (mips_vxworks_copy_howto_rela): New reloc howto. (mips_vxworks_jump_slot_howto_rela): Likewise. (mips_vxworks_bfd_reloc_type_lookup): New function. (mips_vxworks_rtype_to_howto): Likewise. (mips_vxworks_final_write_processing): Likewise. (TARGET_LITTLE_SYM, TARGET_LITTLE_NAME): Override for VxWorks. (TARGET_BIG_SYM, TARGET_BIG_NAME, elf_bed, ELF_MAXPAGESIZE): Likewise. (elf_backend_want_got_plt): Likewise. (elf_backend_want_plt_sym): Likewise. (elf_backend_got_symbol_offset): Likewise. (elf_backend_want_dynbss): Likewise. (elf_backend_may_use_rel_p): Likewise. (elf_backend_may_use_rela_p): Likewise. (elf_backend_default_use_rela_p): Likewise. (elf_backend_got_header_size: Likewise. (elf_backend_plt_readonly): Likewise. (bfd_elf32_bfd_reloc_type_lookup): Likewise. (elf_backend_mips_rtype_to_howto): Likewise. (elf_backend_adjust_dynamic_symbol): Likewise. (elf_backend_finish_dynamic_symbol): Likewise. (bfd_elf32_bfd_link_hash_table_create): Likewise. (elf_backend_add_symbol_hook): Likewise. (elf_backend_link_output_symbol_hook): Likewise. (elf_backend_emit_relocs): Likewise. (elf_backend_final_write_processing: Likewise. (elf_backend_additional_program_headers): Likewise. (elf_backend_modify_segment_map): Likewise. (elf_backend_symbol_processing): Likewise. * elfxx-mips.c: Include elf-vxworks.h. (mips_elf_link_hash_entry): Add is_relocation_target and is_branch_target fields. (mips_elf_link_hash_table): Add is_vxworks, srelbss, sdynbss, srelplt, srelplt2, sgotplt, splt, plt_header_size and plt_entry_size fields. (MIPS_ELF_RELA_SIZE, MIPS_ELF_REL_DYN_NAME): New macros. (MIPS_RESERVED_GOTNO): Take a mips_elf_link_hash_table argument. Return 3 for VxWorks. (ELF_MIPS_GP_OFFSET): Change the argument from a bfd to a mips_elf_link_hash_table. Return 0 for VxWorks. (MIPS_ELF_GOT_MAX_SIZE): Change the argument from a bfd to a mips_elf_link_hash_table. Update the call to ELF_MIPS_GP_OFFSET. (mips_vxworks_exec_plt0_entry): New variable. (mips_vxworks_exec_plt_entry): Likewise. (mips_vxworks_shared_plt0_entry): Likewise. (mips_vxworks_shared_plt_entry): Likewise. (mips_elf_link_hash_newfunc): Initialize the new hash_entry fields. (mips_elf_rel_dyn_section): Change the bfd argument to a mips_elf_link_hash_table. Use MIPS_ELF_REL_DYN_NAME to get the name of the section. (mips_elf_initialize_tls_slots): Update the call to mips_elf_rel_dyn_section. (mips_elf_gotplt_index): New function. (mips_elf_local_got_index): Add an input_section argument. Update the call to mips_elf_create_local_got_entry. (mips_elf_got_page): Likewise. (mips_elf_got16_entry): Likewise. (mips_elf_create_local_got_entry): Add bfd_link_info and input_section arguments. Create dynamic relocations for each entry on VxWorks. (mips_elf_merge_gots): Update the use of MIPS_ELF_GOT_MAX_SIZE. (mips_elf_multi_got): Update the uses of MIPS_ELF_GOT_MAX_SIZE and MIPS_RESERVED_GOTNO. (mips_elf_create_got_section): Update the uses of MIPS_ELF_GOT_MAX_SIZE. Create .got.plt on VxWorks. (is_gott_symbol): New function. (mips_elf_calculate_relocation): Use a dynobj local variable. Update the calls to mips_elf_local_got_index, mips_elf_got16_entry and mips_elf_got_page_entry. Set G to the .got.plt entry when calculating VxWorks R_MIPS_CALL* relocations. Calculate and use G for all GOT relocations on VxWorks. Add dynamic relocations for references to the VxWorks __GOTT_BASE__ and __GOTT_INDEX__ symbols. Don't create dynamic relocations for R_MIPS_32, R_MIPS_REL32 or R_MIPS_64 in VxWorks executables. (mips_elf_allocate_dynamic_relocations): Add a bfd_link_info argument. Use MIPS_ELF_RELA_SIZE to calculate the size of a VxWorks entry. Don't allocate a null entry on VxWorks. (mips_elf_create_dynamic_relocation): Update the call to mips_elf_rel_dyn_section. Use absolute rather than relative relocations for VxWorks, and make them RELA rather than REL. (_bfd_mips_elf_create_dynamic_sections): Don't make .dynamic read-only on VxWorks. Update the call to mips_elf_rel_dyn_section. Create the .plt, .rela.plt, .dynbss and .rela.bss sections on VxWorks. Likewise create the _PROCEDURE_LINKAGE_TABLE symbol. Call elf_vxworks_create_dynamic_sections for VxWorks and initialize the plt_header_size and plt_entry_size fields. (_bfd_mips_elf_check_relocs): Don't allow GOT relocations to be used in VxWorks executables. Don't allocate dynamic relocations for R_MIPS_32, R_MIPS_REL32 or R_MIPS_64 in VxWorks executables. Set is_relocation_target for each symbol referenced by a relocation. Allocate .rela.dyn entries for relocations against the special VxWorks __GOTT_BASE__ and __GOTT_INDEX__ symbols. Create GOT entries for all VxWorks R_MIPS_GOT16 relocations. Don't allocate a global GOT entry for symbols mentioned in VxWorks R_MIPS_CALL*, R_MIPS_32, R_MIPS_REL32 or R_MIPS_64 relocations. Update the calls to mips_elf_rel_dyn_section and mips_elf_allocate_dynamic_relocations. Set is_branch_target for symbols mentioned in R_MIPS_PC16 or R_MIPS_26 relocations. Don't set no_fn_stub on VxWorks. (_bfd_mips_elf_adjust_dynamic_symbol): Update the call to mips_elf_allocate_dynamic_relocations. (_bfd_mips_vxworks_adjust_dynamic_symbol): New function. (_bfd_mips_elf_always_size_sections): Do not allocate GOT page entries for VxWorks, and do not create multiple GOTs. (_bfd_mips_elf_size_dynamic_sections): Use MIPS_ELF_REL_DYN_NAME. Handle .got specially for VxWorks. Update the uses of MIPS_RESERVED_GOTNO and mips_elf_allocate_dynamic_relocations. Check for sgotplt and splt. Allocate the .rel(a).dyn contents last, once its final size is known. Set DF_TEXTREL for VxWorks. Add DT_RELA, DT_RELASZ, DT_RELAENT, DT_PLTREL, DT_PLTRELSZ and DT_JMPREL tags on VxWorks. Do not add the MIPS-specific tags for VxWorks. (_bfd_mips_vxworks_finish_dynamic_symbol): New function. (mips_vxworks_finish_exec_plt): Likewise. (mips_vxworks_finish_shared_plt): Likewise. (_bfd_mips_elf_finish_dynamic_sections): Remove an unncessary call to mips_elf_rel_dyn_section. Use a VxWorks-specific value of DT_PLTGOT. Handle DT_RELA, DT_RELASZ, DT_RELAENT, DT_PLTREL, DT_PLTRELSZ and DT_JMPREL. Update the uses of MIPS_RESERVED_GOTNO and mips_elf_rel_dyn_section. Use a different GOT header for VxWorks. Don't sort .rela.dyn on VxWorks. Finish the PLT on VxWorks. (_bfd_mips_elf_link_hash_table_create): Initialize the new mips_elf_link_hash_table fields. (_bfd_mips_vxworks_link_hash_table_create): New function. (_bfd_mips_elf_final_link): Set the GP value to _GLOBAL_OFFSET_TABLE_ on VxWorks. Update the call to ELF_MIPS_GP_OFFSET. * elfxx-mips.h (_bfd_mips_vxworks_adjust_dynamic_symbol): Declare. (_bfd_mips_vxworks_finish_dynamic_symbol): Likewise. (_bfd_mips_vxworks_link_hash_table_create): Likewise. * libbfd.h: Regenerate. * Makefile.am (elfxx-mips.lo): Depend on elf-vxworks.h. (elf32-mips.lo): Likewise. * Makefile.in: Regenerate. * reloc.c (BFD_RELOC_MIPS_COPY, BFD_RELOC_MIPS_JUMP_SLOT): Declare. * targets.c (bfd_elf32_bigmips_vxworks_vec): Declare. (bfd_elf32_littlemips_vxworks_vec): Likewise. (_bfd_target_vector): Add entries for them. gas/ * config/tc-mips.c (mips_target_format): Handle vxworks targets. (md_begin): Complain about -G being used for PIC. Don't change the text, data and bss alignments on VxWorks. (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when generating VxWorks PIC. (load_address): Extend SVR4_PIC handling to VXWORKS_PIC. (macro): Likewise, but do not treat la $25 specially for VxWorks PIC, and do not handle jal. (OPTION_MVXWORKS_PIC): New macro. (md_longopts): Add -mvxworks-pic. (md_parse_option): Don't complain about using PIC and -G together here. Handle OPTION_MVXWORKS_PIC. (md_estimate_size_before_relax): Always use the first relaxation sequence on VxWorks. * config/tc-mips.h (VXWORKS_PIC): New. gas/testsuite/ * gas/mips/vxworks1.s, gas/mips/vxworks1.d, * gas/mips/vxworks1-xgot.d: New tests. * gas/mips/mips.exp: Run them. Do not run other tests on VxWorks. include/elf/ * mips.h (R_MIPS_COPY, R_MIPS_JUMP_SLOT): New relocs. ld/ * configure.tgt (mips*el-*-vxworks*, mips*-*-vxworks*): Use separate VxWorks emulations. * emulparams/elf32ebmipvxworks.sh: New file. * emulparams/elf32elmipvxworks.sh: New file. * Makefile.am (ALL_EMULATIONS): Add eelf32ebmipvxworks.o and eelf32elmipvxworks.o. (eelf32ebmipvxworks.c, eelf32elmipvxworks.c): New rules. * Makefile.in: Regenerate. ld/testsuite/ * ld-mips/vxworks1.dd, ld-mips/vxworks1.ld, ld-mips/vxworks1-lib.dd, * ld-mips/vxworks1-lib.nd, ld-mips/vxworks1-lib.rd, * ld-mips/vxworks1-lib.s, ld-mips/vxworks1.rd, ld-mips/vxworks1.s, * ld-mips/vxworks1-static.d, ld-mips/vxworks2.s, ld-mips/vxworks2.sd, * ld-mips/vxworks2-static.sd: New tests. * ld-mips/mips-elf.exp: Run them.
2006-03-20 * hppa.h (SHF_HP_TLS, SHF_HP_NEAR_SHARED, SHF_HP_FAR_SHARED,Dave Anglin2-0/+35
SHF_HP_COMDAT, SHF_HP_CONST, SHN_TLS_COMMON, SHN_NS_COMMON, SHN_NS_UNDEF, SHN_FS_UNDEF, SHN_HP_EXTERN, SHN_HP_EXTHINT, SHN_HP_UNDEF_BIND_IMM, SHT_HP_OVLBITS, SHT_HP_DLKM, SHT_HP_COMDAT, SHT_HP_OBJDICT, SHT_HP_ANNOT, STB_HP_ALIAS): Define.
2006-03-102006-03-10 Paul Brook <paul@codesourcery.com>Paul Brook2-0/+5
bfd/ * elf32-arm.c (INTERWORK_FLAG): Handle EABIv5. (elf32_arm_print_private_bfd_data): Ditto. binutils/ * readelf.c (decode_ARM_machine_flags): Handle EABIv5. gas/ * config/tc-arm.c (md_begin): Handle EABIv5. (arm_eabis): Add EF_ARM_EABI_VER5. * doc/c-arm.texi: Document -meabi=5. include/elf/ * arm.h (EF_ARM_EABI_VER5): Define.
2006-03-06 bfd:Nathan Sidwell2-9/+20
* archures.c (bfd_mach_mcf_isa_a_nodiv, bfd_mach_mcf_isa_b_nousp): New. Adjust other variants. (bfd_default_scan): Update. * bfd-in2.h: Rebuilt. * cpu-m68k.c: Adjust. (bfd_m68k_compatible): New. Use it for architectures. * elf32-m68k.c (elf32_m68k_object_p): Adjust. (elf32_m68k_merge_private_bfd_data): Adjust. Correct isa-a/b mismatch. (elf32_m68k_print_private_bfd_data): Adjust. * ieee.c (ieee_write_processor): Adjust. binutils: * readelf.c (get_machine_flags): Adjust. gas: * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k and cf. (m68k_ip): <case 'J'> Check we have some control regs. (md_parse_option): Allow raw arch switch. (m68k_init_arch): Better detection of arch/cpu mismatch. Detect whether 68881 or cfloat was meant by -mfloat. (md_show_usage): Adjust extension display. (m68k_elf_final_processing): Adjust. gas/testsuite: * gas/m68k/arch-cpu-1.s: Tweak. * gas/m68k/arch-cpu-1.d: Tweak. include/elf: * m68k.h (EF_M68K_ISA_MASK, EF_M68K_ISA_A, EF_M68K_ISA_A_PLUS, EF_M68K_ISA_B, EF_M68K_ISA_C): Adjust. (EF_M68K_ISA_A_NODIV, EF_M68K_ISA_B_NOUSP): New. (EF_M68K_HW_DIV, EF_M68K_USP): Remove. (EF_M68K_MAC, EF_M68K_EMAC, EF_M68K_FLOAT): Adjust. (EF_M68K_EMAC_B): New. ld/testsuite: * ld-m68k: New tests.
2006-03-03Add linker relaxation support for the AVRNick Clifton2-0/+11
2006-03-02 Import from the GCC tree:Ben Elliston2-4/+87
2006-03-01 Jakub Jelinek <jakub@redhat.com> * dwarf2.h (DW_TAG_condition, DW_TAG_shared_type): New constants from DWARF 3. (DW_AT_description, DW_AT_binary_scale, DW_AT_decimal_scale, DW_AT_small, DW_AT_decimal_sign, DW_AT_digit_count, DW_AT_picture_string, DW_AT_mutable, DW_AT_threads_scaled, DW_AT_explicit, DW_AT_object_pointer, DW_AT_endianity, DW_AT_elemental, DW_AT_pure, DW_AT_recursive): New. (DW_OP_form_tls_address, DW_OP_call_frame_cfa, DW_OP_bit_piece): New. (DW_ATE_packed_decimal, DW_ATE_numeric_string, DW_ATE_edited, DW_ATE_signed_fixed, DW_ATE_unsigned_fixed): New. (DW_DS_unsigned, DW_DS_leading_overpunch, DW_DS_trailing_overpunch, DW_DS_leading_separate, DW_DS_trailing_separate): New. (DW_END_default, DW_END_big, DW_END_little): New. (DW_END_lo_user, DW_END_hi_user): Define. (DW_LNE_lo_user, DW_LNE_hi_user): Define. (DW_CFA_val_offset, DW_CFA_val_offset_sf, DW_CFA_val_expression): New. (DW_LANG_PLI, DW_LANG_ObjC, DW_LANG_ObjC_plus_plus, DW_LANG_UPC, DW_LANG_D): New.
2006-02-24[include/elf]DJ Delorie2-0/+12
* m32c.h: Add relax relocs. [cpu] * m32c.cpu (RL_TYPE): New attribute, with macros. (Lab-8-24): Add RELAX. (unary-insn-defn-g, binary-arith-imm-dst-defn, binary-arith-imm4-dst-defn): Add 1ADDR attribute. (binary-arith-src-dst-defn): Add 2ADDR attribute. (jcnd16-5, jcnd16, jcnd32, jmp16.s, jmp16.b, jmp16.w, jmp16.a, jmp32.s, jmp32.b, jmp32.w, jmp32.a, jsr16.w, jsr16.a): Add JUMP attribute. (jsri16, jsri32): Add 1ADDR attribute. (jsr32.w, jsr32.a): Add JUMP attribute. [opcodes] * m32c-desc.c: Regenerate with linker relaxation attributes. * m32c-desc.h: Likewise. * m32c-dis.c: Likewise. * m32c-opc.c: Likewise. [gas] * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix. (tc_gen_reloc): Don't define. * config/tc-m32c.c (rl_for, relaxable): New convenience macros. (OPTION_LINKRELAX): New. (md_longopts): Add it. (m32c_relax): New. (md_parse_options): Set it. (md_assemble): Emit relaxation relocs as needed. (md_convert_frag): Emit relaxation relocs as needed. (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16. (m32c_apply_fix): New. (tc_gen_reloc): New. (m32c_force_relocation): Force out jump relocs when relaxing. (m32c_fix_adjustable): Return false if relaxing. [bfd] * elf32-m32c.c (m32c_elf_howto_table): Add relaxation relocs. (m32c_elf_relocate_section): Don't relocate them. (compare_reloc): New. (relax_reloc): Remove. (m32c_offset_for_reloc): New. (m16c_addr_encodings): New. (m16c_jmpaddr_encodings): New. (m32c_addr_encodings): New. (m32c_elf_relax_section): Relax jumps and address displacements. (m32c_elf_relax_delete_bytes): Adjust for internal syms. Fix up short jumps. * reloc.c: Add m32c relax relocs. * libbfd.h: Regenerate.
2006-02-17Add support for the Infineon XC16X.Nick Clifton3-49/+99
2006-02-10bfd/H.J. Lu2-0/+31
2006-02-10 H.J. Lu <hongjiu.lu@intel.com> PR binutils/2258 * elf.c (copy_private_bfd_data): Renamed to ... (rewrite_elf_program_header): This. (copy_elf_program_header): New function. (copy_private_bfd_data): Likewise. binutils/ 2006-02-10 H.J. Lu <hongjiu.lu@intel.com> PR binutils/2258 * readelf.c (process_program_headers): Use ELF_IS_SECTION_IN_SEGMENT_MEMORY. include/elf/ 2006-02-10 H.J. Lu <hongjiu.lu@intel.com> PR binutils/2258 * internal.h (ELF_IS_SECTION_IN_SEGMENT_FILE): New. (ELF_IS_SECTION_IN_SEGMENT_MEMORY): Likewise.
2006-02-07 * bfd/archures.c (bfd_mach_mcf5200, bfd_mach_mcf5206e,Nathan Sidwell2-4/+30
bfd_mach_mcf5307, bfd_mach_mcf5407, bfd_mach_mcf528x, bfd_mach_mcfv4e, bfd_mach_mcf521x, bfd_mach_mcf5249, bfd_mach_mcf547x, bfd_mach_mcf548x): Remove. (bfd_mach_mcf_isa_a, bfd_mach_mcf_isa_a_div, bfd_mach_mcf_isa_a_div_mac, bfd_mach_mcf_isa_a_div_emac, bfd_mach_mcf_isa_aplus, bfd_mach_mcf_isa_aplus_mac, bfd_mach_mcf_isa_aplus_emac, bfd_mach_mcf_isa_aplus_usp, bfd_mach_mcf_isa_aplus_usp_mac, bfd_mach_mcf_isa_aplus_usp_emac, bfd_mach_mcf_isa_b, bfd_mach_mcf_isa_b_mac, bfd_mach_mcf_isa_b_emac, bfd_mach_mcf_isa_b_usp_float, bfd_mach_mcf_isa_b_usp_float_mac, bfd_mach_mcf_isa_b_usp_float_emac): New. (bfd_default_scan): Update coldfire mapping. * bfd/bfd-in.h (bfd_m68k_mach_to_features, bfd_m68k_features_to_mach): Declare. * bfd/bfd-in2.h: Rebuilt. * bfd/cpu-m68k.c (arch_info_struct): Add new coldfire machines, adjust legacy names. (m68k_arch_features): New. (bfd_m68k_mach_to_features, bfd_m68k_features_to_mach): Define. * bfd/elf32-m68k.c (elf32_m68k_object_p): New. (elf32_m68k_merge_private_bfd_data): Merge the CF EF flags. (elf32_m68k_print_private_bfd_data): Print the CF EF flags. (elf_backend_object_p): Define. * bfd/ieee.c (ieee_write_processor): Update coldfire machines. * bfd/libbfd.h: Rebuilt. * gas/config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs, mcf5329_control_regs): New. (not_current_architecture, selected_arch, selected_cpu): New. (m68k_archs, m68k_extensions): New. (archs): Renamed to ... (m68k_cpus): ... here. Adjust. (n_arches): Remove. (md_pseudo_table): Add arch and cpu directives. (find_cf_chip, m68k_ip): Adjust table scanning. (no_68851, no_68881): Remove. (md_assemble): Lazily initialize. (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329. (md_init_after_args): Move functionality to m68k_init_arch. (mri_chip): Adjust table scanning. (md_parse_option): Reimplement 'm' processing to add -march & -mcpu options with saner parsing. (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension, m68k_init_arch): New. (s_m68k_cpu, s_m68k_arch): New. (md_show_usage): Adjust. (m68k_elf_final_processing): Set CF EF flags. * gas/config/tc-m68k.h (m68k_init_after_args): Remove. (tc_init_after_args): Remove. * gas/doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options. (M68k-Directives): Document .arch and .cpu directives. * gas/testsuite/gas/m68k/all.exp: Add arch-cpu-1 test. * gas/testsuite/gas/m68k/arch-cpu-1.[sd]: New. * include/elf/m68k.h (EF_CPU32, EF_M68000, EF_CFV4E): Rename to ... (EF_M68K_CPU32, EF_M68K_M68000, EF_M68K_CFV4E): ... here. (EF_M68K_ISA_MASK, EF_M68K_ISA_A, EF_M68K_M68K_ISA_A_PLUS, EF_M68K_ISA_B, EF_M68K_HW_DIV, EF_M68K_MAC_MASK, EF_M68K_MAC, EF_M68K_EMAC, EF_M68K_USP, EF_M68K_FLOAT): New. * include/opcode/m68k.h (m68008, m68ec030, m68882): Remove. (m68k_mask): New. (cpu_m68k, cpu_cf): New. (mcf5200, mcf5206e, mcf521x, mcf5249, mcf528x, mcf5307, mcf5407, mcf5470, mcf5480): Rename to cpu_<foo>. Add m680x0 variants. * opcodes/m68k-dis.c (print_insn_m68k): Use bfd_m68k_mach_to_features. * binutils/readelf.c (get_machine_flags): Add logic for EF_M68K flags.
2006-02-06 * elf/ia64.h (SHF_IA_64_HP_TLS): New.Steve Ellcey1-0/+2
2006-01-18include/elf/ChangeLog:Alexandre Oliva4-3/+28
Introduce TLS descriptors for i386 and x86_64. * common.h (DT_TLSDESC_GOT, DT_TLSDESC_PLT): New. * i386.h (R_386_TLS_GOTDESC, R_386_TLS_DESC_CALL, R_386_TLS_DESC): New. * x86-64.h (R_X86_64_GOTPC32_TLSDESC, R_X86_64_TLSDESC_CALL, R_X86_64_TLSDESC): New. bfd/ChangeLog: Introduce TLS descriptors for i386 and x86_64. * reloc.c (BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC, BFD_RELOC_386_TLS_DESC_CALL, BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL): New. * libbfd.h, bfd-in2.h: Rebuilt. * elf32-i386.c (elf_howto_table): New relocations. (R_386_tls): Adjust. (elf_i386_reloc_type_lookup): Map new relocations. (GOT_TLS_GDESC, GOT_TLS_GD_BOTH_P): New macros. (GOT_TLS_GD_P, GOT_TLS_GDESC_P, GOT_TLS_GD_ANY_P): New macros. (struct elf_i386_link_hash_entry): Add tlsdesc_got field. (struct elf_i386_obj_tdata): Add local_tlsdesc_gotent field. (elf_i386_local_tlsdesc_gotent): New macro. (struct elf_i386_link_hash_table): Add sgotplt_jump_table_size. (elf_i386_compute_jump_table_size): New macro. (link_hash_newfunc): Initialize tlsdesc_got. (elf_i386_link_hash_table_create): Set sgotplt_jump_table_size. (elf_i386_tls_transition): Handle R_386_TLS_GOTDESC and R_386_TLS_DESC_CALL. (elf_i386_check_relocs): Likewise. Allocate space for local_tlsdesc_gotent. (elf_i386_gc_sweep_hook): Handle R_386_TLS_GOTDESC and R_386_TLS_DESC_CALL. (allocate_dynrelocs): Count function PLT relocations. Reserve space for TLS descriptors and relocations. (elf_i386_size_dynamic_sections): Reserve space for TLS descriptors and relocations. Set up sgotplt_jump_table_size. Don't zero reloc_count in srelplt. (elf_i386_always_size_sections): New. Set up _TLS_MODULE_BASE_. (elf_i386_relocate_section): Handle R_386_TLS_GOTDESC and R_386_TLS_DESC_CALL. (elf_i386_finish_dynamic_symbol): Use GOT_TLS_GD_ANY_P. (elf_backend_always_size_sections): Define. * elf64-x86-64.c (x86_64_elf_howto): Add R_X86_64_GOTPC32_TLSDESC, R_X86_64_TLSDESC, R_X86_64_TLSDESC_CALL. (R_X86_64_standard): Adjust. (x86_64_reloc_map): Map new relocs. (elf64_x86_64_rtype_to_howto): New, split out of... (elf64_x86_64_info_to_howto): ... this function, and... (elf64_x86_64_reloc_type_lookup): ... use it to map elf_reloc_val. (GOT_TLS_GDESC, GOT_TLS_GD_BOTH_P): New macros. (GOT_TLS_GD_P, GOT_TLS_GDESC_P, GOT_TLS_GD_ANY_P): New macros. (struct elf64_x86_64_link_hash_entry): Add tlsdesc_got field. (struct elf64_x86_64_obj_tdata): Add local_tlsdesc_gotent field. (elf64_x86_64_local_tlsdesc_gotent): New macro. (struct elf64_x86_64_link_hash_table): Add tlsdesc_plt, tlsdesc_got and sgotplt_jump_table_size fields. (elf64_x86_64_compute_jump_table_size): New macro. (link_hash_newfunc): Initialize tlsdesc_got. (elf64_x86_64_link_hash_table_create): Initialize new fields. (elf64_x86_64_tls_transition): Handle R_X86_64_GOTPC32_TLSDESC and R_X86_64_TLSDESC_CALL. (elf64_x86_64_check_relocs): Likewise. Allocate space for local_tlsdesc_gotent. (elf64_x86_64_gc_sweep_hook): Handle R_X86_64_GOTPC32_TLSDESC and R_X86_64_TLSDESC_CALL. (allocate_dynrelocs): Count function PLT relocations. Reserve space for TLS descriptors and relocations. (elf64_x86_64_size_dynamic_sections): Reserve space for TLS descriptors and relocations. Set up sgotplt_jump_table_size, tlsdesc_plt and tlsdesc_got. Make room for them. Don't zero reloc_count in srelplt. Add dynamic entries for DT_TLSDESC_PLT and DT_TLSDESC_GOT. (elf64_x86_64_always_size_sections): New. Set up _TLS_MODULE_BASE_. (elf64_x86_64_relocate_section): Handle R_386_TLS_GOTDESC and R_386_TLS_DESC_CALL. (elf64_x86_64_finish_dynamic_symbol): Use GOT_TLS_GD_ANY_P. (elf64_x86_64_finish_dynamic_sections): Set DT_TLSDESC_PLT and DT_TLSDESC_GOT. Set up TLS descriptor lazy resolver PLT entry. (elf_backend_always_size_sections): Define. binutils/ChangeLog: Introduce TLS descriptors for i386 and x86_64. * readelf.c (get_dynamic_type): Handle DT_TLSDESC_GOT and DT_TLSDESC_PLT. gas/ChangeLog: Introduce TLS descriptors for i386 and x86_64. * config/tc-i386.c (tc_i386_fix_adjustable): Handle BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL, BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL. (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the displacement bits. (build_modrm_byte): Set up zero modrm for TLS desc calls. (lex_got): Handle @tlsdesc and @tlscall. (md_apply_fix, tc_gen_reloc): Handle the new relocations. ld/testsuite/ChangeLog: Introduce TLS descriptors for i386 and x86_64. * ld-i386/i386.exp: Run on x86_64-*-linux* and amd64-*-linux*. Add new tests. * ld-i386/pcrel16.d: Add -melf_i386. * ld-i386/pcrel8.d: Likewise. * ld-i386/tlsbindesc.dd: New. * ld-i386/tlsbindesc.rd: New. * ld-i386/tlsbindesc.s: New. * ld-i386/tlsbindesc.sd: New. * ld-i386/tlsbindesc.td: New. * ld-i386/tlsdesc.dd: New. * ld-i386/tlsdesc.rd: New. * ld-i386/tlsdesc.s: New. * ld-i386/tlsdesc.sd: New. * ld-i386/tlsdesc.td: New. * ld-i386/tlsgdesc.dd: New. * ld-i386/tlsgdesc.rd: New. * ld-i386/tlsgdesc.s: New. * ld-x86-64/x86-64.exp: Run new tests. * ld-x86-64/tlsbindesc.dd: New. * ld-x86-64/tlsbindesc.rd: New. * ld-x86-64/tlsbindesc.s: New. * ld-x86-64/tlsbindesc.sd: New. * ld-x86-64/tlsbindesc.td: New. * ld-x86-64/tlsdesc.dd: New. * ld-x86-64/tlsdesc.pd: New. * ld-x86-64/tlsdesc.rd: New. * ld-x86-64/tlsdesc.s: New. * ld-x86-64/tlsdesc.sd: New. * ld-x86-64/tlsdesc.td: New. * ld-x86-64/tlsgdesc.dd: New. * ld-x86-64/tlsgdesc.rd: New. * ld-x86-64/tlsgdesc.s: New.
2006-01-09Define EM_ALTERA_NIOS2 and EM_NIOS32.Nick Clifton2-2/+10
2005-12-16 Second part of ms1 to mt renaming.Nathan Sidwell3-21/+27
* bfd/archures.c (bfd_arch_mt): Renamed. (bfd_mt_arch): Renamed. (bfd_archures_list): Adjusted. * bfd/bfd-in2.h: Rebuilt. * bfd/config.bfd (mt): Remove special case targ_archs. (mt-*-elf): Rename bfd_elf32_mt_vec. * bfd/configure: Rebuilt. * bfd/configure.in (bfd_elf32_mt_vec): Renamed. (selarchs) Remove mt special case. * bfd/cpu-mt.c (arch_info_struct): Adjust. (bfd_mt_arch): Renamed, adjust. * bfd/elf32-mt.c (mt_reloc_type_lookup, mt_info_to_howto_rela, mt_elf_relocate_hi16, mt_final_link_relocate, mt_relocate_section, mt_elf_howto_table): Renamed, adjusted. (mt_elf_gc_mark_hook, mt_elf_gc_sweep_hook, mt_elf_check_relocs, elf32_mt_machine, mt_elf_object_p, mt_elf_set_private_flags, mt_elf_copy_private_bfd_data, mt_elf_merge_private_bfd_data, mt_elf_print_private_bfd_data): Renamed, adjusted. (TARGET_BIG_SYM, TARGET_BIG_NAME, ELF_ARCH, ELF_MACHINE_CODE, ELF_MAXPAGESIZE, elf_info_to_howto, elf_backend_relocate_section, bfd_elf32_bfd_reloc_type_lookup, elf_backend_gc_mark_hook, elf_backend_gc_sweep_hook, elf_backend_check_relocs, eld_backend_object_p, bfd_elf32_bfd_set_private_flags, bfd_elf32_bfd_copy_private_bfd_data, bfd_elf32_bfd_merge_private_bfd_data, bfd_elf32_bfd_print_private_bfd_data): Adjusted. * bfd/libbfd.h: Regenerated. * bfd/reloc.c (BFD_RELOC_MT_PC16, BFD_RELOC_MT_HI16, BFD_RELOC_MT_LO16, BFD_RELOC_MT_GNU_VTINHERIT, BFD_RELOC_MT_GNU_VTENTRY, BFD_RELOC_MT_PCINSN8): Renamed. * bfd/targets.c (bfd_elf32_mt_vec): Renamed. (_bfd_target_vector): Adjusted. * binutils/readelf.c (guess_is_rela): Use EM_MT. (dump_relocations, get_machine_name): Adjust. * cpu/mt.cpu (define-arch, define-isa): Set name to mt. (define-mach): Adjust. * cpu/mt.opc (CGEN_ASM_HASH): Update. (mt_asm_hash, mt_cgen_insn_supported): Renamed. (parse_loopsize, parse_imm16): Adjust. * gas/configure: Rebuilt. * gas/configure.in (mt): Remove special case. * gas/config/tc-mt.c (opcodes/mt-desc.h, opcodes/mt-opc.h): Change #includes. (mt_insn, mt_mach, mt_mach_bitmask, mt_flags, mt_architectures): Rename, adjust. (md_parse_option, md_show_usage, md_begin, md_assemble, md_cgen_lookup_reloc, md_atof): Adjust. (mt_force_relocation, mt_apply_fix, mt_fix_adjustable): Rename, adjust. * gas/config/tc-mt.h (TC_MT): Rename. (LISTING_HEADER, TARGET_ARCH, TARGET_FORMAT): Adjust. (md_apply_fix): Adjust. (mt_apply_fix, mt_fix_adjustable, mt_force_relocation): Rename. (TC_FORCE_RELOCATION, tc_fix_adjustable): Adjust. * gdb/mt-tdep.c (mt_arch_constants, mt_gdb_regnums): Rename, adjust. (mt_register_name, mt_register_type, mt_register_reggroup_p, mt_return_value, mt_skip_prologue, mt_breapoint_from_pc, mt_pseudo_register_read, mt_pseudo_register_write, mt_frame_align, mt_registers_info, mt_push_dummy_call, mt_unwind_cache, mt_frame_unwind_cache, mt_unwind_pc, mt_unwind_dummy_id, mt_frame_this_id, mt_frame_prev_register, mt_frame_base_address, mt_frame_unwind, mt_frame_sniffer, mt_frame_base, mt_gdbarch_init, _initialize_mt_tdep): Rename & adjust. * include/dis-asm.h (print_insn_mt): Renamed. * include/elf/common.h (EM_MT): Renamed. * include/elf/mt.h: Rename relocs, cpu & other defines. * ld/emulparams/elf32mt.sh (ARCH, OUTPUT_FORMAT): Adjust. * opcodes/Makefile.am (HFILES, CFILES, ALL_MACHINES): Adjust. (stamp-mt): Adjust rule. (mt-asm.lo, mt-desc.lo, mt-dis.lo, mt-ibld.lo, mt-opc.lo): Rename & adjust. * opcodes/Makefile.in: Rebuilt. * opcodes/configure: Rebuilt. * opcodes/configure.in (bfd_mt_arch): Rename & adjust. * opcodes/disassemble.c (ARCH_mt): Renamed. (disassembler): Adjust. * opcodes/mt-asm.c: Renamed, rebuilt. * opcodes/mt-desc.c: Renamed, rebuilt. * opcodes/mt-desc.h: Renamed, rebuilt. * opcodes/mt-dis.c: Renamed, rebuilt. * opcodes/mt-ibld.c: Renamed, rebuilt. * opcodes/mt-opc.c: Renamed, rebuilt. * opcodes/mt-opc.h: Renamed, rebuilt. * sid/Makefile.in: Rebuilt. * sid/aclocal.m4: Rebuilt. * sid/configure: Rebuilt. * sid/sid.spec: Adjust. * sid/bsp/Makefile.am: Adjust. * sid/bsp/Makefile.in: Rebuilt. * sid/bsp/aclocal.m4: Rebuilt. * sid/bsp/configrun-sid.in: Adjust. * sid/bsp/pregen/Makefile.in: Rebuilt. * sid/bsp/pregen/mt-gdb.conf: Renamed & rebuilt. * sid/bsp/pregen/mt-gloss.conf: Renamed & rebuilt. * sid/bsp/pregen/pregen-configs.in: Adjust. * sid/component/aclocal.m4: Rebuilt. * sid/component/configure: Rebuilt. * sid/component/tconfig.in: Adjust. * sid/component/bochs/aclocal.m4: Rebuilt. * sid/component/cache/Makefile.in: Rebuilt. * sid/component/cgen-cpu/Makefile.in: Rebuilt. * sid/component/cgen-cpu/aclocal.m4: Rebuilt. * sid/component/cgen-cpu/compCGEN.cxx: Adjust. * sid/component/cgen-cpu/configure: Rebuilt. * sid/component/cgen-cpu/configure.in: Rebult. * sid/component/cgen-cpu/mt/Makefile.am: Adjust. * sid/component/cgen-cpu/mt/Makefile.in: Rebuilt. * sid/component/cgen-cpu/mt/hw-cpu-mt.txt: Adjust. * sid/component/cgen-cpu/mt/mt-cpu.h: Rebuilt. * sid/component/cgen-cpu/mt/mt-decode.cxx: Rebuilt. * sid/component/cgen-cpu/mt/mt-decode.h: Rebuilt. * sid/component/cgen-cpu/mt/mt-defs.h: Rebuilt. * sid/component/cgen-cpu/mt/mt-desc.h: Rebuilt. * sid/component/cgen-cpu/mt/mt-sem.cxx: Rebuilt. * sid/component/cgen-cpu/mt/mt-write.cxx: Rebuilt. * sid/component/cgen-cpu/mt/mt.cxx: Adjust. * sid/component/cgen-cpu/mt/mt.h: Adjust. * sid/component/consoles/Makefile.in: Rebuilt. * sid/component/families/aclocal.m4: Rebuilt. * sid/component/families/configure: Rebuilt. * sid/component/gdb/Makefile.in: Rebuilt. * sid/component/gloss/Makefile.in: Rebuilt. * sid/component/glue/Makefile.in: Rebuilt. * sid/component/ide/Makefile.in: Rebuilt. * sid/component/interrupt/Makefile.in: Rebuilt. * sid/component/lcd/Makefile.in: Rebuilt. * sid/component/lcd/testsuite/Makefile.in: Rebuilt. * sid/component/loader/Makefile.am: Rebuilt. * sid/component/loader/Makefile.in: Rebuilt. * sid/component/mapper/Makefile.in: Rebuilt. * sid/component/mapper/testsuite/Makefile.in: Rebuilt. * sid/component/memory/Makefile.in: Rebuilt. * sid/component/mmu/Makefile.in: Rebuilt. * sid/component/parport/Makefile.in: Rebuilt. * sid/component/profiling/Makefile.in: Rebuilt. * sid/component/rtc/Makefile.in: Rebuilt. * sid/component/sched/Makefile.in: Rebuilt. * sid/component/testsuite/Makefile.in: Rebuilt. * sid/component/timers/aclocal.m4: Rebuilt. * sid/component/timers/configure: Rebuilt. * sid/component/uart/Makefile.in: Rebuilt. * sid/component/uart/testsuite/Makefile.in: Rebuilt. * sid/config/config.sub: Adjust. * sid/config/info.tcl.in: Adjust. * sid/config/sidtargets.m4: Adjust. * sid/doc/Makefile.in: Rebuilt. * sid/main/dynamic/Makefile.am: Rebuilt. * sid/main/dynamic/Makefile.in: Rebuilt. * sid/main/dynamic/aclocal.m4: Rebuilt. * sid/main/dynamic/configure: Rebuilt.
2005-12-122005-12-12 Paul Brook <paul@codesourcery.com>Paul Brook2-0/+5
bfd/ * bfd-in2.h: Regenerate. * elf32-arm.c (elf32_arm_reloc_map): Add BFD_RELOC_ARM_PCREL_CALL and BFD_RELOC_ARM_PCREL_JUMP. (check_use_blx): New function. (bfd_elf32_arm_process_before_allocation): Don't allocate glue if using BLX. (elf32_arm_final_link_relocate): Perform bl<->blx conversion for R_ARM_CALL and R_ARM_THM. (elf32_arm_get_eabi_attr_int): New function. (elf32_arm_size_dynamic_sections): Call check_use_blx. * libbfd.h: Regenerate. * reloc.c: Add BFD_RELOC_ARM_PCREL_CALL and BFD_RELOC_ARM_PCREL_JUMP. gas/ * config/tc-arm.c (do_branch): Generate EABI branch relocations. (do_bl): New function. (do_blx): Generate BFD_RELOC_ARM_PCREL_CALL relocation. (do_t_blx): Generate BFD_RELOC_THUMB_PCREL_BRANCH23. (insns): Use do_bl. (md_pcrel_from_section): Add BFD_RELOC_ARM_PCREL_CALL and BFD_RELOC_ARM_PCREL_JUMP. (md_apply_fix): Merge BFD_RELOC_ARM_PCREL_BRANCH and BFD_RELOC_ARM_PCREL_BLX cases. Handle BFD_RELOC_ARM_PCREL_CALL and BFD_RELOC_ARM_PCREL_JUMP. (tc_gen_reloc): Handle BFD_RELOC_ARM_PCREL_CALL and BFD_RELOC_ARM_PCREL_JUMP. gas/testsuite/ * gas/arm/pic.d: Allow R_ARM_CALL relocations. include/elf/ * arm.h (elf32_arm_get_eabi_attr_int): Add prototype. ld/testsuite/ * ld-arm/arm-call.d: New test. * ld-arm/arm-call1.s: New file. * ld-arm/arm-call1.s: New file. * ld-arm/arm-elf.exp: Add arm-call and mixed-app-v5. * ld-arm/arm.ld: Add .glue_7 and .ARM.attribues. * ld-arm/mixed-app-v5.d: New file. * ld-arm/mixed-app.r: Tweak expected output.
2005-12-12Rename ms1 files to mt files (part 1 -- renames only)Nathan Sidwell1-0/+0
2005-11-11PR 1150Nick Clifton2-0/+13
* readelf.c (get_mips_symbol_other): New function. (get_symbol_other): New function. (process_symbol_table): Call get_symbol_other() to get a description of the st_other field if it contains more information than just the visibility. * elfxx-mips.c (mips_elf_calculate_relocation): Ignore an undefined symbol if it is optional. (_bfd_mips_elf_merge_symbol_attribute): Make sure that the optional flag is merged as well as the visibility. * elfxx-mips.h (_bfd_mips_elf_merge_symbol_attribute): Prototype. (elf_backend_merge_symbol_attribute): Define. * mips.h (STO_OPTIONAL): Define. (ELF_MIPS_IS_OPTIONAL): Define.
2005-11-08bfd:Nathan Sidwell1-0/+1
Add ms2. * archures.c (bfd_mach_ms2): Define. * cpu-ms1.c (arch_info_struct): Add ms2 stanza. * elf32-ms1.c (elf32_ms1_machine): Add ms2 case. (ms1_elf_merge_private_bfd_data): Remove unused variables. Add correct merging logic, with workaround. (ms1_elf_print_private_bfd_data): Add ms2 case. * reloc.c (BFD_RELOC_MS1_PCINSN8): Add ms2 specific reloc. * libbfd.h: Regenerated. * bfd-in2.h: Regenerated. cpu: Add ms2 * ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and model. (f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr, f-cb2incr, f-rc3): New fields. (LOOP): New instruction. (JAL-HAZARD): New hazard. (imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr): New operands. (mul, muli, dbnz, iflush): Enable for ms2 (jal, reti): Has JAL-HAZARD. (ldctxt, ldfb, stfb): Only ms1. (fbcb): Only ms1,ms1-003. (wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs, fbcbincrs, mfbcbincrs): Enable for ms2. (loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns. * ms1.opc (parse_loopsize): New. (parse_imm16): hi16/lo16 relocs are applicable to IMM16L. (print_pcrel): New. gas: Add ms2. * config/tc-ms1.c (ms1_mach_bitmask): Initialize to MS1. (ms1_architectures): Add ms2. (md_parse_option): Add ms2. (md_show_usage): Add ms2. (md_assemble): Add JAL_HAZARD detection logic. (md_cgen_lookup_reloc): Add MS1_OPERAND_LOOPSIZE case. * doc/c-ms1.texi: New. * doc/all.texi: Add MS1. * doc/Makefile.am (CPU_DOCS): Add c-ms1.texi. * doc/Makefile.in: Rebuilt. * doc/Makefile: Rebuilt. gas/testsuite: Add ms2. * gas/ms1/allinsn.d: Adjust pcrel disassembly. * gas/ms1/errors.exp: Fix target triplet. * gas/ms1/ms1-16-003.d: Adjust pcrel disassembly. * gas/ms1/ms1-16-003.s: Tweak label. * gas/ms1/ms1.exp: Adjust target triplet. Add ms2 test. * gas/ms1/ms2.d, gas/ms1/ms2.s: New. * gas/ms1/relocs.d: Adjust expected machine name and pcrel disassembly. * gas/ms1/relocs.exp: Adjust target triplet. include: Add ms2. * elf/ms1.h (EF_MS1_CPU_MS2): New. opcodes: Add ms2. * ms1-asm.c, ms1-desc.c, ms1-desc.h, ms1-dis.c, ms1-ibld.c, ms1-opc.c, ms1-opc.h: Regenerated.
2005-11-07 * elf/hppa.h (R_PARISC_DIR64WR, R_PARISC_DIR64DR): Remove relocs.Dave Anglin1-6/+0
2005-10-25Add support for the Z80 processor familyNick Clifton1-0/+5
2005-10-082005-10-08 Paul Brook <paul@codesourcery.com>Paul Brook2-0/+52
bfd/ * elf32-arm.c: Move #include "elf/arm.h" after libbfd.h. (NUM_KNOWN_ATTRIBUTES): Define. (aeabi_attribute, aeabi_attribute_list): Define. (elf32_arm_obj_tdata): Add known_eabi_attributes and other_eabi_attributes. (uleb128_size, is_default_attr, eabi_attr_size, elf32_arm_eabi_attr_size, write_uleb128, write_eabi_attribute, elf32_arm_set_eabi_attr_contents, elf32_arm_bfd_final_link, elf32_arm_new_eabi_attr, attr_strdup, elf32_arm_add_eabi_attr_int, elf32_arm_add_eabi_attr_compat, copy_eabi_attributes, elf32_arm_merge_eabi_attributes): New functions. (elf32_arm_copy_private_bfd_data): Copy EABI object attributes. (elf32_arm_fake_sections): Handle .ARM.attributes. (elf32_arm_parse_attributes): New function. (elf32_arm_section_from_shdr): Use it. (bfd_elf32_bfd_final_link): Define. gas/ * config/tc-arm.c: Don't provide fallback default for CPU_DEFAULT. (arm_arch_used, thumb_arch_used, selected_cpu, selected_cpu_name): New variables. (arm_cpu_option_table): Add canonical_name. (arm_cpus): Populate canonical_name field. (s_arm_eabi_attribute, s_arm_arch, s_arm_cpu, s_arm_fpu, aeabi_set_public_attributes, arm_md_end): New functions. (md_pseudo_table): Add "cpu", "arch", "fpu" and "eabi_attribute". (md_assemble): Set thumb_arch_used and arm_arch_used. (md_begin): Set defaut cpu if CPU_DEFAULT not defined. * config/tc-arm.h (md_end): Define. * doc/c-arm.texi: Document .cpu, .arch, .fpu and .eabi_attribute. gas/testsuite/ * gas/arm/eabi_attr_1.s: New test. * gas/arm/eabi_attr_1.d: New test. * gas/arm/arm7t.d: Only disassemble code sections. * gas/arm/bignum1.d: Ignore Arm object attribute sections. * gas/arm/mapping.d: Ditto. * gas/arm/unwind.d: Ditto. * gas/elf/section0.d: Ditto. * gas/elf/section1.d: Ditto. * gas/elf/elf.exp: Set target_machine for Arm EABI based targets. * gas/elf/section2.e-armeabi: New file. include/elf/ * arm.h: Add prototypes for BFD object attribute routines. ld/testsuite/ * ld-arm/arm-rel31.d: Ignore Arm object attribute sections. * ld-arm/arm-target1-abs.d: Ditto. * ld-arm/arm-target1-rel.d: Ditto. * ld-arm/arm-target2-abs.d: Ditto. * ld-arm/arm-target2-got-rel.d: Ditto. * ld-arm/arm-target2-rel.d: Ditto.
2005-09-30 * dis-asm.h (print_insn_bfin): Declare.Catherine Moore2-0/+73
* elf/bfin.h: New file. * elf/common.h (EM_BLACKFIN): Define. * opcode/bfin.h: New file.
2005-09-09 * arm.h (SHT_ARM_PREEMPTMAP, SHT_ARM_ATTRIBUTES): New defines.Richard Earnshaw2-0/+6
2005-08-10 * hppa.h (SHT_PARISC_DLKM, SHF_PARISC_WEAKORDER, PT_PARISC_WEAKORDER):Dave Anglin2-0/+11
New defines.
2005-08-04 * hppa.h (PF_HP_CODE, PF_HP_MODIFY, PF_HP_LAZYSWAP): Revise defines.Dave Anglin2-16/+65
(PF_HP_CODE_DEPR, PF_HP_MODIFY_DEPR, PF_HP_LAZYSWAP_DEPR): New deprecated defines. (DT_HP_EPLTREL, DT_HP_EPLTRELSZ, DT_HP_FILTERED, DT_HP_FILTER_TLS, DT_HP_COMPAT_FILTERED, DT_HP_LAZYLOAD, DT_HP_BIND_NOW_COUNT, DT_PLT, DT_PLT_SIZE, DT_DLT, DT_DLT_SIZE, DT_HP_BIND_DEPTH_FIRST, DT_HP_GST, DT_HP_SHLIB_FIXED, DT_HP_MERGE_SHLIB_SEG, DT_HP_NODELETE, DT_HP_GROUP, DT_HP_PROTECT_LINKAGE_TABLE, PT_HP_OPT_ANNOT, PT_HP_HSL_ANNOT, PT_HP_STACK, PT_HP_CORE_UTSNAME, NT_HP_COMPILER, NT_HP_COPYRIGHT, NT_HP_VERSION, NT_HP_SRCFILE_INFO, NT_HP_LINKER, NT_HP_INSTRUMENTED, NT_HP_UX_OPTIONS): Define.
2005-07-26[bfd]DJ Delorie2-0/+14
* reloc.c: Remove unused M32C relocs, add BFD_RELOC_M32C_HI8. * libbfd.h: Regenerate. * bfd-in2.h: Regenerate. * elf32-m32c.c (m32c_elf_howto_table): Add R_M32C_8, R_M32C_LO16, R_M32C_HI8, R_M32C_HI16. (m32c_reloc_map): Likewise. (m32c_elf_relocate_section): Add R_M32C_HI8 and R_M32C_HI16. [cpu] * m32c.opc (parse_unsigned8): Add %dsp8(). (parse_signed8): Add %hi8(). (parse_unsigned16): Add %dsp16(). (parse_signed16): Add %lo16() and %hi16(). (parse_lab_5_3): Make valuep a bfd_vma *. [gas] * config/tc-m32c.c (md_cgen_lookup_reloc): Add 8 bit operands. Support %mod() modifiers from opcodes. * doc/c-m32c.texi (M32C-Modifiers): New section. [include/elf] * m32c.h: Add R_M32C_8, R_M32C_LO16, R_M32C_HI8, and R_M32C_HI16. [opcodes] * m32c-asm.c Regenerate. * m32c-dis.c Regenerate.
2005-07-25bfd/H.J. Lu2-0/+10
2005-07-25 Jan Hubicka <jh@suse.cz> H.J. Lu <hongjiu.lu@intel.com> * elf-bfd.h (_bfd_elf_large_com_section): New. * elf.c (_bfd_elf_large_com_section): New. Defined. * elf64-x86-64.c (elf64_x86_64_add_symbol_hook): New. (elf64_x86_64_elf_section_from_bfd_section): New. (elf64_x86_64_symbol_processing): New. (elf64_x86_64_common_definition): New. (elf64_x86_64_common_section_index): New. (elf64_x86_64_common_section): New. (elf64_x86_64_merge_symbol): New. (elf64_x86_64_additional_program_headers): New. (elf64_x86_64_special_sections): New. (elf_backend_section_from_bfd_section): New. Defined. (elf_backend_add_symbol_hook): Likewise. (elf_backend_common_section_index): Likewise. (elf_backend_common_section): Likewise. (elf_backend_common_definition): Likewise. (elf_backend_merge_symbol): Likewise. (elf_backend_special_sections): Likewise. (elf_backend_additional_program_headers): Likewise. binutils/ 2005-07-25 H.J. Lu <hongjiu.lu@intel.com> * readelf.c (dump_relocations): Handle SHN_X86_64_LCOMMON. (get_symbol_index_type): Likewise. (get_elf_section_flags): Handle SHF_X86_64_LARGE. gas/ 2005-07-25 Jan Hubicka <jh@suse.cz> H.J. Lu <hongjiu.lu@intel.com> * config/obj-elf.c: Include "elf/x86-64.h" if TC_I386 is defined. (elf_com_section_ptr): New. (elf_begin): Set elf_com_section_ptr to bfd_com_section_ptr. (elf_common_parse): Make it global. Use elf_com_section_ptr instead of bfd_com_section_ptr. (obj_elf_change_section): Handle x86-64 large bss sections. * config/obj-elf.h (elf_com_section_ptr): New. (elf_common_parse): New. * config/tc-i386.c (handle_large_common): New. (md_pseudo_table): Add "largecomm". (x86_64_section_letter): New. (x86_64_section_word): New. * config/tc-i386.h (x86_64_section_word): New. (x86_64_section_letter): New. (md_elf_section_letter): New. Defined. (md_elf_section_word): Likewise. include/elf/ 2005-07-25 Jan Hubicka <jh@suse.cz> * x86-64.h (SHN_X86_64_LCOMMON): New. (SHF_X86_64_LARGE): New. ld/ 2005-07-25 Jan Hubicka <jh@suse.cz> H.J. Lu <hongjiu.lu@intel.com> * emulparams/elf_x86_64.sh (LARGE_SECTIONS): New. * scripttempl/elf.sc: Updated for large section support.
2005-07-20Add support for a 32bit PC relative relocNick Clifton2-0/+7
2005-07-18binutils/Ben Elliston2-3/+7
* readelf.c (read_and_display_attr_value): Handle a DW_AT_encoding value of DW_ATE_decimal_float instead of DW_ATE_GNU_decimal_float. include/elf/ * dwarf2.h (enum dwarf_type): Remove DW_AT_GNU_decimal_float. Replace with DW_ATE_decimal_float (now in DWARF 3).
2005-07-14ChangeLog:Jim Blandy3-0/+58
2005-07-14 Jim Blandy <jimb@redhat.com> * configure.in: Add cases for Renesas m32c. * configure: Regenerated. bfd/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for m32c-*-elf (Renesas m32c and m16c). * Makefile.am (ALL_MACHINES): Add cpu-m32c.lo. (ALL_MACHINES_CFILES): Add cpu-m32c.c. (BFD32_BACKENDS): Add elf32-m32c.lo. (BFD32_BACKENDS_CFILES): Add elf32-m32c.c. (cpu-m32c.lo, elf32-m32c.lo): New rules, generated by 'make dep-am'. * Makefile.in: Regenerated. * archures.c (bfd_arch_m32c, bfd_mach_m16c, bfd_mach_m32c): New arch and mach codes. (bfd_m32c_arch): New arch info object. (bfd_archures_list): List bfd_m32c_arch. * bfd-in2.h: Regenerated. * config.bfd: Add case for the m32c. * configure.in: Add case for the m32c. * configure: Regenerated. * cpu-m32c.c, elf32-m32c.c: New files. * libbfd.h: Regenerated. * targets.c (bfd_elf32_m32c_vec): Declare. (_bfd_target_vector): List bfd_elf32_m32c_vec. binutils/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * readelf.c: #include "elf/m32c.h" (guess_is_rela, dump_relocations, get_machine_name): Add cases for EM_M32C. * Makefile.am (readelf.o): Update dependencies. * Makefile.in: Regenerated. cpu/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * m32c.cpu, m32c.opc: Machine description for the Renesas M32C. gas/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C. * Makefile.am (CPU_TYPES): List m32c. (TARGET_CPU_CFILES): List config/tc-m32c.c. (TARGET_CPU_HFILES): List config/tc-m32c.h. * configure.in: Add case for m32c. * configure.tgt: Add cases for m32c and m32c-*-elf. * configure: Regenerated. * config/tc-m32c.c, config/tc-m32c.h: New files. * doc/Makefile.am (CPU_DOCS): Add c-m32c.texi. * doc/Makefile.in: Regenerated. * doc/all.texi: Set M32C. * doc/as.texinfo: Add text for the M32C-specific options and line comment characters, and refer to c-m32c.texi. * doc/c-m32c.texi: New file. include/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * dis-asm.h (print_insn_m32c): New declaration. include/elf/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for Renesas M32C and M16C. * common.h (EM_M32C): New machine number. * m32c.h: New file. ld/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C and M16C. * Makefile.am (ALL_EMULATIONS): Add eelf32m32c.o. (eelf32m32c.c): New target. * Makefile.in: Regenerated. * configure.tgt: Add case for m32c-*-elf. * emulparams/elf32m32c.sh: New file. opcodes/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C and M16C. * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New. * m32c-desc.h, m32c-opc.h: New. * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h. (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c. (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo, m32c-opc.lo. (CLEANFILES): List stamp-m32c. (M32C_DEPS): List stamp-m32c, if CGEN_MAINT. (CGEN_CPUS): Add m32c. (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c) (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS. (m32c_opc_h): New variable. (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo) (m32c-opc.lo): New rules. * Makefile.in: Regenerated. * configure.in: Add case for bfd_m32c_arch. * configure: Regenerated. * disassemble.c (ARCH_m32c): New. [ARCH_m32c]: #include "m32c-desc.h". (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c. (disassemble_init_for_target) [ARCH_m32c]: Same. * cgen-ops.h, cgen-types.h: New files. * Makefile.am (HFILES): List them. * Makefile.in: Regenerated.
2005-06-17 * elf/external.h (GRP_ENTRY_SIZE): Define.Jakub Jelinek1-1/+4
* readelf.c (CHECK_ENTSIZE_VALUES, CHECK_ENTSIZE): Define. (process_section_headers): Use it. (process_relocs): Don't crash if symsec is not SHT_SYMTAB or SHT_DYNSYM. (process_version_sections): Use sizeof (Elf_External_Versym) instead of sh_entsize.
generated by cgit v1.1 at 2024-12-24 07:22:44 +0000