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2001-01-11Updated ARC assembler from arccores.comNick Clifton3-10/+20
2000-12-12Fix Formatting.Nick Clifton2-3/+7
2000-12-11 * hppa.h (DT_HP_*): Define relative to OLD_DT_LOOS for hpuxJeff Law2-13/+21
compatibility.
2000-12-02Add MIPS SB1 machineNick Clifton2-0/+3
2000-12-02Add MIPS V and MIPS 64 machine numbersNick Clifton2-0/+8
2000-12-01Add MIPS32 as a seperate MIPS architectureNick Clifton2-3/+10
2000-11-30Add x86-64 support files.Nick Clifton3-0/+52
2000-11-27 * common.h (e_machine numbers): Clarify comments to describe howHans-Peter Nilsson2-6/+20
EM_* constants are assigned. Move EM_PJ from official section to ad-hoc section. (EM_CRIS): Correct comment to match official description. (EM_MMIX): Ditto.
2000-11-22Add new ELF ABI definesNick Clifton2-31/+61
2000-11-202000-11-20 H.J. Lu <hjl@gnu.org>H.J. Lu2-1/+6
* common.h (ELFOSABI_MONTEREY): Renamed to ... (ELFOSABI_AIX): This.
2000-11-16 Update relocations per August psABI docs.Richard Henderson2-60/+81
* ia64.h (R_IA64_SEGBASE): Remove. (R_IA64_LTV*): Renumber to 0x74 to 0x77. (R_IA64_EPLTMSB, R_IA64_EPLTLSB): Remove. (R_IA64_TPREL14, R_IA64_TPREL64I): New. (R_IA64_DTPMOD*): New. (R_IA64_DTPREL*): New.
2000-09-29 * cris.h (EF_CRIS_UNDERSCORE): New.Hans-Peter Nilsson2-0/+7
2000-09-27.plt stub for lazy linking, --stub-group-size=N ld switch,Alan Modra2-0/+7
import stub fix, extra DIR14F reloc to fix abort in tc_gen_reloc
2000-09-14* sh.h (R_SH_GOT32, R_SH_PLT32, R_SH_COPY, R_SH_GLOB_DAT,Alexandre Oliva2-9/+20
R_SH_JMP_SLOT, R_SH_RELATIVE, R_SH_GOTOFF, R_SH_GOTPC): Change numbers to the range from 160 to 167. (R_SH_FIRST_INVALID_RELOC): Adjust. (R_SH_FIRST_INVALID_RELOC_2, R_SH_LAST_INVALID_RELOC_2): New relocs to fill in the gap.
2000-09-14Add support for the MIPS32Nick Clifton2-1/+7
2000-09-05Add some reloc types.Alan Modra2-1/+14
2000-09-02* sh.h (R_SH_GOT32, R_SH_PLT32, R_SH_COPY, R_SH_GLOB_DAT,Alexandre Oliva2-1/+15
R_SH_JMP_SLOT, R_SH_RELATIVE, R_SH_GOTOFF, R_SH_GOTPC): New relocs. (R_SH_FIRST_INVALID_RELOC): Adjust.
2000-08-14Add support for IA-64 specific elf header flags.Jim Wilson2-1/+13
bfd/ 2000-08-14 Jim Wilson <wilson@cygnus.com> * elf64-ia64.c (elf64_ia64_merge_private_bfd_data): Handle EF_IA_64_REDUCEDFP, EF_IA_64_CONS_GP, and EF_IA_64_NOFUNCDESC_CONS_GP. (elf64_ia64_print_private_bfd_data): Likewise. Also handle EF_IA_64_ABSOLUTE. gas/ 2000-08-14 Jim Wilson <wilson@cygnus.com> * config/tc-ia64.c (md_longopts): Add -mconstant-gp and -mauto-pic. (md_parse_option): Add OPTION_MCONSTANT_GP and OPTION_MAUTO_PIC. (md_begin): Change assignment to md.flag to OR in the new bit. include/elf/ 2000-08-14 Jim Wilson <wilson@cygnus.com> * elf/ia64.h (EF_IA_64_REDUCEDFP, EF_IA_64_CONS_GP, EF_IA_64_NOFUNCDESC_CONS_GP, EF_IA_64_ABSOLUTE): Define.
2000-08-07Remove spurious CYGNUS LOCAL commentsNick Clifton3-8/+10
2000-07-282000-07-22 Jason Eckhardt <jle@cygnus.com>Jason Eckhardt1-0/+66
* include/opcode/i860.h (btne, bte, bla): Changed these opcodes to use sbroff ('r') instead of split16 ('s'). (J, K, L, M): New operand types for 16-bit aligned fields. (ld.x, {p}fld.x, fst.x, pst.d): Changed these opcodes to use I, J, K, L, M instead of just I. (T, U): New operand types for split 16-bit aligned fields. (st.x): Changed these opcodes to use S, T, U instead of just S. (andh, andnoth, orh, xorh): Deleted 3-register forms as they do not exist on the i860. (pfgt.sd, pfle.sd): Deleted these as they do not exist on the i860. (pfeq.ss, pfeq.dd): New opcodes. (st.s): Fixed incorrect mask bits. (fmlow): Fixed incorrect mask bits. (fzchkl, pfzchkl): Fixed incorrect mask bits. (faddz, pfaddz): Fixed incorrect mask bits. (form, pform): Fixed incorrect mask bits. (pfld.l): Fixed incorrect mask bits. (fst.q): Fixed incorrect mask bits. (all floating point opcodes): Fixed incorrect mask bits for handling of dual bit. * include/elf/i860.h: New file. (elf_i860_reloc_type): Defined ELF32 i860 relocations. * bfd/cpu-i860.c: Added comments. * bfd/elf32-i860.c (TARGET_LITTLE_SYM): Defined to bfd_elf32_i860_little_vec. (TARGET_LITTLE_NAME): Defined to "elf32-i860-little". (ELF_MAXPAGESIZE): Changed to 4096. * bfd/targets.c (bfd_elf32_i860_little_vec): Declaration of new target. (bfd_target_vector): Added bfd_elf32_i860_little_vec. * bfd/config.bfd (i860-stardent-sysv4*, i860-stardent-elf*): Added config for little endian elf32 i860. (targ_defvec): Define for the new config above as "bfd_elf32_i860_little_vec". (targ_selvecs): Define for the new config above as "bfd_elf32_i860_vec bfd_elf32_i860_little_vec" * bfd/configure.in (bfd_elf32_i860_little_vec): Added recognition of new target vec. * bfd/configure: Regenerated. * opcodes/i860-dis.c: New file. (print_insn_i860): New function. (print_br_address): New function. (sign_extend): New function. (BITWISE_OP): New macro. (I860_REG_PREFIX): New macro. (grnames, frnames, crnames): New structures. * opcodes/disassemble.c (ARCH_i860): Define. (disassembler): Add check for bfd_arch_i860 to set disassemble function to print_insn_i860. * include/dis-asm.h (print_insn_i860): Add prototype. * opcodes/Makefile.in (CFILES): Added i860-dis.c. (ALL_MACHINES): Added i860-dis.lo. (i860-dis.lo): New dependences. * opcodes/configure.in: New bits for bfd_i860_arch. * opcodes/configure: Regenerated.
2000-07-20 common.h (EM_CRIS): New machine number.Hans-Peter Nilsson3-0/+50
cris.h: New file.
2000-07-192000-07-19 H.J. Lu <hjl@gnu.org>H.J. Lu2-1/+5
* common.h (DF_1_NODEFLIB): Renamed from DF_1_NODEPLIB.
2000-07-192000-07-19 H.J. Lu <hjl@gnu.org>H.J. Lu2-11/+9
* common.h (DT_CHECKSUM): Set to 0x6ffffdf8. (DTF_1_CONFEXP): It is 0x00000002 as suspected.
2000-07-192000-07-19 H.J. Lu <hjl@gnu.org>H.J. Lu2-2/+40
* common.h (DT_FEATURE): Renamed from DT_FEATURE_1. (DT_CONFIG): New. From Solaris 8. (DT_DEPAUDIT): Likewise. (DT_AUDIT): Likewise. (DT_PLTPAD): Likewise. (DT_MOVETAB): Likewise. (DF_1_NODEPLIB): Likewise. (DF_1_NODUMP): Likewise. (DF_1_CONLFAT): Likewise. (DT_CHECKSUM): Likewise. FIXME. Check the value on Solaris 8. (DTF_1_CONFEXP): Likewise.
2000-07-192000-07-18 H.J. Lu <hjl@gnu.org>H.J. Lu2-1/+5
* common.h (DT_FLAGS_1): Renamed from DT_1_FLAGS.
2000-07-12Update comment.Alan Modra2-2/+7
2000-07-10Comment the relocs.Alan Modra2-185/+373
2000-06-27Applied Marek Michalkiewicz <marekm@linux.org.pl>'s patch to ehance the AVR ↵Nick Clifton2-0/+5
port.
2000-06-19Applied Stephane Carrez <Stephane.Carrez@worldnet.fr> patches to add supportNick Clifton2-0/+66
for m68hc11 and m68hc12 processors.
2000-06-07Update copyright dates for last patch.Alan Modra21-49/+50
Scanning ChangeLog showed others were lazy/forgetful too :-)
2000-06-07Get rid of the -1 dummy valued enum in START_RELOC_NUMBERS.Alan Modra24-61/+69
Remove duplicate reloc enums in elf32-d[13]0v.c Remove EMPTY_HOWTOs in elf32-i386.c
2000-06-03Fix name clashAlan Modra2-10/+16
2000-05-28Include year 2000 in copyright messageNick Clifton2-2/+2
2000-05-23 * ia64.h (R_IA64_PCREL60B, R_IA64_PCREL21BI): New.Richard Henderson2-1/+11
(R_IA64_PCREL22, R_IA64_PCREL64I): New.
2000-05-022000-05-02 H.J. Lu <hjl@gnu.org>H.J. Lu2-1/+9
* common.h (ELFOSABI_NONE): Renamed from ELFOSABI_SYSV. (ELFOSABI_MODESTO): Defined. (ELFOSABI_OPENBSD): Likewise.
2000-04-21IA-64 ELF support.Jim Wilson2-0/+172
2000-04-142000-04-14 H.J. Lu <hjl@gnu.org>H.J. Lu2-1/+5
* common.h (ELFOSABI_TRUE64): Renamed to ELFOSABI_TRU64.
2000-04-142000-04-14 H.J. Lu <hjl@gnu.org>H.J. Lu2-0/+17
* common.h (ELFOSABI_NETBSD): Defined. (ELFOSABI_HURD): Likewise. (ELFOSABI_SOLARIS): Likewise. (ELFOSABI_MONTEREY): Likewise. (ELFOSABI_IRIX): Likewise. (ELFOSABI_FREEBSD): Likewise. (ELFOSABI_TRUE64): Likewise.
2000-04-08Merge arm-oabi.h into arm.hNick Clifton3-127/+65
2000-04-06Add definitions of flags in e_flags field from version A-08 of ARM ELF spec.Nick Clifton2-0/+20
2000-04-05sh-dsp REPEAT support:Joern Rennecke2-1/+7
opcodes: * sh-opc.h (sh_nibble_type): Remove DISP_8 and DISP_4. Split IMM_[48]{,BY[24]} into IMM[01]_[48]{,BY[24]}. Add REPEAT. (sh_arg_type): Add A_PC. (sh_table): Update entries using immediates. Add repeat. * sh-dis.c (print_insn_shx): Remove DISP_8 and DISP_4. Split IMM_[48]{,BY[24]} into IMM[01]_[48]{,BY[24]}. Add REPEAT. gas: * config/tc-sh.c (immediate): Delete. (sh_operand_info): Add immediate member. (parse_reg): Use A_PC for pc. (parse_exp): Add second argument 'op'. All callers changed. (parse_at): Expect pc to be coded as A_PC. Use immediate field in *op. (insert): Add fourth argument 'op'. All callers changed. (build_relax): Add second argument 'op'. All callers changed. (insert_loop_bounds): New function. (build_Mytes): Remove DISP_4. Split IMM_[48]{,BY[24]} into IMM[01]_[48]{,BY[24]}. Add REPEAT. (assemble_ppi): Use immediate field in *operand. (sh_force_relocation): Handle BFD_RELOC_SH_LOOP_{START,END}. (md_apply_fix): Likewise. (tc_gen_reloc): Likewise. Check for a pcrel BFD_RELOC_SH_LABEL. include/coff: * sh.h (R_SH_LOOP_START, R_SH_LOOP_END): Define. include/elf: * sh.h (R_SH_LOOP_START, R_SH_LOOP_END): New RELOC_NUMBERs. bfd: * reloc.c (_bfd_relocate_contents): Add BFD_RELOC_SH_LOOP_START and BFD_RELOC_SH_LOOP_END. * elf32-sh.c (sh_elf_howto_tab): Change special_func to sh_elf_ignore_reloc for all entries that sh_elf_reloc used to ignore. Add entries for R_SH_LOOP_START and R_SH_LOOP_END. (sh_elf_reloc_loop): New function. (sh_elf_reloc): No need to test for always-to-be-ignored relocs any more. (sh_rel): Add entries for BFD_RELOC_SH_LOOP_{START,END}. (sh_elf_relocate_section): Handle BFD_RELOC_SH_LOOP_{START,END}. * bfd-in2.h, libbfd.h: Regenerate.
2000-03-27ATMEL AVR microcontroller support.Alan Modra3-0/+67
2000-03-11In bfd/:Geoffrey Keating2-0/+12
* elf32-mips.c (mips_elf_next_relocation): Rename from mips_elf_next_lo16_relocation, and generalize to look for any relocation type. (elf_mips_howto_table): Make R_MIPS_PC16 pcrel_offset. (elf_mips_gnu_rel_hi16): Howto for R_MIPS_GNU_REL_HI16. (elf_mips_gnu_rel_lo16): Howto for R_MIPS_GNU_REL_LO16. (elf_mips_gnu_rel16_s2): Howto for R_MIPS_GNU_REL16_S2. (elf_mips_gnu_pcrel64): Howto for R_MIPS_PC64. (elf_mips_gnu_pcrel32): Howto for R_MIPS_PC32. (bfd_elf32_bfd_reloc_type_lookup): Add new relocs. (mips_rtype_to_howto): Likewise. (mips_elf_calculate_relocation): Handle new relocs. (_bfd_mips_elf_relocate_section): REL_HI16/REL_LO16 relocs are paired. The addend for R_MIPS_GNU_REL16_S2 is shifted right two bits. In gas/: * config/tc-mips.c (mips_ip): Don't put stuff in .rodata when embedded-pic. * config/tc-mips.c (SWITCH_TABLE): The ELF embedded-pic implementation doesn't have special handling for switch statements. (macro_build): Allow for code in sections other than .text. (macro): Likewise. (mips_ip): Likewise. (md_apply_fix): Do pc-relative relocation madness for MIPS ELF. Don't perform relocs if we will be outputting them. (tc_gen_reloc): For ELF, just use fx_addnumber for pc-relative relocations. Allow BFD_RELOC_16_PCREL_S2 relocs when embedded-pic. In gas/testsuite/: * gas/mips/empic.d: New file. * gas/mips/empic.s: New file. * gas/mips/mips16-e.d: New file. * gas/mips/mips16-e.s: New file. * gas/mips/mips16-f.d: New file. * gas/mips/mips16-f.s: New file. * gas/mips/mips.exp: Add empic, mips16-e. Add mips16-f as an expected failure. In include/elf: * mips.h: Add R_MIPS_GNU_REL_HI16, R_MIPS_GNU_REL_LO16, R_MIPS_GNU_REL16_S2, R_MIPS_PC64 and R_MIPS_PC32 relocation numbers.
2000-02-23Add IBM 370 support.Alan Modra2-0/+50
2000-02-22Updated comment.Nick Clifton1-1/+1
2000-02-22Remove use of ELF_ST_OTHER.Nick Clifton2-3/+8
2000-02-222000-02-22 H.J. Lu <hjl@gnu.org>Ian Lance Taylor2-1/+7
* common.h (ELFOSABI_LINUX): Define.
2000-02-17bfd:Joern Rennecke2-0/+33
Reinstate bits of sh4 support that got accidentally deleted. Add sh-dsp support. bfd: * archures.c (bfd_mach_sh2, bfd_mach_sh_dsp): New macros. (bfd_mach_sh3_dsp): Likewise. (bfd_mach_sh4): Reinstate. (bfd_default_scan): Recognize 7410, 7708, 7729 and 7750. * bfd-in2.h: Regenerate. * coff-sh.c (struct sh_opcode): flags is no longer short. (USESAS, USESAS_REG, USESR8, SETSAS, SETSAS_REG): New macros. (sh_opcode41, sh_opcode42): Integrate as sh_opcode41. (sh_opcode01, sh_opcode02, sh_opcode40): Add sh-dsp opcodes. (sh_opcode41, sh_opcode4, sh_opcode80): Likewise. (sh_opcodes): No longer const. (sh_dsp_opcodef0, sh_dsp_opcodef): New arrays. (sh_insn_uses_reg): Check for USESAS and USESR8. (sh_insn_sets_reg, sh_insns_conflict): Check for SETSAS. (_bfd_sh_align_load_span): Return early for SH4. Modify sh_opcodes lookup table for sh-dsp / sh3-dsp. Take into account that field b of a parallel processing insn could be mistaken for a separate insn. * cpu-sh.c (arch_info_struct): New array elements for sh2, sh-dsp and sh3-dsp. Reinstate element for sh4. (SH2_NEXT, SH_DSP_NEXT, SH3_DSP_NEXT): New macros. (SH4_NEXT): Reinstate. (SH3_NEXT, SH3E_NEXT): Adjust. * elf-bfd.h (_sh_elf_set_mach_from_flags): Declare. * elf32-sh.c (sh_elf_set_private_flags): New function. (sh_elf_copy_private_data, sh_elf_set_mach_from_flags): Likewise. (sh_elf_merge_private_data): New function. (elf_backend_object_p, bfd_elf32_bfd_set_private_bfd_flags): Define. (bfd_elf32_bfd_copy_private_bfd_data): Define. (bfd_elf32_bfd_merge_private_bfd_data): Change to sh_elf_merge_private_data. gas: * config/tc-sh.c ("elf/sh.h"): Include. (sh_dsp, valid_arch, reg_x, reg_y, reg_efg): New static variables. (md.begin): Initialize target_arch. Only include opcodes in has table that match selected architecture. (parse_reg): Recognize register names for sh-dsp. (parse_at): Recognize post-modify addressing. (get_operands): The leading space is now optional. (get_specific): Remove FDREG_N support. Add support for sh-dsp arguments. Update valid_arch. (build_Mytes): Add support for SDT_REG_N. (find_cooked_opcode): New function, broken out of md_assemble. (assemble_ppi, sh_elf_final_processing): New functions. (md_assemble): Use find_cooked_opcode and assemble_ppi. (md_longopts, md_parse_option): New option: -dsp. * config/tc-sh.h (elf_tc_final_processing): Define. (sh_elf_final_processing): Declare. include/elf: * sh.h: (EF_SH_MACH_MASK, EF_SH_UNKNOWN, EF_SH1, EF_SH2): New macros. (EF_SH3, EF_SH_HAS_DSP, EF_SH_DSP, EF_SH3_DSP): Likewise. (EF_SH_HAS_FP, EF_SH3E, EF_SH4, EF_SH_MERGE_MACH): Likewise. opcodes: * sh-dis.c (print_movxy, print_insn_ddt, print_dsp_reg): New functions. (print_insn_ppi): Likewise. (print_insn_shx): Use info->mach to select appropriate insn set. Add support for sh-dsp. Remove FD_REG_N support. * sh-opc.h (sh_nibble_type): Add new values for sh-dsp support. (sh_arg_type): Likewise. Remove FD_REG_N. (sh_dsp_reg_nums): New enum. (arch_sh1, arch_sh2, arch_sh3, arch_sh3e, arch_sh4): New macros. (arch_sh_dsp, arch_sh3_dsp, arch_sh1_up, arch_sh2_up): Likewise. (arch_sh3_up, arch_sh3e_up, arch_sh4_up, arch_sh_dsp_up): Likewise. (arch_sh3_dsp_up): Likewise. (sh_opcode_info): New field: arch. (sh_table): Split up insn with FD_REG_N into ones with F_REG_N and D_REG_N. Fill in arch field. Add sh-dsp insns.
2000-02-03Apply H>J's patch to propogate changes made by Thomas de Lellis to arm.hNick Clifton2-19/+25
2000-01-27Apply Thoams de Lellis's patch to fic disassembly of Thumb instructions whenNick Clifton2-11/+18
bounded by non-function labels.
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