Age | Commit message (Collapse) | Author | Files | Lines | |
---|---|---|---|---|---|
2001-11-11 | Clarify length reference in comment | Timothy Wall | 1 | -1/+1 | |
2001-10-30 | Add MMIX support | Nick Clifton | 1 | -16/+17 | |
2001-04-27 | Add openRISC support in opcodes | Nick Clifton | 1 | -0/+1 | |
2001-03-14 | Fix typos in ChangeLogs; add coff/external.h; fix copyright dates | Nick Clifton | 1 | -0/+18 | |
2001-02-18 | Add PDP-11 support | Nick Clifton | 1 | -0/+1 | |
2001-02-10 | Add s390 support | Nick Clifton | 1 | -0/+1 | |
2001-01-11 | Updated ARC assembler from arccores.com | Nick Clifton | 1 | -1/+1 | |
2000-12-18 | * dis-asm.h (struct disassemble_info): New member "section". | Hans-Peter Nilsson | 1 | -0/+7 | |
(INIT_DISASSEMBLE_INFO_NO_ARCH): Initialize private_data member. Initialize section member. | |||||
2000-09-29 | * dis-asm.h: Declare cris_get_disassembler, not print_insn_cris. | Hans-Peter Nilsson | 1 | -2/+2 | |
Fix typo in comment. | |||||
2000-07-28 | 2000-07-22 Jason Eckhardt <jle@cygnus.com> | Jason Eckhardt | 1 | -0/+1 | |
* include/opcode/i860.h (btne, bte, bla): Changed these opcodes to use sbroff ('r') instead of split16 ('s'). (J, K, L, M): New operand types for 16-bit aligned fields. (ld.x, {p}fld.x, fst.x, pst.d): Changed these opcodes to use I, J, K, L, M instead of just I. (T, U): New operand types for split 16-bit aligned fields. (st.x): Changed these opcodes to use S, T, U instead of just S. (andh, andnoth, orh, xorh): Deleted 3-register forms as they do not exist on the i860. (pfgt.sd, pfle.sd): Deleted these as they do not exist on the i860. (pfeq.ss, pfeq.dd): New opcodes. (st.s): Fixed incorrect mask bits. (fmlow): Fixed incorrect mask bits. (fzchkl, pfzchkl): Fixed incorrect mask bits. (faddz, pfaddz): Fixed incorrect mask bits. (form, pform): Fixed incorrect mask bits. (pfld.l): Fixed incorrect mask bits. (fst.q): Fixed incorrect mask bits. (all floating point opcodes): Fixed incorrect mask bits for handling of dual bit. * include/elf/i860.h: New file. (elf_i860_reloc_type): Defined ELF32 i860 relocations. * bfd/cpu-i860.c: Added comments. * bfd/elf32-i860.c (TARGET_LITTLE_SYM): Defined to bfd_elf32_i860_little_vec. (TARGET_LITTLE_NAME): Defined to "elf32-i860-little". (ELF_MAXPAGESIZE): Changed to 4096. * bfd/targets.c (bfd_elf32_i860_little_vec): Declaration of new target. (bfd_target_vector): Added bfd_elf32_i860_little_vec. * bfd/config.bfd (i860-stardent-sysv4*, i860-stardent-elf*): Added config for little endian elf32 i860. (targ_defvec): Define for the new config above as "bfd_elf32_i860_little_vec". (targ_selvecs): Define for the new config above as "bfd_elf32_i860_vec bfd_elf32_i860_little_vec" * bfd/configure.in (bfd_elf32_i860_little_vec): Added recognition of new target vec. * bfd/configure: Regenerated. * opcodes/i860-dis.c: New file. (print_insn_i860): New function. (print_br_address): New function. (sign_extend): New function. (BITWISE_OP): New macro. (I860_REG_PREFIX): New macro. (grnames, frnames, crnames): New structures. * opcodes/disassemble.c (ARCH_i860): Define. (disassembler): Add check for bfd_arch_i860 to set disassemble function to print_insn_i860. * include/dis-asm.h (print_insn_i860): Add prototype. * opcodes/Makefile.in (CFILES): Added i860-dis.c. (ALL_MACHINES): Added i860-dis.lo. (i860-dis.lo): New dependences. * opcodes/configure.in: New bits for bfd_i860_arch. * opcodes/configure: Regenerated. | |||||
2000-07-20 | * dis-asm.h (print_insn_cris): Declare. | Hans-Peter Nilsson | 1 | -0/+1 | |
2000-06-19 | Applied Stephane Carrez <Stephane.Carrez@worldnet.fr> patches to add support | Nick Clifton | 1 | -0/+2 | |
for m68hc11 and m68hc12 processors. | |||||
2000-05-08 | (print_insn_tic54x): Declare. | Alan Modra | 1 | -0/+1 | |
2000-04-21 | IA-64 ELF support. | Jim Wilson | 1 | -0/+1 | |
2000-03-27 | ATMEL AVR microcontroller support. | Alan Modra | 1 | -0/+1 | |
2000-02-23 | Add IBM 370 support. | Alan Modra | 1 | -0/+1 | |
2000-02-21 | This lot mainly cleans up `comparison between signed and unsigned' gcc | Alan Modra | 1 | -4/+4 | |
warnings. One usused var, and a macro parenthesis fix too. Also check input sections are elf when doing gc in elflink.h. | |||||
2000-02-16 | Add prototypes for ARM register name functions. | Nick Clifton | 1 | -0/+3 | |
2000-02-03 | octets vs bytes changes for binutils | Timothy Wall | 1 | -0/+6 | |
2000-01-28 | Add prototype for parse_arm_diassembler_option | Nick Clifton | 1 | -0/+1 | |
2000-01-27 | Add ATPCS support to ARM disassembler. | Nick Clifton | 1 | -1/+1 | |
Document ARM disassembler options. | |||||
2000-01-27 | Add support for documenting target specific disassembler options | Nick Clifton | 1 | -0/+3 | |
1999-12-16 | 1999-12-15 Doug Evans <dje@transmeta.com> | Ian Lance Taylor | 1 | -0/+8 | |
* dis-asm.h: Enclose in extern "C" ifdef __cplusplus. | |||||
1999-09-04 | 1999-09-04 Steve Chamberlain <sac@pobox.com> | Ian Lance Taylor | 1 | -0/+1 | |
* dis-asm.h (print_insn_pj): Declare. | |||||
1999-06-16 | Add -M command line switch to objdump - text of switch is passed on to ↵ | Nick Clifton | 1 | -0/+5 | |
disassembler Add support for register name set selection ot ARM disassembler. | |||||
1999-05-03 | 19990502 sourceware importbinu_ss_19990502 | Richard Henderson | 1 | -0/+243 | |