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AgeCommit message (Expand)AuthorFilesLines
2019-01-31S/390: Implement instruction set extensionsAndreas Krebbel1-0/+5
2019-01-25AArch64: Remove ldgv and stgv instructions from Armv8.5-A Memory Tagging Exte...Sudi Das1-0/+7
2019-01-22Include coff/sym.h from coff/ecoff.hTom Tromey1-0/+4
2019-01-19Add markers for 2.32 branch to NEWS and ChangeLog files.Nick Clifton1-0/+4
2019-01-16RISC-V: Support ELF attribute for gas and readelf.Jim Wilson1-0/+10
2019-01-14Include <string.h> to dis-asm.h to get strchr declarationПавел Крюков1-0/+4
2019-01-10Sync libiberty sources with gcc master versions.Nick Clifton1-1/+8
2019-01-09Merge from gcc: use "cannot" instead of "can not" in libiberty and include.Sandra Loosemore1-0/+8
2019-01-05RX: include - Add RXv3 support.Yoshinori Sato1-0/+9
2019-01-01Update year range in copyright notice of binutils filesAlan Modra1-0/+4
2019-01-01ChangeLog rotationAlan Modra1-878/+2
2018-12-28PR24028, PPC_INT_FMTAlan Modra1-0/+5
2018-12-14elf: Add PT_GNU_PROPERTY segment typeH.J. Lu1-0/+6
2018-12-11Fix a failure in the libiberty testsuite by increasing the recursion limit to...Nick Clifton1-0/+5
2018-12-07elf: Report property change when merging propertiesH.J. Lu1-0/+4
2018-12-07Synchronize libiberty with gcc and add --no-recruse-limit option to tools tha...Nick Clifton1-0/+5
2018-12-06PowerPC @l, @h and @ha warnings, plus VLE e_liAlan Modra1-0/+4
2018-12-06opcodes/riscv: Hide '.L0 ' fake symbolsAndrew Burgess1-0/+6
2018-12-03RISC-V: Accept version, supervisor ext and more than one NSE for -march.Jim Wilson1-0/+5
2018-11-27RISC-V: Add .insn CA support.Jim Wilson1-0/+5
2018-11-13[ARM] Improve indentation of ARM architecture declarationsThomas Preud'homme1-0/+59
2018-11-12[BINUTILS, AARCH64, 6/8] Add Tag getting instruction in Memory Tagging ExtensionSudakshina Das1-0/+5
2018-11-12[BINUTILS, AARCH64, 4/8] Add Tag setting instructions in Memory Tagging Exten...Sudakshina Das1-0/+6
2018-11-12[BINUTILS, AARCH64, 2/8] Add Tag generation instructions in Memory Tagging Ex...Sudakshina Das1-0/+5
2018-11-12[BINUTILS, AARCH64, 1/8] Add support for Memory Tagging Extension for ARMv8.5-ASudakshina Das1-0/+4
2018-11-07Add support for new load commands added by Apple to the MACH-O file format.Roman Bolshakov1-0/+10
2018-11-06Add support for a couple of new Mach-O commands.Nick Clifton1-0/+5
2018-11-06[BINUTILS, ARM] Add Armv8.5-A to select_arm_features and update macros.Sudakshina Das1-0/+6
2018-10-26Support AT_HWCAP2 on FreeBSD.John Baldwin1-0/+4
2018-10-09[PATCH, BINUTULS, AARCH64, 9/9] Add SSBS to MSR/MRSSudakshina Das1-0/+5
2018-10-09[PATCH, BINUTILS, AARCH64, 8/9] Add SCXTNUM_ELx and ID_PFR2_EL1 system registersSudakshina Das1-0/+6
2018-10-09[PATCH, BINUTILS, AARCH64, 7/9] Add BTI instructionSudakshina Das1-0/+9
2018-10-09[PATCH, BINUTILS, AARCH64, 6/9] Add Random number instructionsSudakshina Das1-0/+4
2018-10-09[PATCH, BINUTILS, AARCH64, 5/9] Add DC CVADP instructionSudakshina Das1-0/+4
2018-10-09[PATCH, BINUTILS, AARCH64, 4/9] Add Execution and Data Restriction instructionsSudakshina Das1-0/+7
2018-10-09[PATCH, BINUTILS, AARCH64, 3/9] Add instruction SB for ARMv8.5-ASudakshina Das1-0/+5
2018-10-09[PATCH, BINUTILS, AARCH64, 2/9] Add Data procoessing instructions for ARMv8.5-ASudakshina Das1-0/+6
2018-10-09[PATCH, BINUTILS, AARCH64, 1/9] Add -march=armv8.5-a and related internal fea...Sudakshina Das1-0/+5
2018-10-08Separate header PT_LOAD for -z separate-codeAlan Modra1-0/+4
2018-10-05[Arm, 3/3] Add Execution and Data Prediction instructions for AArch32Sudakshina Das1-0/+5
2018-10-05[Arm, 2/3] Add instruction SB for AArch32Sudakshina Das1-0/+5
2018-10-05[Arm, 1/3] Add -march=armv8.5-a and related internal feature macros to AArch32Sudakshina Das1-0/+5
2018-10-05or1k: Add the l.adrp insn and supporting relocationsStafford Horne1-0/+8
2018-10-05or1k: Add relocations for high-signed and low-storesRichard Henderson1-0/+6
2018-10-03AArch64: Add SVE constraints verifier.Tamar Christina1-0/+8
2018-10-03AArch64: Refactor verifiers to make more general.Tamar Christina1-0/+5
2018-10-03AArch64: Refactor err_type.Tamar Christina1-0/+5
2018-10-03AArch64: Wire through instr_sequenceTamar Christina1-0/+5
2018-10-03AArch64: Mark sve instructions that require MOVPRFX constraintsTamar Christina1-0/+6
2018-10-03Make print_insn_s12z public.John Darrington1-0/+4