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Plugin isn't required on slim lto object for relocatable link.
PR ld/19317
* symtab.cc (Symbol_table::add_from_relobj): Don't complain
plugin needed to handle slim lto object for relocatable link.
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* powerpc.cc (Target_powerpc::Relocate::relocate): New constant
d_offset. Use throughout.
(Target_powerpc::relocate_relocs): Likewise.
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In an fixed position executable, the entry code does not need to be
PIC and can thus lose a dependency on r12.
* powerpc.cc (Target_powerpc::Relocate::relocate): Edit ELFv2
entry code.
(Target_powerpc::relocate_relocs): Edit relocs to suit.
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Some linker code editing needs to change multiple insns. In some
cases multiple relocations are involved and it is not sufficient to
make the changes independently as relocations are processed, because
doing so might lead to a partial edit. So in order to safely edit we
need all the relocations available in relocate(). Also, to emit
edited relocs corresponding to the edited code sequence we need some
way to pass information from relocate() to relocate_relocs(),
particularly if the edit depends on insns. We can't modify input
relocs in relocate() as they are mmapped PROT_READ, nor it is
particularly clean to write relocs to the output at that stage. So
add a Relocatable_relocs* field to relinfo to mark edited relocs.
Given that relocate is passed the raw reloc pointer, it makes sense to
remove the rel/rela parameter and r_type too. However, that means the
mips relocate() needs to know whether SHT_REL or SHT_RELA relocs are
being processed. So add a rel_type for mips, which also has the
benefit of removing relocate() overloading there.
This patch adds the infrastructure without making use of it.
Note that relinfo->rr will be NULL if not outputting relocations.
* object.h (struct Relocate_info): Add "rr".
* reloc.h (Relocatable_relocs::set_strategy): New accessor.
* reloc.cc (Sized_relobj_file::do_relocate_sections): Init
relinfo.rr for relocate_section and relocate_relocs.
* powerpc.cc (relocate): Add rel_type and preloc parameters.
Delete rela and r_type params, instead recalculate these from
preloc.
(relocate_relocs): Delete Relocatable_relocs* param, instead
use relinfo->rr.
* aarch64.cc: Likewise.
* arm.cc: Likewise.
* i386.cc: Likewise.
* mips.cc: Likewise.
* s390.cc: Likewise.
* sparc.cc: Likewise.
* target.h: Likewise.
* tilegx.cc: Likewise.
* x86_64.cc: Likewise.
* testsuite/testfile.cc: Likewise.
* target-reloc.h (relocate_section): Adjust to suit.
(apply_relocation, relocate_relocs): Likewise.
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elfcpp/
* powerpc.h (R_PPC64_ENTRY): Define.
gold/
* powerpc.cc (add_2_2_12, ld_2_12, lis_2): Define.
(Target_powerpc::Scan::local, global): Handle R_PPC64_ENTRY.
(Target_powerpc::Relocate::relocate): Edit code at R_PPC64_ENTRY.
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gold/
* object.cc (Sized_relobj::do_for_all_local_got_entries): Use
Local_got_entry_key for searching in local_got_offsets_.
* object.h (class Local_got_entry_key): New class.
(Relobj::local_has_got_offset): New overloaded method.
(Relobj::local_got_offset): Likewise.
(Relobj::set_local_got_offset): Likewise.
(Relobj::do_local_has_got_offset): Add addend argument.
(Relobj::do_local_got_offset): Likewise.
(Relobj::do_set_local_got_offset): Likewise.
(Sized_relobj::do_local_has_got_offset): Add addend argument, and use
Local_got_entry_key for searching through local_got_offsets_.
(Sized_relobj::do_local_got_offset): Likewise.
(Sized_relobj::do_set_local_got_offset): Likewise.
(Sized_relobj::Local_got_offsets): Change type of the key from
unsigned int to Local_got_entry_key, and add hash and equal_to.
* output.cc (Got_entry::write): Take addend into account for
calculating value of the local symbol for GOT.
(Output_data_got::add_local): New definition of overloaded method.
(Output_data_got::add_local_with_rel): Likewise.
(Output_data_got::add_local_pair_with_rel): Likewise.
* output.h (Output_data_got::add_local): New declaration of overloaded
method.
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gold/
PR gold/19291
* object.cc (Sized_relobj_file::write_local_symbols): If relocatable,
subtract section address from symbol value.
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As done in a27e685f for bfd ld.
* powerpc.cc (Output_data_got_powerpc::Output_data_got_powerpc): Align
to 256 byte boundary.
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* powerpc.cc (Target_powerpc::Scan::get_reference_flags): Correct
GOT16 and TOC16 relocs to RELATIVE_REF.
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gold/
PR gold/19244
PR gold/18548
* symtab.cc (Symbol_table::do_define_in_output_data): Check for forced
local symbols only for predefined symbols.
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include/opcode/
* ppc.h (PPC_OPCODE_POWER9): New define.
(PPC_OPCODE_VSX3): Likewise.
opcodes/
* ppc-dis.c (ppc_opts): Add "power9" and "pwr9" entries.
Add PPC_OPCODE_VSX3 to the vsx entry.
(powerpc_init_dialect): Set default dialect to power9.
* ppc-opc.c (insert_dcmxs, extract_dcmxs, insert_dxd, extract_dxd,
insert_dxdn, extract_dxdn, insert_l0, extract_l0, insert_l1,
extract_l1 insert_xtq6, extract_xtq6): New static functions.
(insert_esync): Test for illegal L operand value.
(DCMX, DCMXS, DXD, NDXD, L0, L1, RC, FC, UIM6, X_R, RIC, PRS, XSQ6,
XTQ6, LRAND, IMM8, DQX, DQX_MASK, DX, DX_MASK, VXVAPS_MASK, VXVA,XVA,
XX2VA, XVARC, XBF_MASK, XX2UIM4_MASK, XX2BFD_MASK, XX2DCMXS_MASK,
XVA_MASK, XRLA_MASK, XBFRARB_MASK, XLRAND_MASK, POWER9, PPCVEC3,
PPCVSX3): New defines.
(powerpc_opcodes) <ps_cmpu0, ps_cmpo0, ps_cmpu1, ps_cmpo1, fcmpu,
fcmpo, ftdiv, ftsqrt>: Use XBF_MASK.
<mcrxr>: Use XBFRARB_MASK.
<addpcis, bcdcfn., bcdcfsq., bcdcfz., bcdcpsgn., bcdctn., bcdctsq.,
bcdctz., bcds., bcdsetsgn., bcdsr., bcdtrunc., bcdus., bcdutrunc.,
cmpeqb, cmprb, cnttzd, cnttzd., cnttzw, cnttzw., copy, copy_first,
cp_abort, darn, dtstsfi, dtstsfiq, extswsli, extswsli., ldat, ldmx,
lwat, lxsd, lxsibzx, lxsihzx, lxssp, lxv, lxvb16x, lxvh8x, lxvl, lxvll,
lxvwsx, lxvx, maddhd, maddhdu, maddld, mcrxrx, mfvsrld, modsd, modsw,
modud, moduw, msgsync, mtvsrdd, mtvsrws, paste, paste., paste_last,
rmieg, setb, slbieg, slbsync, stdat, stop, stwat, stxsd, stxsibx,
stxsihx, stxssp, stxv, stxvb16x, stxvh8x, stxvl, stxvll, stxvx,
subpcis, urfid, vbpermd, vclzlsbb, vcmpneb, vcmpneb., vcmpneh,
vcmpneh., vcmpnew, vcmpnew., vcmpnezb, vcmpnezb., vcmpnezh, vcmpnezh.,
vcmpnezw, vcmpnezw., vctzb, vctzd, vctzh, vctzlsbb, vctzw, vextractd,
vextractub, vextractuh, vextractuw, vextsb2d, vextsb2w, vextsh2d,
vextsh2w, vextsw2d, vextublx, vextubrx, vextuhlx, vextuhrx, vextuwlx,
vextuwrx, vinsertb, vinsertd, vinserth, vinsertw, vmul10cuq,
vmul10ecuq, vmul10euq, vmul10uq, vnegd, vnegw, vpermr, vprtybd,
vprtybq, vprtybw, vrldmi, vrldnm, vrlwmi, vrlwnm, vslv, vsrv, wait,
xsabsqp, xsaddqp, xsaddqpo, xscmpeqdp, xscmpexpdp, xscmpexpqp,
xscmpgedp, xscmpgtdp, xscmpnedp, xscmpoqp, xscmpuqp, xscpsgnqp,
xscvdphp, xscvdpqp, xscvhpdp, xscvqpdp, xscvqpdpo, xscvqpsdz,
xscvqpswz, xscvqpudz, xscvqpuwz, xscvsdqp, xscvudqp, xsdivqp,
xsdivqpo, xsiexpdp, xsiexpqp, xsmaddqp, xsmaddqpo, xsmaxcdp,
xsmaxjdp, xsmincdp, xsminjdp, xsmsubqp, xsmsubqpo, xsmulqp, xsmulqpo,
xsnabsqp, xsnegqp, xsnmaddqp, xsnmaddqpo, xsnmsubqp, xsnmsubqpo,
xsrqpi, xsrqpix, xsrqpxp, xssqrtqp, xssqrtqpo, xssubqp, xssubqpo,
xststdcdp, xststdcqp, xststdcsp, xsxexpdp, xsxexpqp, xsxsigdp,
xsxsigqp, xvcmpnedp, xvcmpnedp., xvcmpnesp, xvcmpnesp., xvcvhpsp,
xvcvsphp, xviexpdp, xviexpsp, xvtstdcdp, xvtstdcsp, xvxexpdp,
xvxexpsp, xvxsigdp, xvxsigsp, xxbrd, xxbrh, xxbrq, xxbrw, xxextractuw,
xxinsertw, xxperm, xxpermr, xxspltib>: New instructions.
<doze, nap, sleep, rvwinkle, waitasec, lxvx, stxvx>: Disable on POWER9.
<tlbiel, tlbie, sync, slbmfev, slbmfee>: Add additional operands.
include/elf/
* ppc.h (R_PPC_REL16DX_HA): New reloction.
* ppc64.h (R_PPC64_REL16DX_HA): Likewise.
bfd/
* elf32-ppc.c (ppc_elf_howto_raw): Add R_PPC_REL16DX_HA.
(ppc_elf_reloc_type_lookup): Handle R_PPC_REL16DX_HA.
(ppc_elf_addr16_ha_reloc): Likewise.
(ppc_elf_check_relocs): Likewise.
(ppc_elf_relocate_section): Likewise.
(is_insn_dq_form): Handle lxv and stxv instructions.
* elf64-ppc.c (ppc64_elf_howto_raw): Add R_PPC64_REL16DX_HA.
(ppc64_elf_reloc_type_lookup): Handle R_PPC64_REL16DX_HA.
(ppc64_elf_ha_reloc): Likewise.
(ppc64_elf_check_relocs): Likewise.
(ppc64_elf_relocate_section): Likewise.
* bfd-in2.h: Regenerate.
* libbfd.h: Likewise.
* reloc.c (BFD_RELOC_PPC_REL16DX_HA): New.
elfcpp/
* powerpc.h (R_POWERPC_REL16DX_HA): Define.
gas/
* doc/as.texinfo (Target PowerPC): Document -mpower9 and -mpwr9.
* doc/c-ppc.texi (PowerPC-Opts): Likewise.
* config/tc-ppc.c (md_show_usage): Likewise.
(md_assemble): Handle BFD_RELOC_PPC_REL16DX_HA.
(md_apply_fix): Likewise.
(ppc_handle_align): Handle power9's group ending nop.
gas/testsuite/
* gas/ppc/altivec3.s: New test.
* gas/ppc/altivec3.d: Likewise.
* gas/ppc/vsx3.s: Likewise.
* gas/ppc/vsx3.d: Likewise.
* gas/ppc/power9.s: Likewise.
* gas/ppc/power9.d: Likewise.
* gas/ppc/ppc.exp: Run them.
* gas/ppc/power8.s <lxvx, lxvd2x, stxvx, stxvd2x>: Add new tests.
* gas/ppc/power8.d: Likewise.
* gas/ppc/vsx.s: <lxvx, stxvx>: Rename invalid mnemonics ...
<lxvd2x, stxvd2x>: ...to this.
* gas/ppc/vsx.d: Likewise.
gold/
* gold/powerpc.cc (Powerpc_relocate_functions::addr16_dq): New function.
(Powerpc_relocate_functions::addr16dx_ha): Likewise.
(Target_powerpc::Scan::local): Handle R_POWERPC_REL16DX_HA.
(Target_powerpc::Scan::global): Likewise.
(Target_powerpc::Relocate::relocate): Likewise.
ld/testsuite/
* ld-powerpc/addpcis.d: New test.
* ld-powerpc/addpcis.s: New test.
* ld-powerpc/powerpc.exp: Run it.
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gold/
* layout.h (Layout::is_debug_info_section): Recognize .pdr debug
sections.
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2015-11-09 Cary Coutant <ccoutant@gmail.com>
Vladimir Radosavljevic <Vladimir.Radosavljevic@imgtec.com>
gold/
* copy-relocs.h (Copy_relocs::copy_reloc): Replace reloc parameter
with type, offset, addend.
(Copy_relocs::save): Likewise.
* copy-relocs.cc (Copy_relocs::copy_reloc): Likewise.
(Copy_relocs::save): Likewise.
* aarch64.cc (Target_aarch64::copy_reloc): Pass r_type, r_offset,
and r_addend to Copy_relocs::copy_reloc.
* arm.cc (Target_arm::copy_reloc): Likewise.
* i386.cc (Target_i386::copy_reloc): Likewise.
* mips.cc (Target_mips::copy_reloc): Likewise.
* powerpc.cc (Target_powerpc::copy_reloc): Likewise.
* s390.cc (Target_s390::copy_reloc): Likewise.
* sparc.cc (Target_sparc::copy_reloc): Likewise.
* tilegx.cc (Target_tilegx::copy_reloc): Likewise.
* x86_64.cc (Target_x86_64::copy_reloc): Likewise.
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Gold does not support all the emulations that Gnu ld does, and supports
only one spelling per target. The -m option is used only in the rare case
where there are no ELF input files, and we produce an empty output file.
In those cases, users are expected to supply a -m option naming one of
the supported emulations. In the many cases where a build script provides
an unnecessary -m option naming an emulation that gold does not support,
we will simply ignore the option, as we did before the reverted patch.
gold/
PR gold/19119
PR gold/19172
PR gold/19197
Revert commit 6457197210144f50a696097c0d308d81d46d5510:
2015-10-16 H.J. Lu <hongjiu.lu@intel.com>
* options.h (General_options): Remove "obsolete" from -m.
* parameters.cc (set_parameters_target): Check if input target
is compatible with output emulation set by "-m emulation".
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With --no-apply-dynamic-relocs on aarch64 targets, gold will not apply
link-time values for absolute relocations that become dynamic relocations.
This provides a workaround for broken Android dynamic linkers that use
the link-time value as an extra addend to the relocation.
gold/
PR gold/19163
* aarch64.cc (Target_aarch64::Relocate::relocate): Don't apply
certain relocations if --no-apply-dynamic-relocs is set.
* options.h (--apply-dynamic-relocs): New aarch64-specific option.
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* po/POTFILES.in: Regenerate.
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* po/zh_CN.po: Updated (simplified) Chinese translation.
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The GOT entry size is target-dependent. This patch adds a got_entry_size
function to Sized_target class so that a target can provide a value
different from default.
PR gold/19184
* incremental.cc (Got_plt_view_info): Add got_entry_size.
(Local_got_offset_visitor::visit): Replace got_entry_size_
with info_.got_entry_size.
(Local_got_offset_visitor::got_entry_size_): Removed.
(Global_got_offset_visitor::visit): Replace got_entry_size_
with info_.got_entry_size.
(Global_got_offset_visitor::got_entry_size_): Removed.
(Output_section_incremental_inputs::write_got_plt): Initialize
view_info.got_entry_size.
* target.h (Sized_target::got_entry_size): New virtual function.
* x86_64.cc (Target_x86_64::got_entry_size): New function.
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s390).
gold/
* testsuite/binary_test.cc: Add __attribute__((aligned(1))).
* testsuite/script_test_12a.c: Likewise.
* testsuite/script_test_1a.cc: Likewise.
* testsuite/script_test_2.cc: Likewise.
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gold/
* testsuite/debug_msg.sh: Accept more fuzz in line numbers.
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gold/
PR gold/18959
* stringpool.cc (Stringpool_template::new_key_offset): Align all
strings, even zero-length.
(Stringpool_template::set_string_offsets):
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elfcpp/
* s390.h: New file.
gold/
* s390.cc: New file.
* Makefile.am (TARGETSOURCES): Add s390.cc.
(ALL_TARGETOBJS): Add s390.o.
* Makefile.in: Regenerate.
* configure.ac: Add s390 support.
* configure: Regenerate.
* configure.tgt: Add s390-*-* and s390x-*-*.
* testsuite/icf_safe_test.sh (arch_specific_safe_fold): Add s390
support.
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gold/
* archive.cc (Archive::sym64name): New const.
(Archive::setup): Add support for SYM64 armap.
(Archive::read_armap): Likewise.
(Archive::interpret_header): Likewise.
(Archive::const_iterator::read_next_header): Likewise.
* archive.h (Archive::sym64name): New const.
(Archive::read_armap): Add mapsize template parameter.
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gold/
* dynobj.cc (Dynobj::create_elf_hash_table): Create hash table with
target-specific entry size.
(Dynobj::sized_create_elf_hash_table): Add size template parameter.
* dynobj.h (Dynobj::sized_create_elf_hash_table): Likewise.
* layout.cc (Layout::create_dynamic_symtab): Set entsize to
hash_entry_size.
* target.h (Target::hash_entry_size): New method.
(Target::Target_info::hash_entry_size): New data member.
* aarch64.cc (Target_aarch64::aarch64_info): Add hash_entry_size.
* arm.cc (Target_arm::arm_info): Likewise.
(Target_arm_nacl::arm_nacl_info): Likewise.
* i386.cc (Target_i386::i386_info): Likewise.
(Target_i386_nacl::i386_nacl_info): Likewise.
(Target_iamcu::iamcu_info): Likewise.
* mips.cc (Target_mips::mips_info): Likewise.
(Target_mips_nacl::mips_nacl_info): Likewise.
* powerpc.cc (Target_powerpc::powerpc_info): Likewise.
* sparc.cc (Target_sparc::sparc_info): Likewise.
* tilegx.cc (Target_tilegx::tilegx_info): Likewise.
* x86_64.cc (Target_x86_64::x86_64_info): Likewise.
(Target_x86_64_nacl::x86_64_nacl_info): Likewise.
* testsuite/testfile.cc (Target_test::test_target_info): Likewise.
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The R_386_GOT32 and R_386_GOT32X relocations may be used without base
register:
movl bar@GOT, %eax
Its calculation is G + A, instead of G + A - GOT, and it can only used
to generate non-PIC executable. Include the .got.plt section address
for R_386_GOT32 and R_386_GOT32X relocations without base register.
Don't allow R_386_GOT32 and R_386_GOT32X relocations without base
register when making a PIC output.
PR gold/19177
* i386.cc (Target_i386::Relocate::relocate): Check R_386_GOT32
and R_386_GOT32X relocations without base register.
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gold/
* aarch64.cc (Target_aarch64::Scan::local): Add support for
reloc 311/312.
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This patch updates gold to treat the R_X86_64_GOTPCRELX and
R_X86_64_REX_GOTPCRELX relocations proposed in
https://groups.google.com/forum/#!topic/x86-64-abi/n9AWHogmVY0
the same as R_X86_64_GOTPCREL. FIXME: Gold should perform the
transformations as suggested.
elfcpp/
* x86_64.h (R_X86_64_GOTPCRELX): New.
(R_X86_64_REX_GOTPCRELX): Likewise.
gold/
* x86_64.cc (Target_x86_64<size>::Scan::get_reference_flags):
Treat R_X86_64_GOTPCRELX and R_X86_64_REX_GOTPCRELX the same
as R_X86_64_GOTPCREL.
(Target_x86_64<size>::Scan::local): Likewise.
(Target_x86_64<size>::Scan::possible_function_pointer_reloc):
Likewise.
(Target_x86_64<size>::Scan::global): Likewise.
(Target_x86_64<size>::Relocate::relocate): Likewise.
(Target_x86_64<size>::Relocatable_size_for_reloc::get_size_for_reloc):
Likewise.
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This patch updates gold to treat the R_386_GOT32X relocation proposed in
https://groups.google.com/forum/#!topic/ia32-abi/GbJJskkid4I
the same as R_386_GOT32. FIXME: Gold should perform the transformations
as suggested.
elfcpp/
* i386.h (R_386_GOT32X): New.
gold/
* i386.cc (Target_i386::Scan::get_reference_flags(): Treat
R_386_GOT32X the same as R_386_GOT32.
(Target_i386::Scan::local): Likewise.
(Target_i386::Scan::possible_function_pointer_reloc): Likewise.
(Target_i386::Scan::global): Likewise.
(Target_i386::Relocate::relocate): Likewise.
(Target_i386::Relocatable_size_for_reloc::get_size_for_reloc):
Likewise.
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x86_64_mov_to_lea1.o is a 64-bit x86-64 object and x86_64_mov_to_lea2.o
is a 32-bit x86-64 object. x86_64_mov_to_lea11 should use
x86_64_mov_to_lea2.o and x86_64_mov_to_lea12 should use
x86_64_mov_to_lea1.o.
* testsuite/Makefile.am (x86_64_mov_to_lea11): Replace
x86_64_mov_to_lea1.o with x86_64_mov_to_lea2.o.
(x86_64_mov_to_lea12): Replace x86_64_mov_to_lea2.o with
x86_64_mov_to_lea1.o.
* testsuite/Makefile.in: Regenerated.
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Gold shouldn't ignore "-m emulation" command line option, which may
lead to incorrect output.
PR gold/19119
* options.h (General_options): Remove "obsolete" from -m.
* parameters.cc (set_parameters_target): Check if input target
is compatible with output emulation set by "-m emulation".
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elfcpp/
PR gold/19118
* elfcpp.h (EM): Add EM_IAMCU.
gold/
PR gold/19118
* i386.cc (Target_iamcu): New class.
(Target_selector_iamcu): Likewise.
(Target_iamcu::iamcu_info): New variable.
(target_selector_iamcu): Likewise.
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* aarch64.cc (aarch64_info): Set abi_pagesize to 64K.
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When applying a GOTDATA_OP* relocation to a local symbol, the addend
is being applied after getting the value of the symbol. When the
relocation refers to a merge section, however, the addend must be
provided when computing the symbol value, since the contents of
the section may have been rearranged.
gold/
PR gold/18855
* sparc.cc (Sparc_relocate_functions::gdop_hix22): Remove addend
parameter.
(Sparc_relocate_functions::gdop_lox10): Likewise.
(Target_sparc::Relocate::relocate): Use addend when computing
symbol value for R_SPARC_GOTDATA_OP*.
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The previous commit to fix PR gold/18886 converted STT_IFUNC
to STT_FUNC when resolving to a symbol defined in a shared library.
This leads to an internal error if the shared library symbol is
seen first, as we do not convert the symbol at all.
We need to override the STT_IFUNC in add_from_dynobj() instead of
in override_base().
gold/
PR gold/18930
PR gold/18886
* resolve.cc (Symbol::override_base): Don't convert IFUNC symbols here.
* symtab.cc (Symbol_table::add_from_dynobj): Convert them here instead.
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Turn IFUNC symbols from shared libraries into normal FUNC symbols when
we are resolving symbol references, instead of when we are writing out
the symbol table.
PR gold/18886
* resolve.cc (Symbol::override_base): Turn IFUNC symbols from
shared libraries into normal FUNC symbols.
* symtab.cc (Symbol_table::sized_write_symbol): Assert IFUNC
symbols aren't from shared libraries.
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Gold version of a4b6fadd. Don't emit long branch or plt branch stubs
to save/restore functions. Copy them instead.
PR 18878
* powerpc.cc (Target_powerpc): Add savres_section_ and accessor.
(Target_powerpc::Branch_info::make_stub): Determine whether long
branch stub is for save/restore function.
(Branch_stub_ent): Add save_res_, and extra parm to constructor.
(Stub_table): Add need_save_res_.
(Stub_table:clear_stubs): Clear need_save_res_.
(Stub_table:set_address_and_size): Add save/restore section size.
(Stub_table::add_long_branch_entry): Add save_res param. Set
need_save_res_, but don't add space for save/restore stubs.
(Stub_table::find_long_branch_entry): Return offset to local copy
of save/restore func.
(Stub_table::do_write): Don't output save/restore stubs. Instead
copy the save/restore functions.
(Output_data_save_res:contents): New accessor.
(Target_powerpc::define_save_restore_funcs): Set savres_section_.
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If a script specifies both address and region for an output section
declaration, gold ignores the region specification. This can lead to
bogus "moves backward" errors. This patch fixes gold so that if a
section specifies both address and region, it will place the section
at the specified address in the region, and update the location counter
within the region.
gold/
PR gold/18847
* script-sections.cc (Memory_region::set_address): New method.
(Script_sections::find_memory_region): Add explicit_only parameter.
(Output_section_definition::set_section_addresses): Handle case where
script specifies both address and vma region.
* script-sections.h (Script_sections::find_memory_region): Add
explicit_only parameter.
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When a shared library is listed twice on the command line, the linker
ignores the second mention. If the first mention is in the scope of
an --as-needed option, and the second one is under the scope of a
--no-as-needed option, the --no-as-needed should take effect, but
doesn't. This patch keeps track of the objects we've already seen,
and updates the --as-needed flag so that if a shared object is ever
seen with --no-as-needed, it will be marked as such.
gold/
PR gold/18859
* object.cc (Input_objects::add_object): Store objects in a map,
indexed by soname; update as-needed flag when necessary.
* object.h (Object::clear_as_needed): New method.
(Input_objects::so_names_): Change from set to map.
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When processing assignment expressions in a linker script, gold processes
absolute assignments early, but when one of those assignments involves the
address of a section that has not yet been finalized, we get an internal
error in address. This patch fixes the problem by gracefully returning
from expression evaluation even if the address is not yet valid, and
deferring the assignment in such a case.
gold/
PR gold/14746
* expression.cc (Expression::Expression_eval_info): Add
is_valid_pointer field.
(Expression::eval_maybe_dot): Add is_valid_pointer parameter.
Adjust all callers.
(Addr_expression::value_from_output_section): Check whether address
is valid.
* script.cc (Symbol_assignment::set_if_absolute): Defer assignment
if evaluation failed due to address that is not yet valid.
* script.h: (Expression::eval_maybe_dot): Add is_valid_pointer
parameter.
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When a user object overrides a versioned definition in a shared object,
it's possible to trigger an internal error because the versioned
definition we saw didn't override the unversioned definition. This
was introduced by the fix for PR 18703. This patch fixes the problem
by reordering the tests so that we do not check ret->is_default()
until we're confident that the symbol is in fact versioned.
gold/
PR gold/18866
PR gold/18703
* symtab.cc (Symbol_table): Reorder conditions to avoid internal error.
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A symbol value in an ELF final linked binary is absolute, in contrast
to a relocatable object file where the value is section relative. For
--emit-relocs it is therefore incorrect to use the value of a section
symbol as the addend when adjusting relocs against input section
symbols to output section symbols.
PR gold/18846
* target-reloc.h (relocate_relocs <RELOC_ADJUST_FOR_SECTION_RELA>):
Subtract os->address() from addend.
* powerpc.cc (relocate_relocs): Likewise.
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If a symbol is defined with ".symver foo,foo@VER", the assembler
creates two symbols in the object: one unversioned, and one with
the (non-default) version "VER". If foo is listed in a version
script, gold would then make the first of those symbols the
default version, and would ignore the second symbol as a
duplicate, without making it a non-default version. While this is
arguably reasonable behavior, it doesn't match Gnu ld behavior,
so this patch fixes that by allowing the second definition to
override the first by resetting the "default version" indication.
Several test cases from the Gnu ld testsuite also exposed another
related problem, where a symbol defined with ".symver foo,foo@",
placed into a shared library, is not handled properly by gold.
This patch also fixes that case, binding the symbol to the base
version.
gold/
PR gold/18703
* dynobj.cc (Versions::record_version): Handle symbol defined with
base version.
(Versions::symbol_section_contents): Likewise.
* symtab.h (Symbol::set_is_not_default): New class method.
(Symbol_table::resolve): Add is_default_version parameter.
(Symbol_table::should_override): Likewise.
* resolve.cc (Symbol_table::resolve): Add is_default_version parameter,
and pass to should_override. Adjust all callers and explicit
instantiations.
(Symbol_table::should_override): Add is_default_value parameter;
allow default version in a dynamic object to override existing
definition from same object.
* symtab.cc (Symbol_table::add_from_object): Handle case where same
symbol is defined as unversioned and non-default version in the same
object.
* testsuite/Makefile.am (ver_test_13): New test case.
* testsuite/Makefile.in: Regenerate.
* testsuite/ver_test_4.cc: Add test for symbol with base version.
* testsuite/ver_test_4.sh: Likewise.
* testsuite/ver_test_13.c: New source file.
* testsuite/ver_test_13.script: New version script.
* testsuite/ver_test_13.sh: New test case.
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The MIPS assembly idiom 'move' now maps to the 'or' machine instruction. This
change affects microMIPS, MIPS32, MIPS64.
2015-08-12 Simon Dardis <simon.dardis@imgtec.com>
opcodes/
* micromips-opc.c (micromips_opcodes): Re-order table so that move
based on 'or' is first.
* mips-opc.c (mips_builtin_opcodes): Ditto.
bfd/
* elfxx-mips.c (STUB_MOVE): Change to use 'or' only.
(mips_o32_exec_plt0_entry, mips_n32_exec_plt0_entry,
mips_n64_exec_plt0_entry, micromips_insn32_o32_exec_plt0_entry):
Update to use 'or' instead of 'addu/daddu'.
(_bfd_mips_elf_finish_dynamic_symbol): Update usage of STUB_MOVE.
(move_insns_32): Reorder table.
gas/
* config/tc-mips.c (move_register): Change to use 'or' only.
(s_cpload, s_cpsetup, s_cprestore, s_cpreturn): Update to
use or for move.
gas/testsuite/
* gas/mips/elf-rel23.d: Update test.
* gas/mips/elf-rel23.d: Ditto.
* gas/mips/elf-rel23a.d: Ditto.
* gas/mips/elf-rel23b.d: Ditto.
* gas/mips/elf_e_flags1.d: Ditto.
* gas/mips/elf_e_flags2.d: Ditto.
* gas/mips/elf_e_flags3.d: Ditto.
* gas/mips/elf_e_flags4.d: Ditto.
* gas/mips/loc-swap-dis.d: Ditto.
* gas/mips/micromips-insn32.d: Ditto.
* gas/mips/micromips-noinsn32.d: Ditto.
* gas/mips/micromips-trap.d: Ditto.
* gas/mips/micromips.d: Ditto.
* gas/mips/mips-abi32-pic.d: Ditto.
* gas/mips/mips-abi32.d: Ditto.
* gas/mips/mips-gp32-fp32-pic.d: Ditto.
* gas/mips/mips-gp32-fp32.d: Ditto.
* gas/mips/mips-gp32-fp64-pic.d: Ditto.
* gas/mips/mips-gp32-fp64.d: Ditto.
* gas/mips/mips-gp64-fp32-pic.d: Ditto.
* gas/mips/mips-gp64-fp32.d: Ditto.
* gas/mips/mips-gp64-fp64-pic.d: Ditto.
* gas/mips/mips-gp64-fp64.d: Ditto.
* gas/mips/mipsr6@loc-swap-dis.d: Ditto.
* gas/mips/tls-o32.d: Ditto.
* gas/mips/uld2-eb.d: Ditto.
* gas/mips/uld2-el.d: Ditto.
* gas/mips/ulw2-eb-ilocks.d: Ditto.
* gas/mips/ulw2-eb.d: Ditto.
* gas/mips/ulw2-el-ilocks.d: Ditto.
* gas/mips/ulw2-el.d: Ditto.
* gas/mips/move.d: New test.
* gas/mips/move.s: Ditto.
* gas/mips/micromips32-move.d: Ditto.
* gas/mips/micromips32-move.s: Ditto.
* gas/mips/mips.exp: Run the new tests.
gold/
* mips.cc (plt0_entry_o32, plt0_entry_n32, plt0_entry_n64,
lazy_stub_normal_1, lazy_stub_normal_1_n64,
lazy_stub_normal_2, lazy_stub_normal_2_n64, lazy_stub_big,
lazy_stub_big_n64, lazy_stub_micromips32_normal_1_n64,
lazy_stub_micromips32_normal_2_n64, lazy_stub_micromips32_big,
lazy_stub_micromips32_big_n64): Update to use 'or' for move instead
of 'addu/daddu'.
ld/testsuite/
* ld-mips-elf/compressed-plt-1-n32-mips16.od: Update test.
* ld-mips-elf/compressed-plt-1-n32-umips.od: Ditto.
* ld-mips-elf/compressed-plt-1-o32-mips16-got.od: Ditto.
* ld-mips-elf/compressed-plt-1-o32-mips16-only.od: Ditto.
* ld-mips-elf/compressed-plt-1-o32-mips16-word.od: Ditto.
* ld-mips-elf/compressed-plt-1-o32-mips16.od: Ditto.
* ld-mips-elf/compressed-plt-1-o32-se.od: Ditto.
* ld-mips-elf/compressed-plt-1-o32-umips-got.od: Ditto.
* ld-mips-elf/compressed-plt-1-o32-umips-word.od: Ditto.
* ld-mips-elf/compressed-plt-1-o32-umips.od: Ditto.
* ld-mips-elf/jalx-2.dd: Ditto.
* ld-mips-elf/mips16-pic-3.dd: Ditto.
* ld-mips-elf/pic-and-nonpic-3a.dd: Ditto.
* ld-mips-elf/pic-and-nonpic-3b.dd: Ditto.
* ld-mips-elf/pic-and-nonpic-5b.dd: Ditto.
* ld-mips-elf/pic-and-nonpic-6-n32.dd: Ditto.
* ld-mips-elf/pic-and-nonpic-6-o32.dd: Ditto.
* ld-mips-elf/stub-dynsym-1-10000.d: Ditto.
* ld-mips-elf/stub-dynsym-1-2fe80.d: Ditto.
* ld-mips-elf/stub-dynsym-1-7fff.d: Ditto.
* ld-mips-elf/stub-dynsym-1-8000.d: Ditto.
* ld-mips-elf/stub-dynsym-1-fff0.d: Ditto.
* ld-mips-elf/tlsbin-o32.d: Ditto.
* ld-mips-elf/tlsdyn-o32-1.d: Ditto.
* ld-mips-elf/tlsdyn-o32-2.d: Ditto.
* ld-mips-elf/tlsdyn-o32-3.d: Ditto.
* ld-mips-elf/tlsdyn-o32.d: Ditto.
* ld-mips-elf/tlslib-o32.d: Ditto.
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bfd/
* configure: Regenerated.
binutils/
* configure: Regenerated.
gas/
* configure: Regenerated.
gold/
* configure: Regenerated.
gprof/
* configure: Regenerated.
ld/
* configure: Regenerated.
opcodes/
* configure: Regenerated.
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Plumb --pic-veneer option for gold.
gold/ChangeLog:
* arm.cc (Reloc_stub::stub_type_for_reloc): Plumb to stub generation.
* options.h (General_options): Add --pic-veneer option.
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GCC 5 will fold symbol address comparison, assuming each symbol has a
different address, which leads to abort. We should use separate
functions to compare symbol address.
PR gold/18663
* testsuite/Makefile.am (script_test_1_SOURCES): Set to
script_test_1a.cc script_test_1b.cc.
(script_test_11_r.o): Replace script_test_11.o with
script_test_11a.o script_test_11b.o.
(script_test_11.o): Removed.
(script_test_11a.o): New.
(script_test_11b.o): Likewise.
* testsuite/Makefile.in: Regenerated.
* testsuite/script_test_1.h: New file.
* testsuite/script_test_1b.cc: Likewise.
* testsuite/script_test_11.h: Likewise.
* testsuite/script_test_11b.c: Likewise.
* testsuite/script_test_1.cc: Renamed to ...
* testsuite/script_test_1a.cc: This.
Include "script_test_1.h".
(main): Call check_int and check_ptr.
* testsuite/script_test_11.c: Renamed to ...
* testsuite/script_test_11a.c: This.
Include "script_test_11.h".
(main): Call ptr_equal.
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GCC 5 will generate a relocation for protected symbol:
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65248
when compiling for a shared library. It is undefined to access protected
symbol in IFUNC selector function inside a shared library.
PR gold/18628
* testsuite/ifuncdep2.c (global): Change protected to hidden.
* testsuite/ifuncmod1.c (global): Likewise.
* testsuite/ifuncmod5.c (global): Likewise.
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aarch64.cc:2026:50: error: integer overflow in expression [-Werror=overflow]
Insntype adr_insn = adrp_insn & ((1 << 31) - 1);
* aarch64.cc (try_fix_erratum_843419_optimized): Warning fix.
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