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2016-02-16Pass -mrelax-relocations=yes to $(TEST_AS)H.J. Lu3-8/+12
x86_64_mov_to_lea5.o and x86_64_mov_to_lea6.o must be assembled with -mrelax-relocations=yes since when assembler is configured with --disable-x86-relax-relocations, R_X86_64_GOTPCRELX relocation won't be generated. This linker optimization requires R_X86_64_GOTPCRELX relocation. This patch also removed the duplicated x86_64_overflow_pc32.o target. * testsuite/Makefile.am (x86_64_mov_to_lea5.o): Pass -mrelax-relocations=yes to $(TEST_AS). (x86_64_mov_to_lea6.o): Likewise. (x86_64_overflow_pc32.o): Remove duplicated target. * testsuite/Makefile.in: Regenerated.
2016-02-15gold: Add s390 -fsplit-stack support.Marcin Kościelnicki25-6/+1664
gold/ChangeLog: * s390.cc (Target_s390::match_view_u): New helper method. (Target_s390::do_is_call_to_non_split): New method. (Target_s390::ss_code_st_r14): New const. (Target_s390::ss_code_l_r14): New const. (Target_s390::ss_code_bras_8): New const. (Target_s390::ss_code_l_basr): New const. (Target_s390::ss_code_a_basr): New const. (Target_s390::ss_code_ear): New const. (Target_s390::ss_code_c): New const. (Target_s390::ss_code_larl): New const. (Target_s390::ss_code_brasl): New const. (Target_s390::ss_code_jg): New const. (Target_s390::ss_code_jgl): New const. (Target_s390::ss_match_mcount): New helper method. (Target_s390::ss_match_l): New helper method. (Target_s390::ss_match_ahi): New helper method. (Target_s390::ss_match_alfi): New helper method. (Target_s390::ss_match_cr): New helper method. (Target_s390::do_calls_non_split): New method. * testsuite/Makefile.am: Added new tests. * testsuite/split_s390.sh: New test. * testsuite/split_s390_1_a1.s: New test. * testsuite/split_s390_1_a2.s: New test. * testsuite/split_s390_1_n1.s: New test. * testsuite/split_s390_1_n2.s: New test. * testsuite/split_s390_1_z1.s: New test. * testsuite/split_s390_1_z2.s: New test. * testsuite/split_s390_1_z3.s: New test. * testsuite/split_s390_1_z4.s: New test. * testsuite/split_s390_2_ns.s: New test. * testsuite/split_s390_2_s.s: New test. * testsuite/split_s390x_1_a1.s: New test. * testsuite/split_s390x_1_a2.s: New test. * testsuite/split_s390x_1_n1.s: New test. * testsuite/split_s390x_1_n2.s: New test. * testsuite/split_s390x_1_z1.s: New test. * testsuite/split_s390x_1_z2.s: New test. * testsuite/split_s390x_1_z3.s: New test. * testsuite/split_s390x_1_z4.s: New test. * testsuite/split_s390x_2_ns.s: New test. * testsuite/split_s390x_2_s.s: New test.
2016-02-11Remove info message for every erratum 843419 found and fixed.Han Shen2-4/+5
2016-02-11 Rahul Chaudhry <rahulchaudhry@google.com> * aarch64.cc (Target_aarch64::scan_erratum_843419_span): Remove info message for every erratum 843419 found and fixed.
2016-02-07Add additional information to relocation overflow errors.Cary Coutant2-2/+31
gold/ PR gold/18695 * x86_64.cc (Target_x86_64::Relocate::relocate): Add additional information to relocation overflow errors.
2016-02-07Fix incorrect x32 overflow checking for refs to weak undef symbols.Cary Coutant2-2/+16
On x32, a pc-relative reference to an undef weak symbol (value 0) with a negative addend (typically -4) generates a spurious overflow error because Symbol_value::value() returns a 32-bit negative number as an unsigned number, which gets zero-extended before subtracting the PC value. This patch fixes the problem by special-casing the negative addend, and adding it to the value after widening it to 64 bits. Symbol_value::value() does not need the addend if it's negative, since it is only important when processing section symbols for merge sections, where a positive addend provides the input section offset of the merged constant. gold/ * x86_64.cc (X86_64_relocate_functions::pcrela32_check): Fix x32 overflow checking when symbol value + addend < 0.
2016-02-06Fix compile errors about shift counts too large.Cary Coutant2-10/+41
In order to get around the optimizer and newer compiler warnings about shift counts, the overflow checking code had resorted to some messy shifting, and with the never-before-seen instantiations of the template functions, we were still running afoul of the compiler checks. This patch replaces those messy shift sequences with a simple class template that provides the min and max limits for any bit size up to 64, with a specialization for 64 that prevents the compiler from complaining. gold/ PR gold/19577 * reloc.h (Limits): New class. (Bits::has_overflow32): Use min/max values from Limits. (Bits::has_unsigned_overflow32): Likewise. (Bits::has_signed_unsigned_overflow32): Likewise. (Bits::has_overflow): Likewise. (Bits::has_unsigned_overflow): Likewise. (Bits::has_signed_unsigned_overflow64): Likewise.
2016-02-06Fix overflow checking for 32-bit pc-relative relocations on x32.Cary Coutant7-15/+151
The problem here is that x32 is really using 64-bit addressing, while pretending to be 32-bit. Even though the object file format is 32-bit, we need to do the overflow checking with 64-bit arithmetic (because that's what the hardware will be using). This patch overrides the pcrela32_check functions in reloc.h with target-specific versions that do 64-bit checking. I've also updated the test case to use -Tdata instead of adding a huge .space directive, to reduce the size of the .o files. gold/ PR gold/19567 * reloc.h (Relocate_functions::Overflow_check): Add comments. * x86_64.cc (X86_64_relocate_functions): New class. (Target_x86_64::Relocate::relocate): Use the new class. * testsuite/Makefile.am (x86_64_overflow_pc32): Add -Tdata option. (x32_overflow_pc32): New test case. * testsuite/Makefile.in: Regenerate. * testsuite/x32_overflow_pc32.sh: New script. * testsuite/x86_64_overflow_pc32.s: Remove .space directive.
2016-02-06Fix incorrect casts.Cary Coutant2-2/+8
gold/ PR gold/19577 * reloc.h (Bits::has_unsigned_overflow32): Fix static_cast. (Bits::has_unsigned_overflow): Remove unnecessary static_cast.
2016-02-06Add PR number to ChangeLog entry.Cary Coutant1-0/+1
2016-02-06Fix build failure in gold due to signed vs. unsigned comparisons.Cary Coutant2-2/+8
* reloc.h (Bits::has_unsigned_overflow32): Fix unsigned/signed comparison. (Bits::has_unsigned_overflow): Likewise.
2016-02-06gold: Add view and view_size parameters to is_call_to_non_split.Marcin Kościelnicki5-7/+25
This is needed by s390 split-stack support, to distinguish call and load-address relocations. gold/ChangeLog: * i386.cc (Target_i386::is_call_to_non_split): Add view and view_size parameters. * reloc.cc (Sized_relobj_file::split_stack_adjust_reltype): Pass view and view_size to is_call_to_non_split. * target.cc (Target::is_call_to_non_split): Add view and view_size parameters. * target.h (class Target): Likewise.
2016-02-052016-02-05 Sriraman Tallam <tmsriram@google.com>Sriraman Tallam2-47/+75
* icf.cc (get_rel_addend): New function. (get_section_contents): Move merge section addend computation to a new function. Ignore negative values for SHT_REL and SHT_RELA addends. Fix bug to not read past the length of the section. Fix bug related to addend computation for MERGE sections.
2016-02-05Add some relocation overflow checks for x86_64.Cary Coutant6-47/+157
2016-02-05 Cary Coutant <ccoutant@gmail.com> Andrew Senkevich <andrew.senkevich@intel.com> gold/ PR gold/18695 * x86_64.cc (Target_x86_64::Relocate::relocate): Add overflow checking for R_X86_64_32, R_X86_64_32S, R_X86_64_PC32, and R_X86_64_PLT32. * testsuite/Makefile.am (x86_64_overflow_pc32): New test. * testsuite/x86_64_overflow_pc32.sh: New test script. * testsuite/x86_64_overflow_pc32.s: New source file.
2016-02-05Overhaul relocation framework to support overflow checking.Cary Coutant5-150/+632
gold/ PR gold/18695 * reloc.h (Relocate_functions::Address): New typedef. (Relocate_functions::Addendtype): New typedef. (Relocate_functions::Overflow_check): New enum type. (Relocate_functions::Reloc_status): New enum type. (Relocate_functions::check_overflow): New function template. (Relocate_functions::rel): Add check parameter; check for overflow. (Relocate_functions::rel_unaligned): Likewise. (Relocate_functions::rela): Likewise. (Relocate_functions::pcrel): Likewise. (Relocate_functions::pcrel_unaligned): Likewise. (Relocate_functions::pcrela): Likewise. (Relocate_functions::rel8): Adjust parameter types. (Relocate_functions::rela8): Likewise. (Relocate_functions::pcrel8): Likewise. (Relocate_functions::pcrela8): Likewise. (Relocate_functions::rel16): Likewise. (Relocate_functions::rela168): Likewise. (Relocate_functions::pcrel16): Likewise. (Relocate_functions::pcrela16): Likewise. (Relocate_functions::rel32): Likewise. (Relocate_functions::rel32_unaligned): Likewise. (Relocate_functions::rela32): Likewise. (Relocate_functions::pcrel32): Likewise. (Relocate_functions::pcrel32_unaligned): Likewise. (Relocate_functions::pcrela32): Likewise. (Relocate_functions::rel8_check): New function. (Relocate_functions::rela8_check): New function. (Relocate_functions::pcrel8_check): New function. (Relocate_functions::pcrela8_check): New function. (Relocate_functions::rel16_check): New function. (Relocate_functions::rela168_check): New function. (Relocate_functions::pcrel16_check): New function. (Relocate_functions::pcrela16_check): New function. (Relocate_functions::rel32_check): New function. (Relocate_functions::rel32_unaligned_check): New function. (Relocate_functions::rela32_check): New function. (Relocate_functions::pcrel32_check): New function. (Relocate_functions::pcrel32_unaligned_check): New function. (Relocate_functions::pcrela32_check): New function. (Bits::has_unsigned_overflow32): New function. (Bits::has_unsigned_overflow): New function. * testsuite/Makefile.am (overflow_unittest): New test. * testsuite/Makefile.in: Regenerate. * testsuite/overflow_unittest.cc: New source file.
2016-02-04Fix "PowerPC64 ELFv2 entry code" for big-endianAlan Modra2-1/+5
bfd/ * elf64-ppc.c (ppc64_elf_relocate_section): Adjust last patch for big-endian. gold/ * powerpc.cc (relocate): Adjust last patch for big-endian.
2016-02-02PowerPC64 ELFv2 entry codeAlan Modra2-0/+5
This tightens the condition under which ld optimizes PIC entry code to non-PIC. bfd/ * elf64-ppc.c (ppc64_elf_relocate_section): Further restrict ELFv2 entry optimization. gold/ * powerpc.cc (relocate): Further restrict ELFv2 entry optimization.
2016-01-15[gold][aarch64] PR gold/19472 - DSOs need pc-relative stubs.Han Shen2-2/+11
The stub generated during relaxation uses absolute addressing mode for shared libraries, which is not correct. Use pc-relative addressing instead. gold/ChangeLog: 2016-01-15 Han Shen <shenhan@google.com> PR gold/19472 - DSOs need pc-relative stubs. * aarch64.cc (Reloc_stub::stub_type_for_reloc): Return PC-relative stub type for DSOs and pie executables.
2016-01-12Fix compile error with use of 'typename' outside of templateH.J. Lu2-3/+7
* i386.cc (Target_i386::Classify_reloc::get_r_addend): Remove 'typename'.
2016-01-12Fix breakage for SHT_REL targets where get_r_addend() gives internal error.Cary Coutant4-2/+33
gold/ * arm.cc (Target_arm::Classify_reloc::get_r_addend): New method. * i386.cc (Target_i386::Classify_reloc::get_r_addend): New method. * mips.cc (Target_arm::Mips_classify_reloc::get_r_addend): (Both specializations) New method.
2016-01-11Fix internal error when applying TLSDESC relocations with no TLS segment.Cary Coutant4-30/+20
gold/ PR gold/19353 * aarch64.cc (Target_aarch64::relocate_tls): Don't insist that we have a TLS segment for GD-to-IE optimization. * i386.cc (Target_i386::tls_gd_to_ie): Remove tls_segment parameter. Adjust all calls. (Target_i386::tls_desc_gd_to_ie): Likewise. (Target_i386::relocate_tls): Don't insist that we have a TLS segment for TLSDESC GD-to-IE optimizations. * x86_64.cc (Target_x86_64::tls_gd_to_ie): Remove tls_segment parameter. Adjust all calls. (Target_x86_64::tls_desc_gd_to_ie): Likewise. (Target_x86_64::relocate_tls): Don't insist that we have a TLS segment for TLSDESC GD-to-IE optimizations.
2016-01-11Refactor gold to enable support for MIPS-64 relocation format.Cary Coutant18-690/+1396
For MIPS-64, the r_info field in the relocation format is replaced by several individual fields, including r_sym and r_type. To enable support for this format, I've refactored target-independent code to remove almost all uses of the r_info field. (I've left alone a couple of routines used only for incremental linking, which I can update if/when the MIPS target adds support for incremental linking.) For routines that are already templated on a Classify_reloc class (namely, gc_process_relocs, relocate_section, and relocate_relocs), I've extended the Classify_reloc interface to include sh_type (which no longer needs to be a separate template parameter) as well as get_r_sym() and get_r_type() methods for extracting the r_sym and r_type fields. For scan_relocatable_relocs, I've extended the Default_scan_relocatable_relocs class by converting it to a class template with Classify_reloc as a template parameter. For the remaining routines that need to access r_sym, I've added a virtual Target::get_r_sym() method with an override for the MIPS target. In elfcpp, I've added Mips64_rel, etc., accessor classes and corresponding internal data structures. The MIPS target uses these new classes within its own Mips_classify_reloc class. The Mips64_ accessor classes also expose the r_ssym, r_type2, and r_type3 fields from the relocation. These changes should be functionally the same for all but the MIPS target. elfcpp/ * elfcpp.h (Mips64_rel, Mips64_rel_write): New classes. (Mips64_rela, Mips64_rela_write): New classes. * elfcpp_internal.h (Mips64_rel_data, Mips64_rela_data): New structs. gold/ * gc.h (get_embedded_addend_size): Remove sh_type parameter. (gc_process_relocs): Remove sh_type template parameter. Use Classify_reloc to access r_sym, r_type, and r_addend fields. * object.h (Sized_relobj_file::split_stack_adjust): Add target parameter. (Sized_relobj_file::split_stack_adjust_reltype): Likewise. * reloc-types.h (Reloc_types::copy_reloc_addend): (SHT_REL and SHT_RELA specializations) Remove. * reloc.cc (Emit_relocs_strategy): Rename and move to target-reloc.h. (Sized_relobj_file::emit_relocs_scan): Call Target::emit_relocs_scan(). (Sized_relobj_file::emit_relocs_scan_reltype): Remove. (Sized_relobj_file::split_stack_adjust): Add target parameter. Adjust all callers. (Sized_relobj_file::split_stack_adjust_reltype): Likewise. Call Target::get_r_sym() to get r_sym field from relocations. (Track_relocs::next_symndx): Call Target::get_r_sym(). * target-reloc.h (scan_relocs): Remove sh_type template parameter; add Classify_reloc template parameter. Use for accessing r_sym and r_type. (relocate_section): Likewise. (Default_classify_reloc): New class (renamed and moved from reloc.cc). (Default_scan_relocatable_relocs): Remove sh_type template parameter. (Default_scan_relocatable_relocs::Reltype): New typedef. (Default_scan_relocatable_relocs::reloc_size): New const. (Default_scan_relocatable_relocs::sh_type): New const. (Default_scan_relocatable_relocs::get_r_sym): New method. (Default_scan_relocatable_relocs::get_r_type): New method. (Default_emit_relocs_strategy): New class. (scan_relocatable_relocs): Replace sh_type template parameter with Scan_relocatable_relocs class. Use it to access r_sym and r_type fields. (relocate_relocs): Replace sh_type template parameter with Classify_reloc class. Use it to access r_sym and r_type fields. * target.h (Target::is_call_to_non_split): Replace r_type parameter with pointer to relocation. Adjust all callers. (Target::do_is_call_to_non_split): Likewise. (Target::emit_relocs_scan): New virtual method. (Sized_target::get_r_sym): New virtual method. * target.cc (Target::do_is_call_to_non_split): Replace r_type parameter with pointer to relocation. * aarch64.cc (Target_aarch64::emit_relocs_scan): New method. (Target_aarch64::Relocatable_size_for_reloc): Remove. (Target_aarch64::gc_process_relocs): Use Default_classify_reloc. (Target_aarch64::scan_relocs): Likewise. (Target_aarch64::relocate_section): Likewise. (Target_aarch64::Relocatable_size_for_reloc::get_size_for_reloc): Remove. (Target_aarch64::scan_relocatable_relocs): Use Default_classify_reloc. (Target_aarch64::relocate_relocs): Use Default_classify_reloc. * arm.cc (Target_arm::Arm_scan_relocatable_relocs): Remove sh_type template parameter. (Target_arm::emit_relocs_scan): New method. (Target_arm::Relocatable_size_for_reloc): Replace with... (Target_arm::Classify_reloc): ...this. (Target_arm::gc_process_relocs): Use Classify_reloc. (Target_arm::scan_relocs): Likewise. (Target_arm::relocate_section): Likewise. (Target_arm::scan_relocatable_relocs): Likewise. (Target_arm::relocate_relocs): Likewise. * i386.cc (Target_i386::emit_relocs_scan): New method. (Target_i386::Relocatable_size_for_reloc): Replace with... (Target_i386::Classify_reloc): ...this. (Target_i386::gc_process_relocs): Use Classify_reloc. (Target_i386::scan_relocs): Likewise. (Target_i386::relocate_section): Likewise. (Target_i386::scan_relocatable_relocs): Likewise. (Target_i386::relocate_relocs): Likewise. * mips.cc (Mips_scan_relocatable_relocs): Remove sh_type template parameter. (Mips_reloc_types): New class template. (Mips_classify_reloc): New class template. (Target_mips::Reltype): New typedef. (Target_mips::Relatype): New typedef. (Target_mips::emit_relocs_scan): New method. (Target_mips::get_r_sym): New method. (Target_mips::Relocatable_size_for_reloc): Replace with Mips_classify_reloc. (Target_mips::copy_reloc): Use Mips_classify_reloc. (Target_mips::gc_process_relocs): Likewise. (Target_mips::scan_relocs): Likewise. (Target_mips::relocate_section): Likewise. (Target_mips::scan_relocatable_relocs): Likewise. (Target_mips::relocate_relocs): Likewise. (mips_get_size_for_reloc): New function, factored out from Relocatable_size_for_reloc::get_size_for_reloc. (Target_mips::Scan::local): Use Mips_classify_reloc. (Target_mips::Scan::global): Likewise. (Target_mips::Relocate::relocate): Likewise. * powerpc.cc (Target_powerpc::emit_relocs_scan): New method. (Target_powerpc::Relocatable_size_for_reloc): Remove. (Target_powerpc::gc_process_relocs): Use Default_classify_reloc. (Target_powerpc::scan_relocs): Likewise. (Target_powerpc::relocate_section): Likewise. (Powerpc_scan_relocatable_reloc): Convert to class template. (Powerpc_scan_relocatable_reloc::Reltype): New typedef. (Powerpc_scan_relocatable_reloc::reloc_size): New const. (Powerpc_scan_relocatable_reloc::sh_type): New const. (Powerpc_scan_relocatable_reloc::get_r_sym): New method. (Powerpc_scan_relocatable_reloc::get_r_type): New method. (Target_powerpc::scan_relocatable_relocs): Use Powerpc_scan_relocatable_reloc. (Target_powerpc::relocate_relocs): Use Default_classify_reloc. * s390.cc (Target_s390::emit_relocs_scan): New method. (Target_s390::Relocatable_size_for_reloc): Remove. (Target_s390::gc_process_relocs): Use Default_classify_reloc. (Target_s390::scan_relocs): Likewise. (Target_s390::relocate_section): Likewise. (Target_s390::Relocatable_size_for_reloc::get_size_for_reloc): Remove. (Target_s390::scan_relocatable_relocs): Use Default_classify_reloc. (Target_s390::relocate_relocs): Use Default_classify_reloc. * sparc.cc (Target_sparc::emit_relocs_scan): New method. (Target_sparc::Relocatable_size_for_reloc): Remove. (Target_sparc::gc_process_relocs): Use Default_classify_reloc. (Target_sparc::scan_relocs): Likewise. (Target_sparc::relocate_section): Likewise. (Target_sparc::Relocatable_size_for_reloc::get_size_for_reloc): Remove. (Target_sparc::scan_relocatable_relocs): Use Default_classify_reloc. (Target_sparc::relocate_relocs): Use Default_classify_reloc. * tilegx.cc (Target_tilegx::emit_relocs_scan): New method. (Target_tilegx::Relocatable_size_for_reloc): Remove. (Target_tilegx::gc_process_relocs): Use Default_classify_reloc. (Target_tilegx::scan_relocs): Likewise. (Target_tilegx::relocate_section): Likewise. (Target_tilegx::Relocatable_size_for_reloc::get_size_for_reloc): Remove. (Target_tilegx::scan_relocatable_relocs): Use Default_classify_reloc. (Target_tilegx::relocate_relocs): Use Default_classify_reloc. * x86_64.cc (Target_x86_64::emit_relocs_scan): New method. (Target_x86_64::Relocatable_size_for_reloc): Remove. (Target_x86_64::gc_process_relocs): Use Default_classify_reloc. (Target_x86_64::scan_relocs): Likewise. (Target_x86_64::relocate_section): Likewise. (Target_x86_64::Relocatable_size_for_reloc::get_size_for_reloc): Remove. (Target_x86_64::scan_relocatable_relocs): Use Default_classify_reloc. (Target_x86_64::relocate_relocs): Use Default_classify_reloc. * testsuite/testfile.cc (Target_test::emit_relocs_scan): New method.
2016-01-01Copyright update for binutilsAlan Modra409-410/+414
2016-01-01New 2016 binutils ChangeLog filesAlan Modra1-0/+14
Note that this does not create bfd/doc/ChangeLog, */testsuite/ChangeLog and include/*/ChangeLog files.
2016-01-01binutils ChangeLog rotationAlan Modra1-0/+0
2015-12-30Fix assorted ChangeLog errorsAlan Modra1-63/+61
2015-12-17Implement --long-plt flag (ARM only).Peter Collingbourne3-21/+127
gold/ PR gold/18780 * arm.cc (Target_arm::do_make_data_plt): Choose PLT generator based on value of --long-plt flag. (Output_data_plt_arm_standard::do_get_plt_entry_size): Moved to Output_data_plt_arm_short. (Output_data_plt_arm_standard::do_fill_plt_entry): Likewise. (Output_data_plt_arm_standard::plt_entry): Likewise. (Output_data_plt_arm_standard::do_fill_first_plt_entry): Fix variable reference. (Output_data_plt_arm_short): New class. (Output_data_plt_arm_short::do_fill_plt_entry): Error out on too large PLT offsets instead of asserting. (Output_data_plt_arm_long): New class. * options.h (General_options): Define --long-plt flag.
2015-12-16PR gold/17473: Fix gold build with system C++ headers that use <ctype.h>.Roland McGrath2-2/+13
gold/ PR gold/17473 * binary.cc: Move #include "safe-ctype.h" to be last #include.
2015-12-13Remove const from return type of get_output_view.Cary Coutant3-8/+15
gold/ * object.h (Object::get_output_view): remove const from return type. (Object::do_get_output_view): Likewise. (Sized_relobj_file::do_get_output_view): Likewise. * reloc.cc (Sized_relobj_file::do_get_output_view): Likewise.
2015-12-11Pass relocations to Target::do_calls_non_split.Cary Coutant7-4/+32
gold/ * target.h (Target::calls_non_split): Add prelocs, reloc_count parameters. (Target::do_calls_non_split): Likewise. * target.cc (Target::do_calls_non_split): Likewise. * reloc.cc (Sized_relobj_file::split_stack_adjust_reltype): Adjust call to Target::calls_non_split. * i386.cc (Target_i386::do_calls_non_split): Add prelocs, reloc_count parameters. * powerpc.cc (Target_powerpc::do_calls_non_split): Likewise. * x86_64.cc (Target_x86_64::do_calls_non_split): Likewise.
2015-12-11Make output views accessible to Target during do_relocate().Cary Coutant4-1/+87
gold/ * object.cc (Sized_relobj_file::Sized_relobj_file): Initialize output_views_. * object.h (Object::get_output_view): New function. (Object::do_get_output_view): New function. (Sized_relobj_file::do_get_output_view): New function. (Sized_relobj_file::output_views_): New data member. * reloc.cc: (Sized_relobj_file::do_relocate): Store pointer to output views in class object. (Sized_relobj_file::do_get_output_view): New function.
2015-12-10ld -r doesn't need plugin for slim lto objectH.J. Lu2-1/+8
Plugin isn't required on slim lto object for relocatable link. PR ld/19317 * symtab.cc (Symbol_table::add_from_relobj): Don't complain plugin needed to handle slim lto object for relocatable link.
2015-12-09[GOLD] PowerPC style fixAlan Modra2-22/+33
* powerpc.cc (Target_powerpc::Relocate::relocate): New constant d_offset. Use throughout. (Target_powerpc::relocate_relocs): Likewise.
2015-12-09[GOLD] Edit PowerPC64 ELFv2 function entry codeAlan Modra2-2/+72
In an fixed position executable, the entry code does not need to be PIC and can thus lose a dependency on r12. * powerpc.cc (Target_powerpc::Relocate::relocate): Edit ELFv2 entry code. (Target_powerpc::relocate_relocs): Edit relocs to suit.
2015-12-09[GOLD] Relocate::relocate() paramsAlan Modra16-229/+146
Some linker code editing needs to change multiple insns. In some cases multiple relocations are involved and it is not sufficient to make the changes independently as relocations are processed, because doing so might lead to a partial edit. So in order to safely edit we need all the relocations available in relocate(). Also, to emit edited relocs corresponding to the edited code sequence we need some way to pass information from relocate() to relocate_relocs(), particularly if the edit depends on insns. We can't modify input relocs in relocate() as they are mmapped PROT_READ, nor it is particularly clean to write relocs to the output at that stage. So add a Relocatable_relocs* field to relinfo to mark edited relocs. Given that relocate is passed the raw reloc pointer, it makes sense to remove the rel/rela parameter and r_type too. However, that means the mips relocate() needs to know whether SHT_REL or SHT_RELA relocs are being processed. So add a rel_type for mips, which also has the benefit of removing relocate() overloading there. This patch adds the infrastructure without making use of it. Note that relinfo->rr will be NULL if not outputting relocations. * object.h (struct Relocate_info): Add "rr". * reloc.h (Relocatable_relocs::set_strategy): New accessor. * reloc.cc (Sized_relobj_file::do_relocate_sections): Init relinfo.rr for relocate_section and relocate_relocs. * powerpc.cc (relocate): Add rel_type and preloc parameters. Delete rela and r_type params, instead recalculate these from preloc. (relocate_relocs): Delete Relocatable_relocs* param, instead use relinfo->rr. * aarch64.cc: Likewise. * arm.cc: Likewise. * i386.cc: Likewise. * mips.cc: Likewise. * s390.cc: Likewise. * sparc.cc: Likewise. * target.h: Likewise. * tilegx.cc: Likewise. * x86_64.cc: Likewise. * testsuite/testfile.cc: Likewise. * target-reloc.h (relocate_section): Adjust to suit. (apply_relocation, relocate_relocs): Likewise.
2015-12-07[GOLD] R_PPC64_ENTRY supportAlan Modra2-0/+53
elfcpp/ * powerpc.h (R_PPC64_ENTRY): Define. gold/ * powerpc.cc (add_2_2_12, ld_2_12, lis_2): Define. (Target_powerpc::Scan::local, global): Handle R_PPC64_ENTRY. (Target_powerpc::Relocate::relocate): Edit code at R_PPC64_ENTRY.
2015-12-03Take addend into account when making GOT entries for local symbols.Vladimir Radosavljevic5-27/+244
gold/ * object.cc (Sized_relobj::do_for_all_local_got_entries): Use Local_got_entry_key for searching in local_got_offsets_. * object.h (class Local_got_entry_key): New class. (Relobj::local_has_got_offset): New overloaded method. (Relobj::local_got_offset): Likewise. (Relobj::set_local_got_offset): Likewise. (Relobj::do_local_has_got_offset): Add addend argument. (Relobj::do_local_got_offset): Likewise. (Relobj::do_set_local_got_offset): Likewise. (Sized_relobj::do_local_has_got_offset): Add addend argument, and use Local_got_entry_key for searching through local_got_offsets_. (Sized_relobj::do_local_got_offset): Likewise. (Sized_relobj::do_set_local_got_offset): Likewise. (Sized_relobj::Local_got_offsets): Change type of the key from unsigned int to Local_got_entry_key, and add hash and equal_to. * output.cc (Got_entry::write): Take addend into account for calculating value of the local symbol for GOT. (Output_data_got::add_local): New definition of overloaded method. (Output_data_got::add_local_with_rel): Likewise. (Output_data_got::add_local_pair_with_rel): Likewise. * output.h (Output_data_got::add_local): New declaration of overloaded method.
2015-11-25Adjust local symbol value in relocatable link to be relative to section.Cary Coutant2-2/+12
gold/ PR gold/19291 * object.cc (Sized_relobj_file::write_local_symbols): If relocatable, subtract section address from symbol value.
2015-11-25[GOLD] Align PowerPC64 GOTAlan Modra2-1/+9
As done in a27e685f for bfd ld. * powerpc.cc (Output_data_got_powerpc::Output_data_got_powerpc): Align to 256 byte boundary.
2015-11-19[GOLD] PowerPC TOC16 and GOT16 relocs are relativeAlan Modra2-2/+6
* powerpc.cc (Target_powerpc::Scan::get_reference_flags): Correct GOT16 and TOC16 relocs to RELATIVE_REF.
2015-11-14Fix problem where bss symbols for copy relocations are marked local.Cary Coutant2-2/+10
gold/ PR gold/19244 PR gold/18548 * symtab.cc (Symbol_table::do_define_in_output_data): Check for forced local symbols only for predefined symbols.
2015-11-11Add assembler, disassembler and linker support for power9.Peter Bergner2-5/+73
include/opcode/ * ppc.h (PPC_OPCODE_POWER9): New define. (PPC_OPCODE_VSX3): Likewise. opcodes/ * ppc-dis.c (ppc_opts): Add "power9" and "pwr9" entries. Add PPC_OPCODE_VSX3 to the vsx entry. (powerpc_init_dialect): Set default dialect to power9. * ppc-opc.c (insert_dcmxs, extract_dcmxs, insert_dxd, extract_dxd, insert_dxdn, extract_dxdn, insert_l0, extract_l0, insert_l1, extract_l1 insert_xtq6, extract_xtq6): New static functions. (insert_esync): Test for illegal L operand value. (DCMX, DCMXS, DXD, NDXD, L0, L1, RC, FC, UIM6, X_R, RIC, PRS, XSQ6, XTQ6, LRAND, IMM8, DQX, DQX_MASK, DX, DX_MASK, VXVAPS_MASK, VXVA,XVA, XX2VA, XVARC, XBF_MASK, XX2UIM4_MASK, XX2BFD_MASK, XX2DCMXS_MASK, XVA_MASK, XRLA_MASK, XBFRARB_MASK, XLRAND_MASK, POWER9, PPCVEC3, PPCVSX3): New defines. (powerpc_opcodes) <ps_cmpu0, ps_cmpo0, ps_cmpu1, ps_cmpo1, fcmpu, fcmpo, ftdiv, ftsqrt>: Use XBF_MASK. <mcrxr>: Use XBFRARB_MASK. <addpcis, bcdcfn., bcdcfsq., bcdcfz., bcdcpsgn., bcdctn., bcdctsq., bcdctz., bcds., bcdsetsgn., bcdsr., bcdtrunc., bcdus., bcdutrunc., cmpeqb, cmprb, cnttzd, cnttzd., cnttzw, cnttzw., copy, copy_first, cp_abort, darn, dtstsfi, dtstsfiq, extswsli, extswsli., ldat, ldmx, lwat, lxsd, lxsibzx, lxsihzx, lxssp, lxv, lxvb16x, lxvh8x, lxvl, lxvll, lxvwsx, lxvx, maddhd, maddhdu, maddld, mcrxrx, mfvsrld, modsd, modsw, modud, moduw, msgsync, mtvsrdd, mtvsrws, paste, paste., paste_last, rmieg, setb, slbieg, slbsync, stdat, stop, stwat, stxsd, stxsibx, stxsihx, stxssp, stxv, stxvb16x, stxvh8x, stxvl, stxvll, stxvx, subpcis, urfid, vbpermd, vclzlsbb, vcmpneb, vcmpneb., vcmpneh, vcmpneh., vcmpnew, vcmpnew., vcmpnezb, vcmpnezb., vcmpnezh, vcmpnezh., vcmpnezw, vcmpnezw., vctzb, vctzd, vctzh, vctzlsbb, vctzw, vextractd, vextractub, vextractuh, vextractuw, vextsb2d, vextsb2w, vextsh2d, vextsh2w, vextsw2d, vextublx, vextubrx, vextuhlx, vextuhrx, vextuwlx, vextuwrx, vinsertb, vinsertd, vinserth, vinsertw, vmul10cuq, vmul10ecuq, vmul10euq, vmul10uq, vnegd, vnegw, vpermr, vprtybd, vprtybq, vprtybw, vrldmi, vrldnm, vrlwmi, vrlwnm, vslv, vsrv, wait, xsabsqp, xsaddqp, xsaddqpo, xscmpeqdp, xscmpexpdp, xscmpexpqp, xscmpgedp, xscmpgtdp, xscmpnedp, xscmpoqp, xscmpuqp, xscpsgnqp, xscvdphp, xscvdpqp, xscvhpdp, xscvqpdp, xscvqpdpo, xscvqpsdz, xscvqpswz, xscvqpudz, xscvqpuwz, xscvsdqp, xscvudqp, xsdivqp, xsdivqpo, xsiexpdp, xsiexpqp, xsmaddqp, xsmaddqpo, xsmaxcdp, xsmaxjdp, xsmincdp, xsminjdp, xsmsubqp, xsmsubqpo, xsmulqp, xsmulqpo, xsnabsqp, xsnegqp, xsnmaddqp, xsnmaddqpo, xsnmsubqp, xsnmsubqpo, xsrqpi, xsrqpix, xsrqpxp, xssqrtqp, xssqrtqpo, xssubqp, xssubqpo, xststdcdp, xststdcqp, xststdcsp, xsxexpdp, xsxexpqp, xsxsigdp, xsxsigqp, xvcmpnedp, xvcmpnedp., xvcmpnesp, xvcmpnesp., xvcvhpsp, xvcvsphp, xviexpdp, xviexpsp, xvtstdcdp, xvtstdcsp, xvxexpdp, xvxexpsp, xvxsigdp, xvxsigsp, xxbrd, xxbrh, xxbrq, xxbrw, xxextractuw, xxinsertw, xxperm, xxpermr, xxspltib>: New instructions. <doze, nap, sleep, rvwinkle, waitasec, lxvx, stxvx>: Disable on POWER9. <tlbiel, tlbie, sync, slbmfev, slbmfee>: Add additional operands. include/elf/ * ppc.h (R_PPC_REL16DX_HA): New reloction. * ppc64.h (R_PPC64_REL16DX_HA): Likewise. bfd/ * elf32-ppc.c (ppc_elf_howto_raw): Add R_PPC_REL16DX_HA. (ppc_elf_reloc_type_lookup): Handle R_PPC_REL16DX_HA. (ppc_elf_addr16_ha_reloc): Likewise. (ppc_elf_check_relocs): Likewise. (ppc_elf_relocate_section): Likewise. (is_insn_dq_form): Handle lxv and stxv instructions. * elf64-ppc.c (ppc64_elf_howto_raw): Add R_PPC64_REL16DX_HA. (ppc64_elf_reloc_type_lookup): Handle R_PPC64_REL16DX_HA. (ppc64_elf_ha_reloc): Likewise. (ppc64_elf_check_relocs): Likewise. (ppc64_elf_relocate_section): Likewise. * bfd-in2.h: Regenerate. * libbfd.h: Likewise. * reloc.c (BFD_RELOC_PPC_REL16DX_HA): New. elfcpp/ * powerpc.h (R_POWERPC_REL16DX_HA): Define. gas/ * doc/as.texinfo (Target PowerPC): Document -mpower9 and -mpwr9. * doc/c-ppc.texi (PowerPC-Opts): Likewise. * config/tc-ppc.c (md_show_usage): Likewise. (md_assemble): Handle BFD_RELOC_PPC_REL16DX_HA. (md_apply_fix): Likewise. (ppc_handle_align): Handle power9's group ending nop. gas/testsuite/ * gas/ppc/altivec3.s: New test. * gas/ppc/altivec3.d: Likewise. * gas/ppc/vsx3.s: Likewise. * gas/ppc/vsx3.d: Likewise. * gas/ppc/power9.s: Likewise. * gas/ppc/power9.d: Likewise. * gas/ppc/ppc.exp: Run them. * gas/ppc/power8.s <lxvx, lxvd2x, stxvx, stxvd2x>: Add new tests. * gas/ppc/power8.d: Likewise. * gas/ppc/vsx.s: <lxvx, stxvx>: Rename invalid mnemonics ... <lxvd2x, stxvd2x>: ...to this. * gas/ppc/vsx.d: Likewise. gold/ * gold/powerpc.cc (Powerpc_relocate_functions::addr16_dq): New function. (Powerpc_relocate_functions::addr16dx_ha): Likewise. (Target_powerpc::Scan::local): Handle R_POWERPC_REL16DX_HA. (Target_powerpc::Scan::global): Likewise. (Target_powerpc::Relocate::relocate): Likewise. ld/testsuite/ * ld-powerpc/addpcis.d: New test. * ld-powerpc/addpcis.s: New test. * ld-powerpc/powerpc.exp: Run it.
2015-11-09Recognize .pdr debug sections.Vladimir Radosavljevic2-1/+7
gold/ * layout.h (Layout::is_debug_info_section): Recognize .pdr debug sections.
2015-11-09Remove unnecessary target dependencies on relocation format.Cary Coutant12-23/+78
2015-11-09 Cary Coutant <ccoutant@gmail.com> Vladimir Radosavljevic <Vladimir.Radosavljevic@imgtec.com> gold/ * copy-relocs.h (Copy_relocs::copy_reloc): Replace reloc parameter with type, offset, addend. (Copy_relocs::save): Likewise. * copy-relocs.cc (Copy_relocs::copy_reloc): Likewise. (Copy_relocs::save): Likewise. * aarch64.cc (Target_aarch64::copy_reloc): Pass r_type, r_offset, and r_addend to Copy_relocs::copy_reloc. * arm.cc (Target_arm::copy_reloc): Likewise. * i386.cc (Target_i386::copy_reloc): Likewise. * mips.cc (Target_mips::copy_reloc): Likewise. * powerpc.cc (Target_powerpc::copy_reloc): Likewise. * s390.cc (Target_s390::copy_reloc): Likewise. * sparc.cc (Target_sparc::copy_reloc): Likewise. * tilegx.cc (Target_tilegx::copy_reloc): Likewise. * x86_64.cc (Target_x86_64::copy_reloc): Likewise.
2015-11-05Revert patch for PR 19119, which led to PR 19172 and 19197.Cary Coutant3-11/+12
Gold does not support all the emulations that Gnu ld does, and supports only one spelling per target. The -m option is used only in the rare case where there are no ELF input files, and we produce an empty output file. In those cases, users are expected to supply a -m option naming one of the supported emulations. In the many cases where a build script provides an unnecessary -m option naming an emulation that gold does not support, we will simply ignore the option, as we did before the reverted patch. gold/ PR gold/19119 PR gold/19172 PR gold/19197 Revert commit 6457197210144f50a696097c0d308d81d46d5510: 2015-10-16 H.J. Lu <hongjiu.lu@intel.com> * options.h (General_options): Remove "obsolete" from -m. * parameters.cc (set_parameters_target): Check if input target is compatible with output emulation set by "-m emulation".
2015-11-05Add aarch64-specific --no-apply-dynamic-relocs option.Cary Coutant3-0/+37
With --no-apply-dynamic-relocs on aarch64 targets, gold will not apply link-time values for absolute relocations that become dynamic relocations. This provides a workaround for broken Android dynamic linkers that use the link-time value as an extra addend to the relocation. gold/ PR gold/19163 * aarch64.cc (Target_aarch64::Relocate::relocate): Don't apply certain relocations if --no-apply-dynamic-relocs is set. * options.h (--apply-dynamic-relocs): New aarch64-specific option.
2015-11-03[GOLD] Regenerate POTFILES.in to add s390.ccAlan Modra2-0/+5
* po/POTFILES.in: Regenerate.
2015-10-30Updated (simplified) Chinese translations for ld, bfd, binutils and gold.Nick Clifton2-0/+3603
* po/zh_CN.po: Updated (simplified) Chinese translation.
2015-10-29Make GOT entry size target-dependentH.J. Lu4-4/+33
The GOT entry size is target-dependent. This patch adds a got_entry_size function to Sized_target class so that a target can provide a value different from default. PR gold/19184 * incremental.cc (Got_plt_view_info): Add got_entry_size. (Local_got_offset_visitor::visit): Replace got_entry_size_ with info_.got_entry_size. (Local_got_offset_visitor::got_entry_size_): Removed. (Global_got_offset_visitor::visit): Replace got_entry_size_ with info_.got_entry_size. (Global_got_offset_visitor::got_entry_size_): Removed. (Output_section_incremental_inputs::write_got_plt): Initialize view_info.got_entry_size. * target.h (Sized_target::got_entry_size): New virtual function. * x86_64.cc (Target_x86_64::got_entry_size): New function.
2015-10-28Add __attribute__((__aligned__(1))) to unaligned symbols from scripts (for ↵Marcin Kościelnicki5-14/+28
s390). gold/ * testsuite/binary_test.cc: Add __attribute__((aligned(1))). * testsuite/script_test_12a.c: Likewise. * testsuite/script_test_1a.cc: Likewise. * testsuite/script_test_2.cc: Likewise.
2015-10-28Make debug_msg.sh more open-minded about line numbers (needed for s390).Marcin Kościelnicki2-19/+23
gold/ * testsuite/debug_msg.sh: Accept more fuzz in line numbers.