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gold/
PR ld/23486
* x86_64.cc (Target_x86_64::Target_x86_64): Initialize
object_isa_1_used_.
(Target_x86_64::object_isa_1_used_): New data member.
(Target_x86_64::record_gnu_property): Save ISA_1_USED bits for object.
(Target_x86_64::merge_gnu_properties): Merge ISA_1_USED bits.
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gold/
* target.h (Sized_target::record_gnu_property): Change first two
parameters to unsigned int.
* x86_64.cc (Target_x86_64::record_gnu_property): Likewise.
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gold/
PR gold/22914
* x86_64.cc (Target_x86_64::record_gnu_property): Initialize val.
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gold/
PR gold/22915
* x86_64.cc (Output_data_plt_x86_64_ibt): New class.
(Target_x86_64::do_make_data_plt): (All instantiations) Check for
IBT feature bit and create IBT PLTs.
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The original patch did not give the target enough hooks to discover that
an input object file does not have a particular property. For the
GNU_PROPERTY_X86_FEATURE_1_AND property, for example, where a missing
property should be assumed to be all zeroes, and ANDed with other
object modules, this is essential. We now store the target-specific
properties locally in the Target structure as native uint32_t fields,
then AND the per-object feature bits with the program's feature bits
when we're finished processing each input object file. The target-specific
properties are then added back to the output note section during
finalization.
gold/
PR gold/22914
* layout.cc (read_sized_value): Fix spelling of section name.
(Layout::layout_gnu_property): Call Sized_target::record_gnu_property
for target-specific properties;
don't store them with target-independent properties yet.
(Layout::merge_gnu_properties): New method.
(Layout::add_gnu_property): New method.
(Layout::create_gnu_properties_note): Call target to finalize
target-specific properties. Fix spelling of output section name.
* layout.h (Layout::merge_gnu_properties): New method.
(Layout::add_gnu_property): New method.
* object.cc (Sized_relobj_file::do_layout): Call
Layout::merge_gnu_properties.
* target.h (Target::merge_gnu_property): Remove.
(Target::finalize_gnu_properties): New method.
(Target::do_merge_gnu_property): Move to Sized_target and rename.
(Target::do_finalize_gnu_properties): New virtual method.
(Sized_target::record_gnu_property): Moved and renamed from
Target::do_merge_gnu_property.
(Sized_target::merge_gnu_properties): New virtual method.
* x86_64.cc (Target_x86_64::isa_1_used_, isa_1_needed_)
(feature_1_, object_feature_1_, seen_first_object_): New data members.
(Target_x86_64::do_merge_gnu_property): Rename to ...
(Target_x86_64::record_gnu_property): ... this. Save target-specific
properties in Target class object.
(Target_x86_64::merge_gnu_properties): New method.
(add_property): New static inline function.
(Target_x86_64::do_finalize_gnu_properties): New method.
* testsuite/Makefile.am (gnu_property_test): Remove C source file;
link directly without compiler driver.
* testsuite/Makefile.in: Regenerate.
* testsuite/gnu_property_a.S: Add _start.
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elfcpp/
PR gold/22914
* elfcpp.h (NT_GNU_PROPERTY_TYPE_0): New note type.
(GNU_PROPERTY_*): New Gnu property types.
* x86_64.h (GNU_PROPERTY_X86_FEATURE_1_IBT)
(GNU_PROPERTY_X86_FEATURE_1_SHSTK): New x86 feature bits.
gold/
PR gold/22914
* layout.cc (Layout::Layout): Initialize gnu_properties_.
(read_sized_value, write_sized_value): New functions.
(Layout::layout_gnu_property): New method.
(Layout::create_notes): Call create_gnu_properties_note.
(Layout::create_gnu_properties_note): New method.
* layout.h (Layout::layout_gnu_property): New method.
(Layout::create_gnu_properties_note): New method.
(Layout::Gnu_property, Layout::Gnu_properties): New types.
(Layout::gnu_properties_): New data member.
* object.cc (Sized_relobj_file::layout_gnu_property_section): New
method.
(Sized_relobj_file::do_layout): Handle .note.gnu.property sections.
* object.h (Sized_relobj_file::layout_gnu_property_section): New
method.
* target.h (Target::merge_gnu_property): New method.
(Target::do_merge_gnu_property): New virtual method.
* x86_64.cc (Target_x86_64::do_merge_gnu_property): New method.
* testsuite/Makefile.am (gnu_property_test): New test case.
* testsuite/Makefile.in: Regenerate.
* testsuite/gnu_property_a.S: New source file.
* testsuite/gnu_property_b.S: New source file.
* testsuite/gnu_property_c.S: New source file.
* testsuite/gnu_property_main.c: New source file.
* testsuite/gnu_property_test.sh: New test script.
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During a -r (or --emit-relocs) link, if two sections had the same name but
different section types, gold would put relocations for both sections into
the same relocation section even though the data sections remained separate.
For .eh_frame sections, when one section is PROGBITS and another is
X86_64_UNWIND, we really should be using the UNWIND section type and
combining the sections anyway. For other sections, we should be
creating one relocation section for each output data section.
gold/
PR gold/23016
* incremental.cc (can_incremental_update): Check for unwind section
type.
* layout.h (Layout::layout): Add sh_type parameter.
* layout.cc (Layout::layout): Likewise.
(Layout::layout_reloc): Create new output reloc section if data
section does not already have one.
(Layout::layout_eh_frame): Check for unwind section type.
(Layout::make_eh_frame_section): Use unwind section type for .eh_frame
and .eh_frame_hdr.
* object.h (Sized_relobj_file::Shdr_write): New typedef.
(Sized_relobj_file::layout_section): Add sh_type parameter.
(Sized_relobj_file::Deferred_layout::Deferred_layout): Add sh_type
parameter.
* object.cc (Sized_relobj_file::check_eh_frame_flags): Check for
unwind section type.
(Sized_relobj_file::layout_section): Add sh_type parameter; pass it
to Layout::layout.
(Sized_relobj_file::do_layout): Make local copy of sh_type.
Force .eh_frame sections to unwind section type.
Pass sh_type to layout_section.
(Sized_relobj_file<size, big_endian>::do_layout_deferred_sections):
Pass sh_type to layout_section.
* output.cc (Output_section::Output_section): Initialize reloc_section_.
* output.h (Output_section::reloc_section): New method.
(Output_section::set_reloc_section): New method.
(Output_section::reloc_section_): New data member.
* target.h (Target::unwind_section_type): New method.
(Target::Target_info::unwind_section_type): New data member.
* aarch64.cc (aarch64_info): Add unwind_section_type.
* arm.cc (arm_info, arm_nacl_info): Likewise.
* i386.cc (i386_info, i386_nacl_info, iamcu_info): Likewise.
* mips.cc (mips_info, mips_nacl_info): Likewise.
* powerpc.cc (powerpc_info): Likewise.
* s390.cc (s390_info): Likewise.
* sparc.cc (sparc_info): Likewise.
* tilegx.cc (tilegx_info): Likewise.
* x86_64.cc (x86_64_info, x86_64_nacl_info): Likewise.
* testsuite/Makefile.am (pr23016_1, pr23016_2): New test cases.
* testsuite/Makefile.in: Regenerate.
* testsuite/testfile.cc: Add unwind_section_type.
* testsuite/pr23016_1.sh: New test script.
* testsuite/pr23016_1a.s: New source file.
* testsuite/pr23016_1b.s: New source file.
* testsuite/pr23016_2.sh: New test script.
* testsuite/pr23016_2a.s: New source file.
* testsuite/pr23016_2b.s: New source file.
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This is a partial fix for the gold testsuite failures documented in
PR 21090. The use of -fpie triggers some mov-to-lea optimizations that
are not compatible with incremental linking, so those optimizations need
to be disabled. We also diagnose the attempt to use -pie with incremental
linking, and force -no-pie for the incremental tests in case the build has
been configured to have GCC pass -pie all the time.
We still have a problem where compiling with -fpie results in some GOT
entries even when linking with -no-pie. This combination still causes test
failures because we are not updating the GOT entries in an incremental update
link.
gold/
PR gold/21090
* incremental.cc (Sized_relobj_incr::do_relocate): Fix comment.
* options.cc (General_options::finalize): Disallow -pie with
incremental linking.
* x86_64.cc (Target_x86_64::Scan::local): Don't do mov-to-lea
or callq-to-direct optimizations for incremental links.
(Target_x86_64::Scan::global): Likewise.
(Target_x86_64::Relocate::relocate): Likewise.
* testsuite/Makefile.am (incremental_test): Force -no-pie.
(incremental_test_2): Likewise.
(incremental_test_3): Likewise.
(incremental_test_4): Likewise.
(incremental_test_5): Likewise.
(incremental_test_6): Likewise.
(incremental_copy_test): Likewise.
(incremental_common_test_1): Likewise.
(incremental_comdat_test_1): Likewise.
* testsuite/Makefile.in: Regenerate.
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gold/
* x86_64.cc (Target_x86_64::do_can_check_for_function_pointers):
Return true even when building pie binaries.
(Target_x86_64::possible_function_pointer_reloc): Check opcode
for R_X86_64_PC32 relocations.
(Target_x86_64::local_reloc_may_be_function_pointer): Pass
extra arguments to local_reloc_may_be_function_pointer.
(Target_x86_64::global_reloc_may_be_function_pointer): Likewise.
* gc.h (gc_process_relocs): Add check for STT_FUNC.
* testsuite/Makefile.am (icf_safe_pie_test): New test case.
* testsuite/Makefile.in: Regenerate.
* testsuite/icf_safe_pie_test.sh: New shell script.
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gold/
PR gold/21090
* x86_64.cc (Target_x86_64::can_convert_mov_to_lea): Add check
for predefined symbol.
(Target_x86_64::Relocate::relocate): Fix formatting.
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gold/
PR gold/21040
* x86_64.cc (Output_data_plt_x86_64_bnd::do_fill_first_plt_entry):
Remove unnecessary 'typename' keyword.
(Output_data_plt_x86_64_bnd::do_fill_plt_entry): Likewise.
(Output_data_plt_x86_64_bnd::fill_aplt_entry): Likewise.
(Output_data_plt_x86_64_bnd::do_fill_tlsdesc_entry): Likewise.
(Output_data_plt_x86_64_bnd::do_write): Likewise.
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gold/
PR gold/21040
* x86_64.cc (Output_data_plt_x86_64_bnd::do_fill_first_plt_entry):
Remove unnecessary 'typename' keyword.
(Output_data_plt_x86_64_bnd::do_fill_plt_entry): Likewise.
(Output_data_plt_x86_64_bnd::do_fill_tlsdesc_entry): Likewise.
(Output_data_plt_x86_64_bnd::fill_aplt_entry): Likewise.
* testsuite/copy_test_relro_1.cc (p, b, c, q): Add separate extern
declarations.
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gold/
PR gold/17643
* options.h (-z bndplt): New option.
* x86_64.cc (Output_data_plt_x86_64::regular_count): New method.
(Output_data_plt_x86_64::address_for_global): Move implementation into
virtual method.
(Output_data_plt_x86_64::address_for_local): Likewise.
(Output_data_plt_x86_64::got): New method.
(Output_data_plt_x86_64::got_plt): New method.
(Output_data_plt_x86_64::got_irelative): New method.
(Output_data_plt_x86_64::do_address_for_global): New virtual method.
(Output_data_plt_x86_64::do_address_for_local): New virtual method.
(class Output_data_plt_x86_64_bnd): New class.
(Target_x86_64::do_make_data_plt): Move out of line and specialize
for each size (both overloads).
(Output_data_plt_x86_64::set_final_data_size): Cosmetic changes.
* testsuite/Makefile.am (bnd_plt_1): New test case.
(bnd_ifunc_1): New test case.
(bnd_ifunc_2): New test case.
* testsuite/Makefile.in: Regenerate.
* testsuite/bnd_ifunc_1.s: New source file.
* testsuite/bnd_ifunc_1.sh: New shell script.
* testsuite/bnd_ifunc_2.s: New source file.
* testsuite/bnd_ifunc_2.sh: New shell script.
* testsuite/bnd_plt_1.s: New source file.
* testsuite/bnd_plt_1.sh: New shell script.
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* aarch64.cc: Spell fall through comments as "// Fall through.".
* arm.cc: Likewise.
* mips.cc: Likewise.
* powerpc.cc: Likewise.
* s390.cc: Likewise.
* sparc.cc: Likewise.
* x86_64.cc: Likewise.
* powerpc.cc (Target_powerpc::Relocate::relocate): Add missing
fall through comments.
* sparc.cc: (Target_sparc::Scan::global): Likewise.
(Target_sparc::Relocate::relocate): Likewise.
* tilegx.cc (Target_tilegx::Relocate::relocate): Likewise.
* resolve.cc (symbol_to_bits): Add missing break.
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With some versions of gas, the call to tls_get_addr uses a GOTPCREL
relocation instead of a GOTPCRELX relocation. We should allow for that
when skip_call_tls_get_addr_ is true. We should also build the test
objects with the in-tree assembler.
This patch also fixes some cascading error messages caused by not
resetting the skip_call_tls_get_addr_ flag after printing the error.
gold/
PR gold/20216
* x86_64.cc (Target_x86_64::Relocate::relocate): Add check for
R_X86_64_GOTPCREL. Reset skip_call_tls_get_addr_ after printing
error message.
* testsuite/Makefile.am (pr20216_gd.o): Add -Bgcctestdir/.
(pr20216_ld.o): Likewise.
* testsuite/Makefile.in: Regenerate.
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There are extensions to x86-64 psABI:
https://groups.google.com/forum/#!topic/x86-64-abi/de5_KnLHxtI
to call tls_get_addr via GOT:
call *__tls_get_addr@GOTPCREL(%rip)
Since direct call is 4-byte long and indirect call, is 5-byte long, the
extra one byte must be handled properly.
For general dynamic model, one 0x66 prefix before call instruction is
removed to make room for indirect call. For local dynamic model, we
simply use 5-byte indirect call.
TLS linker optimization is updated to recognize new instruction
patterns. For local dynamic model to local exec model transition, we
generate 4 0x66 prefixes, instead of 3, before mov instruction in 64-bit
and generate a 5-byte nop, instead of 4-byte, before mov instruction in
32-bit.
PR gold/20216
* configure.ac (DEFAULT_TARGET_X86_64_OR_X32): New
AM_CONDITIONAL.
* configure: Regenerated.
* x86_64.cc (Target_x86_64<size>::Relocate::relocate): Allow
R_X86_64_GOTPCRELX relocation against __tls_get_addr.
(Target_x86_64<size>::Relocate::tls_gd_to_ie): Support indirect
call to __tls_get_addr.
(Target_x86_64<size>::Relocate::tls_gd_to_le): Likewise.
(Target_x86_64<size>::Relocate::tls_ld_to_le): Likewise.
* testsuite/Makefile.am (check_PROGRAMS): Add pr20216a_test,
pr20216b_test, pr20216c_test, pr20216d_test, pr20216e_test.
(pr20216a_test_SOURCES): New.
(pr20216a_test_DEPENDENCIES): Likewise.
(pr20216a_test_CFLAGS): Likewise.
(pr20216a_test_LDFLAGS): Likewise.
(pr20216a_test_LDADD): Likewise.
(pr20216b_test_SOURCES): Likewise.
(pr20216b_test_DEPENDENCIES): Likewise.
(pr20216b_test_CFLAGS): Likewise.
(pr20216b_test_LDFLAGS): Likewise.
(pr20216b_test_LDADD): Likewise.
(pr20216c_test_SOURCES): Likewise.
(pr20216c_test_DEPENDENCIES): Likewise.
(pr20216c_test_CFLAGS): Likewise.
(pr20216c_test_LDFLAGS): Likewise.
(pr20216c_test_LDADD): Likewise.
(pr20216d_test_SOURCES): Likewise.
(pr20216d_test_DEPENDENCIES): Likewise.
(pr20216d_test_CFLAGS): Likewise.
(pr20216d_test_LDFLAGS): Likewise.
(pr20216d_test_LDADD): Likewise.
(pr20216e_test_SOURCES): Likewise.
(pr20216e_test_DEPENDENCIES): Likewise.
(pr20216e_test_CFLAGS): Likewise.
(pr20216e_test_LDFLAGS): Likewise.
(pr20216e_test_LDADD): Likewise.
(pr20216a.so): Likewise.
(pr20216b.so): Likewise.
(pr20216_gd.o): Likewise.
(pr20216_ld.o): Likewise.
(MOSTLYCLEANFILES): Add pr20216a.so pr20216b.so.
* testsuite/Makefile.in: Regenerated.
* testsuite/pr20216_def.c: New file.
* testsuite/pr20216_gd.S: Likewise.
* testsuite/pr20216_ld.S: Likewise.
* testsuite/pr20216_main.c: Likewise.
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Please see patch discussion:
https://www.sourceware.org/ml/binutils/2016-05/msg00322.html
2016-06-28 Sriraman Tallam <tmsriram@google.com>
* x86_64.cc (Lazy_view): New class.
(can_convert_mov_to_lea): Templatize function. Make the function
check for appropriate relocation types and use the view parameter
to get section contents.
(can_convert_callq_to_direct): New function.
(Target_x86_64<size>::Scan::global): Refactor.
(Target_x86_64<size>::Relocate::relocate): Refactor. Change any indirect
call via GOT that can be converted.
* testsuite/Makefile.am (x86_64_indirect_call_to_direct.sh): New test.
* testsuite/Makefile.in: Regenerate.
* testsuite/x86_64_indirect_call_to_direct1.s: New file.
* testsuite/x86_64_indirect_jump_to_direct1.s: New file.
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If there is no PLT in output, return 0 for first_plt_entry_offset and
plt_entry_size.
PR gold/20245
* i386.cc (Target_i386::first_plt_entry_offset): Return 0 if
plt_ is NULL.
(Target_i386::plt_entry_size): Likewise.
(Target_x86_64<size>::first_plt_entry_offset): Likewise.
(Target_x86_64<size>::plt_entry_size): Likewise.
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gold/
PR gold/18695
* x86_64.cc (Target_x86_64::Relocate::relocate): Add additional
information to relocation overflow errors.
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On x32, a pc-relative reference to an undef weak symbol (value 0)
with a negative addend (typically -4) generates a spurious overflow
error because Symbol_value::value() returns a 32-bit negative number
as an unsigned number, which gets zero-extended before subtracting
the PC value. This patch fixes the problem by special-casing the
negative addend, and adding it to the value after widening it to
64 bits. Symbol_value::value() does not need the addend if it's
negative, since it is only important when processing section
symbols for merge sections, where a positive addend provides the
input section offset of the merged constant.
gold/
* x86_64.cc (X86_64_relocate_functions::pcrela32_check): Fix x32
overflow checking when symbol value + addend < 0.
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The problem here is that x32 is really using 64-bit addressing,
while pretending to be 32-bit. Even though the object file format
is 32-bit, we need to do the overflow checking with 64-bit
arithmetic (because that's what the hardware will be using).
This patch overrides the pcrela32_check functions in reloc.h
with target-specific versions that do 64-bit checking.
I've also updated the test case to use -Tdata instead of adding
a huge .space directive, to reduce the size of the .o files.
gold/
PR gold/19567
* reloc.h (Relocate_functions::Overflow_check): Add comments.
* x86_64.cc (X86_64_relocate_functions): New class.
(Target_x86_64::Relocate::relocate): Use the new class.
* testsuite/Makefile.am (x86_64_overflow_pc32): Add -Tdata option.
(x32_overflow_pc32): New test case.
* testsuite/Makefile.in: Regenerate.
* testsuite/x32_overflow_pc32.sh: New script.
* testsuite/x86_64_overflow_pc32.s: Remove .space directive.
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2016-02-05 Cary Coutant <ccoutant@gmail.com>
Andrew Senkevich <andrew.senkevich@intel.com>
gold/
PR gold/18695
* x86_64.cc (Target_x86_64::Relocate::relocate): Add overflow
checking for R_X86_64_32, R_X86_64_32S, R_X86_64_PC32, and
R_X86_64_PLT32.
* testsuite/Makefile.am (x86_64_overflow_pc32): New test.
* testsuite/x86_64_overflow_pc32.sh: New test script.
* testsuite/x86_64_overflow_pc32.s: New source file.
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gold/
PR gold/19353
* aarch64.cc (Target_aarch64::relocate_tls): Don't insist that
we have a TLS segment for GD-to-IE optimization.
* i386.cc (Target_i386::tls_gd_to_ie): Remove tls_segment parameter.
Adjust all calls.
(Target_i386::tls_desc_gd_to_ie): Likewise.
(Target_i386::relocate_tls): Don't insist that we have a TLS segment
for TLSDESC GD-to-IE optimizations.
* x86_64.cc (Target_x86_64::tls_gd_to_ie): Remove tls_segment parameter.
Adjust all calls.
(Target_x86_64::tls_desc_gd_to_ie): Likewise.
(Target_x86_64::relocate_tls): Don't insist that we have a TLS segment
for TLSDESC GD-to-IE optimizations.
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For MIPS-64, the r_info field in the relocation format is
replaced by several individual fields, including r_sym and
r_type. To enable support for this format, I've refactored
target-independent code to remove almost all uses of the r_info
field. (I've left alone a couple of routines used only for
incremental linking, which I can update if/when the MIPS target
adds support for incremental linking.)
For routines that are already templated on a Classify_reloc class
(namely, gc_process_relocs, relocate_section, and
relocate_relocs), I've extended the Classify_reloc interface to
include sh_type (which no longer needs to be a separate template
parameter) as well as get_r_sym() and get_r_type() methods for
extracting the r_sym and r_type fields. For
scan_relocatable_relocs, I've extended the
Default_scan_relocatable_relocs class by converting it to a class
template with Classify_reloc as a template parameter. For the
remaining routines that need to access r_sym, I've added a
virtual Target::get_r_sym() method with an override for the MIPS
target.
In elfcpp, I've added Mips64_rel, etc., accessor classes and
corresponding internal data structures. The MIPS target uses
these new classes within its own Mips_classify_reloc class.
The Mips64_ accessor classes also expose the r_ssym, r_type2,
and r_type3 fields from the relocation.
These changes should be functionally the same for all but the
MIPS target.
elfcpp/
* elfcpp.h (Mips64_rel, Mips64_rel_write): New classes.
(Mips64_rela, Mips64_rela_write): New classes.
* elfcpp_internal.h (Mips64_rel_data, Mips64_rela_data): New structs.
gold/
* gc.h (get_embedded_addend_size): Remove sh_type parameter.
(gc_process_relocs): Remove sh_type template parameter.
Use Classify_reloc to access r_sym, r_type, and r_addend fields.
* object.h (Sized_relobj_file::split_stack_adjust): Add target
parameter.
(Sized_relobj_file::split_stack_adjust_reltype): Likewise.
* reloc-types.h (Reloc_types::copy_reloc_addend): (SHT_REL and SHT_RELA
specializations) Remove.
* reloc.cc (Emit_relocs_strategy): Rename and move to target-reloc.h.
(Sized_relobj_file::emit_relocs_scan): Call Target::emit_relocs_scan().
(Sized_relobj_file::emit_relocs_scan_reltype): Remove.
(Sized_relobj_file::split_stack_adjust): Add target parameter.
Adjust all callers.
(Sized_relobj_file::split_stack_adjust_reltype): Likewise. Call
Target::get_r_sym() to get r_sym field from relocations.
(Track_relocs::next_symndx): Call Target::get_r_sym().
* target-reloc.h (scan_relocs): Remove sh_type template parameter;
add Classify_reloc template parameter. Use for accessing r_sym and
r_type.
(relocate_section): Likewise.
(Default_classify_reloc): New class (renamed and moved from reloc.cc).
(Default_scan_relocatable_relocs): Remove sh_type template parameter.
(Default_scan_relocatable_relocs::Reltype): New typedef.
(Default_scan_relocatable_relocs::reloc_size): New const.
(Default_scan_relocatable_relocs::sh_type): New const.
(Default_scan_relocatable_relocs::get_r_sym): New method.
(Default_scan_relocatable_relocs::get_r_type): New method.
(Default_emit_relocs_strategy): New class.
(scan_relocatable_relocs): Replace sh_type template parameter with
Scan_relocatable_relocs class. Use it to access r_sym and r_type
fields.
(relocate_relocs): Replace sh_type template parameter with
Classify_reloc class. Use it to access r_sym and r_type fields.
* target.h (Target::is_call_to_non_split): Replace r_type parameter
with pointer to relocation. Adjust all callers.
(Target::do_is_call_to_non_split): Likewise.
(Target::emit_relocs_scan): New virtual method.
(Sized_target::get_r_sym): New virtual method.
* target.cc (Target::do_is_call_to_non_split): Replace r_type parameter
with pointer to relocation.
* aarch64.cc (Target_aarch64::emit_relocs_scan): New method.
(Target_aarch64::Relocatable_size_for_reloc): Remove.
(Target_aarch64::gc_process_relocs): Use Default_classify_reloc.
(Target_aarch64::scan_relocs): Likewise.
(Target_aarch64::relocate_section): Likewise.
(Target_aarch64::Relocatable_size_for_reloc::get_size_for_reloc):
Remove.
(Target_aarch64::scan_relocatable_relocs): Use Default_classify_reloc.
(Target_aarch64::relocate_relocs): Use Default_classify_reloc.
* arm.cc (Target_arm::Arm_scan_relocatable_relocs): Remove sh_type
template parameter.
(Target_arm::emit_relocs_scan): New method.
(Target_arm::Relocatable_size_for_reloc): Replace with...
(Target_arm::Classify_reloc): ...this.
(Target_arm::gc_process_relocs): Use Classify_reloc.
(Target_arm::scan_relocs): Likewise.
(Target_arm::relocate_section): Likewise.
(Target_arm::scan_relocatable_relocs): Likewise.
(Target_arm::relocate_relocs): Likewise.
* i386.cc (Target_i386::emit_relocs_scan): New method.
(Target_i386::Relocatable_size_for_reloc): Replace with...
(Target_i386::Classify_reloc): ...this.
(Target_i386::gc_process_relocs): Use Classify_reloc.
(Target_i386::scan_relocs): Likewise.
(Target_i386::relocate_section): Likewise.
(Target_i386::scan_relocatable_relocs): Likewise.
(Target_i386::relocate_relocs): Likewise.
* mips.cc (Mips_scan_relocatable_relocs): Remove sh_type template
parameter.
(Mips_reloc_types): New class template.
(Mips_classify_reloc): New class template.
(Target_mips::Reltype): New typedef.
(Target_mips::Relatype): New typedef.
(Target_mips::emit_relocs_scan): New method.
(Target_mips::get_r_sym): New method.
(Target_mips::Relocatable_size_for_reloc): Replace with
Mips_classify_reloc.
(Target_mips::copy_reloc): Use Mips_classify_reloc.
(Target_mips::gc_process_relocs): Likewise.
(Target_mips::scan_relocs): Likewise.
(Target_mips::relocate_section): Likewise.
(Target_mips::scan_relocatable_relocs): Likewise.
(Target_mips::relocate_relocs): Likewise.
(mips_get_size_for_reloc): New function, factored out from
Relocatable_size_for_reloc::get_size_for_reloc.
(Target_mips::Scan::local): Use Mips_classify_reloc.
(Target_mips::Scan::global): Likewise.
(Target_mips::Relocate::relocate): Likewise.
* powerpc.cc (Target_powerpc::emit_relocs_scan): New method.
(Target_powerpc::Relocatable_size_for_reloc): Remove.
(Target_powerpc::gc_process_relocs): Use Default_classify_reloc.
(Target_powerpc::scan_relocs): Likewise.
(Target_powerpc::relocate_section): Likewise.
(Powerpc_scan_relocatable_reloc): Convert to class template.
(Powerpc_scan_relocatable_reloc::Reltype): New typedef.
(Powerpc_scan_relocatable_reloc::reloc_size): New const.
(Powerpc_scan_relocatable_reloc::sh_type): New const.
(Powerpc_scan_relocatable_reloc::get_r_sym): New method.
(Powerpc_scan_relocatable_reloc::get_r_type): New method.
(Target_powerpc::scan_relocatable_relocs): Use
Powerpc_scan_relocatable_reloc.
(Target_powerpc::relocate_relocs): Use Default_classify_reloc.
* s390.cc (Target_s390::emit_relocs_scan): New method.
(Target_s390::Relocatable_size_for_reloc): Remove.
(Target_s390::gc_process_relocs): Use Default_classify_reloc.
(Target_s390::scan_relocs): Likewise.
(Target_s390::relocate_section): Likewise.
(Target_s390::Relocatable_size_for_reloc::get_size_for_reloc):
Remove.
(Target_s390::scan_relocatable_relocs): Use Default_classify_reloc.
(Target_s390::relocate_relocs): Use Default_classify_reloc.
* sparc.cc (Target_sparc::emit_relocs_scan): New method.
(Target_sparc::Relocatable_size_for_reloc): Remove.
(Target_sparc::gc_process_relocs): Use Default_classify_reloc.
(Target_sparc::scan_relocs): Likewise.
(Target_sparc::relocate_section): Likewise.
(Target_sparc::Relocatable_size_for_reloc::get_size_for_reloc):
Remove.
(Target_sparc::scan_relocatable_relocs): Use Default_classify_reloc.
(Target_sparc::relocate_relocs): Use Default_classify_reloc.
* tilegx.cc (Target_tilegx::emit_relocs_scan): New method.
(Target_tilegx::Relocatable_size_for_reloc): Remove.
(Target_tilegx::gc_process_relocs): Use Default_classify_reloc.
(Target_tilegx::scan_relocs): Likewise.
(Target_tilegx::relocate_section): Likewise.
(Target_tilegx::Relocatable_size_for_reloc::get_size_for_reloc):
Remove.
(Target_tilegx::scan_relocatable_relocs): Use Default_classify_reloc.
(Target_tilegx::relocate_relocs): Use Default_classify_reloc.
* x86_64.cc (Target_x86_64::emit_relocs_scan): New method.
(Target_x86_64::Relocatable_size_for_reloc): Remove.
(Target_x86_64::gc_process_relocs): Use Default_classify_reloc.
(Target_x86_64::scan_relocs): Likewise.
(Target_x86_64::relocate_section): Likewise.
(Target_x86_64::Relocatable_size_for_reloc::get_size_for_reloc):
Remove.
(Target_x86_64::scan_relocatable_relocs): Use Default_classify_reloc.
(Target_x86_64::relocate_relocs): Use Default_classify_reloc.
* testsuite/testfile.cc (Target_test::emit_relocs_scan): New method.
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gold/
* target.h (Target::calls_non_split): Add prelocs, reloc_count
parameters.
(Target::do_calls_non_split): Likewise.
* target.cc (Target::do_calls_non_split): Likewise.
* reloc.cc (Sized_relobj_file::split_stack_adjust_reltype): Adjust
call to Target::calls_non_split.
* i386.cc (Target_i386::do_calls_non_split): Add prelocs, reloc_count
parameters.
* powerpc.cc (Target_powerpc::do_calls_non_split): Likewise.
* x86_64.cc (Target_x86_64::do_calls_non_split): Likewise.
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Some linker code editing needs to change multiple insns. In some
cases multiple relocations are involved and it is not sufficient to
make the changes independently as relocations are processed, because
doing so might lead to a partial edit. So in order to safely edit we
need all the relocations available in relocate(). Also, to emit
edited relocs corresponding to the edited code sequence we need some
way to pass information from relocate() to relocate_relocs(),
particularly if the edit depends on insns. We can't modify input
relocs in relocate() as they are mmapped PROT_READ, nor it is
particularly clean to write relocs to the output at that stage. So
add a Relocatable_relocs* field to relinfo to mark edited relocs.
Given that relocate is passed the raw reloc pointer, it makes sense to
remove the rel/rela parameter and r_type too. However, that means the
mips relocate() needs to know whether SHT_REL or SHT_RELA relocs are
being processed. So add a rel_type for mips, which also has the
benefit of removing relocate() overloading there.
This patch adds the infrastructure without making use of it.
Note that relinfo->rr will be NULL if not outputting relocations.
* object.h (struct Relocate_info): Add "rr".
* reloc.h (Relocatable_relocs::set_strategy): New accessor.
* reloc.cc (Sized_relobj_file::do_relocate_sections): Init
relinfo.rr for relocate_section and relocate_relocs.
* powerpc.cc (relocate): Add rel_type and preloc parameters.
Delete rela and r_type params, instead recalculate these from
preloc.
(relocate_relocs): Delete Relocatable_relocs* param, instead
use relinfo->rr.
* aarch64.cc: Likewise.
* arm.cc: Likewise.
* i386.cc: Likewise.
* mips.cc: Likewise.
* s390.cc: Likewise.
* sparc.cc: Likewise.
* target.h: Likewise.
* tilegx.cc: Likewise.
* x86_64.cc: Likewise.
* testsuite/testfile.cc: Likewise.
* target-reloc.h (relocate_section): Adjust to suit.
(apply_relocation, relocate_relocs): Likewise.
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2015-11-09 Cary Coutant <ccoutant@gmail.com>
Vladimir Radosavljevic <Vladimir.Radosavljevic@imgtec.com>
gold/
* copy-relocs.h (Copy_relocs::copy_reloc): Replace reloc parameter
with type, offset, addend.
(Copy_relocs::save): Likewise.
* copy-relocs.cc (Copy_relocs::copy_reloc): Likewise.
(Copy_relocs::save): Likewise.
* aarch64.cc (Target_aarch64::copy_reloc): Pass r_type, r_offset,
and r_addend to Copy_relocs::copy_reloc.
* arm.cc (Target_arm::copy_reloc): Likewise.
* i386.cc (Target_i386::copy_reloc): Likewise.
* mips.cc (Target_mips::copy_reloc): Likewise.
* powerpc.cc (Target_powerpc::copy_reloc): Likewise.
* s390.cc (Target_s390::copy_reloc): Likewise.
* sparc.cc (Target_sparc::copy_reloc): Likewise.
* tilegx.cc (Target_tilegx::copy_reloc): Likewise.
* x86_64.cc (Target_x86_64::copy_reloc): Likewise.
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The GOT entry size is target-dependent. This patch adds a got_entry_size
function to Sized_target class so that a target can provide a value
different from default.
PR gold/19184
* incremental.cc (Got_plt_view_info): Add got_entry_size.
(Local_got_offset_visitor::visit): Replace got_entry_size_
with info_.got_entry_size.
(Local_got_offset_visitor::got_entry_size_): Removed.
(Global_got_offset_visitor::visit): Replace got_entry_size_
with info_.got_entry_size.
(Global_got_offset_visitor::got_entry_size_): Removed.
(Output_section_incremental_inputs::write_got_plt): Initialize
view_info.got_entry_size.
* target.h (Sized_target::got_entry_size): New virtual function.
* x86_64.cc (Target_x86_64::got_entry_size): New function.
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gold/
* dynobj.cc (Dynobj::create_elf_hash_table): Create hash table with
target-specific entry size.
(Dynobj::sized_create_elf_hash_table): Add size template parameter.
* dynobj.h (Dynobj::sized_create_elf_hash_table): Likewise.
* layout.cc (Layout::create_dynamic_symtab): Set entsize to
hash_entry_size.
* target.h (Target::hash_entry_size): New method.
(Target::Target_info::hash_entry_size): New data member.
* aarch64.cc (Target_aarch64::aarch64_info): Add hash_entry_size.
* arm.cc (Target_arm::arm_info): Likewise.
(Target_arm_nacl::arm_nacl_info): Likewise.
* i386.cc (Target_i386::i386_info): Likewise.
(Target_i386_nacl::i386_nacl_info): Likewise.
(Target_iamcu::iamcu_info): Likewise.
* mips.cc (Target_mips::mips_info): Likewise.
(Target_mips_nacl::mips_nacl_info): Likewise.
* powerpc.cc (Target_powerpc::powerpc_info): Likewise.
* sparc.cc (Target_sparc::sparc_info): Likewise.
* tilegx.cc (Target_tilegx::tilegx_info): Likewise.
* x86_64.cc (Target_x86_64::x86_64_info): Likewise.
(Target_x86_64_nacl::x86_64_nacl_info): Likewise.
* testsuite/testfile.cc (Target_test::test_target_info): Likewise.
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This patch updates gold to treat the R_X86_64_GOTPCRELX and
R_X86_64_REX_GOTPCRELX relocations proposed in
https://groups.google.com/forum/#!topic/x86-64-abi/n9AWHogmVY0
the same as R_X86_64_GOTPCREL. FIXME: Gold should perform the
transformations as suggested.
elfcpp/
* x86_64.h (R_X86_64_GOTPCRELX): New.
(R_X86_64_REX_GOTPCRELX): Likewise.
gold/
* x86_64.cc (Target_x86_64<size>::Scan::get_reference_flags):
Treat R_X86_64_GOTPCRELX and R_X86_64_REX_GOTPCRELX the same
as R_X86_64_GOTPCREL.
(Target_x86_64<size>::Scan::local): Likewise.
(Target_x86_64<size>::Scan::possible_function_pointer_reloc):
Likewise.
(Target_x86_64<size>::Scan::global): Likewise.
(Target_x86_64<size>::Relocate::relocate): Likewise.
(Target_x86_64<size>::Relocatable_size_for_reloc::get_size_for_reloc):
Likewise.
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2015-04-06 Ilya Tocar <ilya.tocar@intel.com>
PR gold/17641
* x86_64.cc (Target_x86_64::can_convert_mov_to_lea): New.
(Target_x86_64::Scan::local): Don't create GOT entry, when we
can convert mov to lea.
(Target_x86_64::Scan::global): Ditto.
(Target_x86_64::Relocate::relocate): Convert mov foo@GOTPCREL(%rip),
%reg to lea foo(%rip), %reg if possible.
* testsuite/Makefile.am (x86_64_mov_to_lea): New test.
* testsuite/x86_64_mov_to_lea1.s: New.
* testsuite/x86_64_mov_to_lea2.s: Ditto.
* testsuite/x86_64_mov_to_lea3.s: Ditto.
* testsuite/x86_64_mov_to_lea4.s: Ditto.
* testsuite/x86_64_mov_to_lea.sh: Ditto.
---
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We need to check that the output is executable before assuming that we
can replace the reference with zero.
2015-02-02 Cary Coutant <ccoutant@google.com>
gold/
* x86_64.cc (Target_x86_64::Relocate::relocate_tls): Check for
executable output file.
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When --warn-unresolved-symbols is used, gold tries to create a dynamic relocation
for it, and gives an internal error if the TLS segment has not already been
created. This patch allows the IE-to-LE optimization for an undefined symbol
when building an executable, which suppresses the dynamic relocation, and
relaxes the requirement to have a TLS segment when applying a relocation for
an undefined symbol.
2015-01-28 Cary Coutant <ccoutant@google.com>
gold/
* x86_64.cc (Target_x86_64::Scan::global): Allow IE-to-LE optimization
for undef TLS symbols.
(Target_x86_64::Relocate::relocate_tls): Likewise.
(Target_x86_64::Relocate::tls_ie_to_le): Likewise.
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X32 uses cmp %fs:NN,%esp, lea NN(%rsp),%r10d, lea NN(%rsp),%r11d,
instead of cmp %fs:NN,%rsp, lea NN(%rsp),%r10, lea NN(%rsp),%r11.
This patch handles it.
PR gold/17729
* configure.ac (DEFAULT_TARGET_X86_64): Don't set for x32.
(DEFAULT_TARGET_X32): Set for x32.
* x86_64.cc (cmp_insn_32): New.
(lea_r10_insn_32): Likewise.
(lea_r11_insn_32): Likewise.
(cmp_insn_64): Likewise.
(lea_r10_insn_64): Likewise.
(lea_r11_insn_64): Likewise.
(Target_x86_64<size>::do_calls_non_split): Handle x32.
* testsuite/Makefile.am (check_SCRIPTS): Add split_x32.sh.
(check_DATA): Add split_x32 files.
(split_x32_[1234n].o): New targets.
(split_x32_[124]): New targets.
(split_x32_[1234r].stdout): New targets.
* testsuite/split_x32.sh: New file.
* testsuite/split_x32_1.s: Likewise.
* testsuite/split_x32_2.s: Likewise.
* testsuite/split_x32_3.s: Likewise.
* testsuite/split_x32_4.s: Likewise.
* testsuite/split_x32_n.s: Likewise.
* configure: Regenerated.
* testsuite/Makefile.in: Likewise.
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PR gold/17809
* x86_64.cc (Target_x86_64<size>::Relocate::tls_ie_to_le): Handle
x32.
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PR gold/17619
* x86_64.cc (Output_data_plt_x86_64_standard<size>::do_fill_plt_entry):
Check PC-relative offset overflow in PLT entry.
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* x86_64.cc (Target_x86_64<size>::Scan::global): Don't make PLT
entry for R_X86_64_GOTPLT64.
(Target_x86_64<size>::Relocate::relocate): Update comments for
R_X86_64_GOTPLT64.
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This patch fixes 2 issues:
1. Since the GOT offset is always negative, we need to use signed int
to support 64-bit GOT relocations.
2. R_X86_64_PLTOFF64 uses the address of GLOBAL_OFFSET_TABLE, which is
the address of the .got.plt section, not the .got section.
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to access a global as it expects a GOTPCREL relocation. This is really not
necessary as the linker could use a copy relocation to get around it. This
patch enables copy relocations with pie.
Context:
This is useful because currently the GCC compiler with option -fpie makes
every extern global access go through the GOT. That is because the compiler
cannot tell if a global will end up being defined in the executable or not
and is conservative. This ends up hurting performance when the binary is linked
as mostly static where most of the globals do end up being defined in the
executable. By allowing copy relocs with fPIE, the compiler need not generate
a GOTPCREL(GOT access) for any global access. It can safely assume that all
globals will be defined in the executable and generate a PC-relative access
instead. Gold can then create a copy reloc for only the undefined globals.
gold/
* symtab.h (may_need_copy_reloc): Remove check for position independent
code.
* x86_64.cc (Target_x86_64<size>::Scan::global): Add check for no
position independence before pc absolute may_need_copy_reloc call.
Add check for executable output befor pc relative may_need_copy_reloc
call.
* i386.cc: Ditto.
* arm.cc: Ditto.
* sparc.cc: Ditto.
* tilegx.cc: Ditto.
* powerpc.cc: Add check for no position independence before
may_need_copy_reloc calls.
* testsuite/pie_copyrelocs_test.cc: New file.
* testsuite/pie_copyrelocs_shared_test.cc: New file.
* Makefile.am (pie_copyrelocs_test): New test.
* Makefile.in: Regenerate.
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is no PLT.
gold/
PR gold/16900
* i386.cc (Output_data_got_plt_i386): New class.
(Output_data_plt_i386::Output_data_plt_i386): Change type of got_plt
parameter. Change all callers.
(Output_data_plt_i386::layout_): Remove.
(Output_data_plt_i386::got_plt_): Change type.
(Target_i386::got_plt_): Change type. Change all references.
(Target_i386::got_section): Create instance of new class.
(Output_data_got_plt_i386::do_write): New function.
* x86_64.cc (Output_data_got_plt_x86_64): New class.
(Output_data_plt_x86_64::Output_data_plt_x86_64): Change type of got_plt
parameter. Change all callers.
(Output_data_plt_x86_64::layout_): Remove.
(Output_data_plt_x86_64::got_plt_): Change type.
(Target_x86_64::got_plt_): Change type. Change all references.
(Target_x86_64::got_section): Create instance of new class.
(Output_data_got_plt_x86_64::do_write): New function.
(Output_data_plt_x86_64::do_write): Don't write reserved words in GOT.
(Target_x86_64<size>::init_got_plt_for_update): Create instance of new
class.
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gold/
* x86_64.cc (Target_x86_64::Relocate::relocate): Add missing break.
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elfcpp/
* x86_64.h (R_X86_64_PC32_BND): New.
(R_X86_64_PLT32_BND): Likewise.
gold/
* x86_64.cc (Target_x86_64<size>::Scan::get_reference_flags):
Handle R_X86_64_PC32_BND and R_X86_64_PLT32_BND just like
R_X86_64_PC32 and R_X86_64_PLT32, respectively.
(Target_x86_64<size>::Scan::local): Likewise.
(Target_x86_64<size>::Scan::global): Likewise.
(Target_x86_64<size>::Relocate::relocate): Likewise.
(Target_x86_64<size>::Relocatable_size_for_reloc::get_size_for_reloc):
Likewise.
(Target_x86_64<size>::Scan::check_non_pic(): Handle
R_X86_64_PC32_BND.
* testsuite/Makefile.am (check_PROGRAMS): Add
exception_x86_64_bnd_test.
(exception_x86_64_bnd_test_SOURCES): New macro.
(exception_x86_64_bnd_test_DEPENDENCIES): Likewise.
(exception_x86_64_bnd_test_LDFLAGS): Likewise.
(exception_x86_64_bnd_test_LDADD): Likewise.
(exception_x86_64_bnd_1.o): New rule.
(exception_x86_64_bnd_2.o): Likewise.
* testsuite/Makefile.in: Regenerated.
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generates.
gold/
* x86_64.cc (Output_data_plt_x86_64_nacl::first_plt_entry):
Correct 9-byte nop sequence to match what the assembler generates.
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