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2024-01-04Update year range in copyright notice of binutils filesAlan Modra1-1/+1
Adds two new external authors to etc/update-copyright.py to cover bfd/ax_tls.m4, and adds gprofng to dirs handled automatically, then updates copyright messages as follows: 1) Update cgen/utils.scm emitted copyrights. 2) Run "etc/update-copyright.py --this-year" with an extra external author I haven't committed, 'Kalray SA.', to cover gas testsuite files (which should have their copyright message removed). 3) Build with --enable-maintainer-mode --enable-cgen-maint=yes. 4) Check out */po/*.pot which we don't update frequently.
2023-06-23[GOLD] Support setting DT_RELACOUNT lateAlan Modra1-1/+1
PowerPC gold adds relative dynamic relocs in do_relax. These aren't accounted for in the value set in add_target_dynamic_tags, which is called before do_relax. Provide a way of setting DT_RELCOUNT and DT_RELACOUNT at the point where .dynamic is written. * layout.cc (Layout::add_target_dynamic_tags): Add custom_relcount parameter. Emit DT_RELCOUNT/RELACOUNT as a custom target handled dynamic tag if set. * layout.h(Layout::add_target_dynamic_tags): Update prototype. * aarch64.cc (Target_aarch64::do_finalize_sections): Adjust add_target_dynamic_tags call. * arm.cc (Target_arm::do_finalize_sections): Likewise. * i386.cc (Target_i386::do_finalize_sections): Likewise. * mips.cc (Target_mips::do_finalize_sections): Likewise. * s390.cc (Target_s390::do_finalize_sections): Likewise. * sparc.cc (Target_sparc::do_finalize_sections): Likewise. * tilegx.cc (Target_tilegx::do_finalize_sections): Likewise. * x86_64.cc (Target_x86_64::do_finalize_sections): Likewise. * powerpc.cc (Target_powerpc::do_finalize_sections): Likewise. (Target_powerpc::do_dynamic_tag_custom_value): New function.
2023-01-01Update year range in copyright notice of binutils filesAlan Modra1-1/+1
The newer update-copyright.py fixes file encoding too, removing cr/lf on binutils/bfdtest2.c and ld/testsuite/ld-cygwin/exe-export.exp, and embedded cr in binutils/testsuite/binutils-all/ar.exp string match.
2022-01-02Update year range in copyright notice of binutils filesAlan Modra1-1/+1
The result of running etc/update-copyright.py --this-year, fixing all the files whose mode is changed by the script, plus a build with --enable-maintainer-mode --enable-cgen-maint=yes, then checking out */po/*.pot which we don't update frequently. The copy of cgen was with commit d1dd5fcc38ead reverted as that commit breaks building of bfp opcodes files.
2021-01-01Update year range in copyright notice of binutils filesAlan Modra1-1/+1
2020-01-01Update year range in copyright notice of binutils filesAlan Modra1-1/+1
2019-01-01Update year range in copyright notice of binutils filesAlan Modra1-1/+1
2018-04-06Further improve warnings for relocations referring to discarded sections.Cary Coutant1-9/+7
Relocations referring to discarded sections are now treated as errors instead of warnings. Also with this patch, we will now print the section group signature and the object file with the prevailing definition of that group along with the name of the symbol that the relocation is referring to. This additional information should be much more useful to anyone trying to track down the source of such errors. To do so, we now map each discarded section to the Kept_section info in the Layout class, and defer the logic that maps a discarded section to its counterpart in the kept group. This gives us the information we need to identify the signature symbol given the discarded section, and the name of the object file that provided the prevailing (i.e., first) definition of that group. gold/ * object.cc (Sized_relobj_file::include_section_group): Store reference to Kept_section info for discarded comdat sections regardless of size. Move size checking to map_to_kept_section. (Sized_relobj_file::include_linkonce_section): Likewise. (Sized_relobj_file::map_to_kept_section): Add section name parameter. Insert size checking logic from above functions. (Sized_relobj_file::find_kept_section_object): New method. (Sized_relobj_file::get_symbol_name): New method. * object.h (Sized_relobj_file::map_to_kept_section): Add section_name parameter. Adjust all callers. (Sized_relobj_file::find_kept_section_object): New method. (Sized_relobj_file::get_symbol_name): New method. (Sized_relobj_file::Kept_comdat_section): Replace object and shndx fields with sh_size, kept_section, symndx, and is_comdat fields. (Sized_relobj_file::set_kept_comdat_section): Replace kept_object and kept_shndx parameters with is_comdat, symndx, sh_size, and kept_section. (Sized_relobj_file::get_kept_comdat_section): Likewise. * target-reloc.h (enum Comdat_behavior): Change CB_WARNING to CB_ERROR. Adjust all references. (issue_undefined_symbol_error): New function template. (relocate_section): Pass section name to map_to_kept_section. Move discarded section code to new function above. * aarch64.cc (Target_aarch64::scan_reloc_section_for_stubs): Move declaration for gsym out one level. Call issue_discarded_error. * arm.cc (Target_arm::scan_reloc_section_for_stubs): Likewise. * powerpc.cc (Relocate_comdat_behavior): Change CB_WARNING to CB_ERROR.
2018-04-02Fix problem where mixed section types can cause internal error during a -r link.Cary Coutant1-0/+2
During a -r (or --emit-relocs) link, if two sections had the same name but different section types, gold would put relocations for both sections into the same relocation section even though the data sections remained separate. For .eh_frame sections, when one section is PROGBITS and another is X86_64_UNWIND, we really should be using the UNWIND section type and combining the sections anyway. For other sections, we should be creating one relocation section for each output data section. gold/ PR gold/23016 * incremental.cc (can_incremental_update): Check for unwind section type. * layout.h (Layout::layout): Add sh_type parameter. * layout.cc (Layout::layout): Likewise. (Layout::layout_reloc): Create new output reloc section if data section does not already have one. (Layout::layout_eh_frame): Check for unwind section type. (Layout::make_eh_frame_section): Use unwind section type for .eh_frame and .eh_frame_hdr. * object.h (Sized_relobj_file::Shdr_write): New typedef. (Sized_relobj_file::layout_section): Add sh_type parameter. (Sized_relobj_file::Deferred_layout::Deferred_layout): Add sh_type parameter. * object.cc (Sized_relobj_file::check_eh_frame_flags): Check for unwind section type. (Sized_relobj_file::layout_section): Add sh_type parameter; pass it to Layout::layout. (Sized_relobj_file::do_layout): Make local copy of sh_type. Force .eh_frame sections to unwind section type. Pass sh_type to layout_section. (Sized_relobj_file<size, big_endian>::do_layout_deferred_sections): Pass sh_type to layout_section. * output.cc (Output_section::Output_section): Initialize reloc_section_. * output.h (Output_section::reloc_section): New method. (Output_section::set_reloc_section): New method. (Output_section::reloc_section_): New data member. * target.h (Target::unwind_section_type): New method. (Target::Target_info::unwind_section_type): New data member. * aarch64.cc (aarch64_info): Add unwind_section_type. * arm.cc (arm_info, arm_nacl_info): Likewise. * i386.cc (i386_info, i386_nacl_info, iamcu_info): Likewise. * mips.cc (mips_info, mips_nacl_info): Likewise. * powerpc.cc (powerpc_info): Likewise. * s390.cc (s390_info): Likewise. * sparc.cc (sparc_info): Likewise. * tilegx.cc (tilegx_info): Likewise. * x86_64.cc (x86_64_info, x86_64_nacl_info): Likewise. * testsuite/Makefile.am (pr23016_1, pr23016_2): New test cases. * testsuite/Makefile.in: Regenerate. * testsuite/testfile.cc: Add unwind_section_type. * testsuite/pr23016_1.sh: New test script. * testsuite/pr23016_1a.s: New source file. * testsuite/pr23016_1b.s: New source file. * testsuite/pr23016_2.sh: New test script. * testsuite/pr23016_2a.s: New source file. * testsuite/pr23016_2b.s: New source file.
2018-01-03Update year range in copyright notice of binutils filesAlan Modra1-1/+1
2017-10-19Implement BE8 support for ARM.Umesh Kalappa1-7/+26
gold/ * arm.cc (Stub::do_fixed_endian_write):Far call stubs support for arm in the be8 mode. * testsuite/Makefile.am: New test cases. * testsuite/Makefile.in: Regenerate. * testsuite/arm_farcall_arm_arm_be8.sh: New script for arm to arm far call stubs. * testsuite/arm_farcall_thumb_thumb_be8.sh: New script for thumb to thumb far call stubs.
2017-07-18Fix spelling typos.Yuri Chornovian1-4/+4
2017-01-10Refactor Sized_relobj_file::do_relocate_sections.Cary Coutant1-3/+3
gold/ * aarch64.cc (AArch64_relobj::do_relocate_sections): Call Sized_relobj_file::relocate_section_range(). * arm.cc (Arm_relobj::do_relocate_sections): Likewise. * object.h (Sized_relobj_file::relocate_section_range): New method. * reloc.cc (Sized_relobj_file::do_relocate_sections): Move implementation... (Sized_relobj_file::relocate_section_range): ...to new method.
2017-01-02Update year range in copyright notice of all files.Alan Modra1-1/+1
2016-12-21Remove high bit set charactersAlan Modra1-4/+4
gas/ * doc/c-lm32.texi: Fix chars with high bit set. * testsuite/gas/bfin/vector2.s: Likewise. gold/ * arm.cc: Fix comment chars with high bit set. include/ * coff/pe.h: Fix comment chars with high bit set. * opcode/xgate.h: Likewise. ld/ * testsuite/ld-scripts/sysroot-prefix.exp: Fix chars with high bit set.
2016-12-19Fix an internal error in the constructor of Target_arm.Igor Kudrin1-26/+25
gold/ * arm.cc (Target_arm::Target_arm): Move initialization code ... (Target_arm::do_select_as_default_target): ... to here. * testsuite/Makefile.am (arm_target_lazy_init): New test case. * testsuite/Makefile.in: Regenerate. * testsuite/arm_target_lazy_init.s: New source file. * testsuite/arm_target_lazy_init.t: New linker script.
2016-12-01Fix internal error when relaxing branches to STT_SECTION symbols.Cary Coutant1-0/+2
gold/ PR gold/20807 * aarch64.cc (Target_aarch64::scan_reloc_section_for_stubs): Handle section symbols correctly. * arm.cc (Target_arm): Likewise. * powerpc.cc (Target_powerpc): Likewise.
2016-11-27Fix spelling in comments in C source files (gold)Ambrogino Modigliani1-1/+1
* aarch64.cc: Fix spelling in comments. * arm.cc: Fix spelling in comments. * icf.cc: Fix spelling in comments. * layout.cc: Fix spelling in comments. * layout.h: Fix spelling in comments. * mips.cc: Fix spelling in comments. * output.h: Fix spelling in comments. * plugin.h: Fix spelling in comments. * script-sections.h: Fix spelling in comments. * script.h: Fix spelling in comments. * stringpool.h: Fix spelling in comments. * tilegx.cc: Fix spelling in comments.
2016-10-06[GOLD] -Wimplicit-fallthrough warning fixesAlan Modra1-1/+1
* aarch64.cc: Spell fall through comments as "// Fall through.". * arm.cc: Likewise. * mips.cc: Likewise. * powerpc.cc: Likewise. * s390.cc: Likewise. * sparc.cc: Likewise. * x86_64.cc: Likewise. * powerpc.cc (Target_powerpc::Relocate::relocate): Add missing fall through comments. * sparc.cc: (Target_sparc::Scan::global): Likewise. (Target_sparc::Relocate::relocate): Likewise. * tilegx.cc (Target_tilegx::Relocate::relocate): Likewise. * resolve.cc (symbol_to_bits): Add missing break.
2016-09-02Handle ARM-specific --target1-abs, --target1-rel and --target2 optionsDoug Kwan1-13/+46
2016-08-23Add --be8 option to gold.Bharathi Seshadri1-9/+122
gold/ * options.h (General_options): Add --be8 option. * arm.cc (Arm_relobj::do_relocate_sections): Add code to swap for be8. (Output_data_plt_arm_standard::do_fill_first_plt_entry): Likewise. (Output_data_plt_arm_short::do_fill_plt_entry): Likewise. (Output_data_plt_arm_long::do_fill_plt_entry): Likewise. (Target_arm::do_adjust_elf_header): Do EF_ARM_BE8 adjustment.
2016-03-08Add unused attribute where necessary to quiet GCC 6 warnings.Cary Coutant1-1/+1
gold/ PR 19751 * arm.cc (Reloc_stub::Key::name): Add unused attribute. * dirsearch.cc (Dir_caches::~Dir_caches): Likewise.
2016-01-12Fix breakage for SHT_REL targets where get_r_addend() gives internal error.Cary Coutant1-0/+8
gold/ * arm.cc (Target_arm::Classify_reloc::get_r_addend): New method. * i386.cc (Target_i386::Classify_reloc::get_r_addend): New method. * mips.cc (Target_arm::Mips_classify_reloc::get_r_addend): (Both specializations) New method.
2016-01-11Refactor gold to enable support for MIPS-64 relocation format.Cary Coutant1-20/+73
For MIPS-64, the r_info field in the relocation format is replaced by several individual fields, including r_sym and r_type. To enable support for this format, I've refactored target-independent code to remove almost all uses of the r_info field. (I've left alone a couple of routines used only for incremental linking, which I can update if/when the MIPS target adds support for incremental linking.) For routines that are already templated on a Classify_reloc class (namely, gc_process_relocs, relocate_section, and relocate_relocs), I've extended the Classify_reloc interface to include sh_type (which no longer needs to be a separate template parameter) as well as get_r_sym() and get_r_type() methods for extracting the r_sym and r_type fields. For scan_relocatable_relocs, I've extended the Default_scan_relocatable_relocs class by converting it to a class template with Classify_reloc as a template parameter. For the remaining routines that need to access r_sym, I've added a virtual Target::get_r_sym() method with an override for the MIPS target. In elfcpp, I've added Mips64_rel, etc., accessor classes and corresponding internal data structures. The MIPS target uses these new classes within its own Mips_classify_reloc class. The Mips64_ accessor classes also expose the r_ssym, r_type2, and r_type3 fields from the relocation. These changes should be functionally the same for all but the MIPS target. elfcpp/ * elfcpp.h (Mips64_rel, Mips64_rel_write): New classes. (Mips64_rela, Mips64_rela_write): New classes. * elfcpp_internal.h (Mips64_rel_data, Mips64_rela_data): New structs. gold/ * gc.h (get_embedded_addend_size): Remove sh_type parameter. (gc_process_relocs): Remove sh_type template parameter. Use Classify_reloc to access r_sym, r_type, and r_addend fields. * object.h (Sized_relobj_file::split_stack_adjust): Add target parameter. (Sized_relobj_file::split_stack_adjust_reltype): Likewise. * reloc-types.h (Reloc_types::copy_reloc_addend): (SHT_REL and SHT_RELA specializations) Remove. * reloc.cc (Emit_relocs_strategy): Rename and move to target-reloc.h. (Sized_relobj_file::emit_relocs_scan): Call Target::emit_relocs_scan(). (Sized_relobj_file::emit_relocs_scan_reltype): Remove. (Sized_relobj_file::split_stack_adjust): Add target parameter. Adjust all callers. (Sized_relobj_file::split_stack_adjust_reltype): Likewise. Call Target::get_r_sym() to get r_sym field from relocations. (Track_relocs::next_symndx): Call Target::get_r_sym(). * target-reloc.h (scan_relocs): Remove sh_type template parameter; add Classify_reloc template parameter. Use for accessing r_sym and r_type. (relocate_section): Likewise. (Default_classify_reloc): New class (renamed and moved from reloc.cc). (Default_scan_relocatable_relocs): Remove sh_type template parameter. (Default_scan_relocatable_relocs::Reltype): New typedef. (Default_scan_relocatable_relocs::reloc_size): New const. (Default_scan_relocatable_relocs::sh_type): New const. (Default_scan_relocatable_relocs::get_r_sym): New method. (Default_scan_relocatable_relocs::get_r_type): New method. (Default_emit_relocs_strategy): New class. (scan_relocatable_relocs): Replace sh_type template parameter with Scan_relocatable_relocs class. Use it to access r_sym and r_type fields. (relocate_relocs): Replace sh_type template parameter with Classify_reloc class. Use it to access r_sym and r_type fields. * target.h (Target::is_call_to_non_split): Replace r_type parameter with pointer to relocation. Adjust all callers. (Target::do_is_call_to_non_split): Likewise. (Target::emit_relocs_scan): New virtual method. (Sized_target::get_r_sym): New virtual method. * target.cc (Target::do_is_call_to_non_split): Replace r_type parameter with pointer to relocation. * aarch64.cc (Target_aarch64::emit_relocs_scan): New method. (Target_aarch64::Relocatable_size_for_reloc): Remove. (Target_aarch64::gc_process_relocs): Use Default_classify_reloc. (Target_aarch64::scan_relocs): Likewise. (Target_aarch64::relocate_section): Likewise. (Target_aarch64::Relocatable_size_for_reloc::get_size_for_reloc): Remove. (Target_aarch64::scan_relocatable_relocs): Use Default_classify_reloc. (Target_aarch64::relocate_relocs): Use Default_classify_reloc. * arm.cc (Target_arm::Arm_scan_relocatable_relocs): Remove sh_type template parameter. (Target_arm::emit_relocs_scan): New method. (Target_arm::Relocatable_size_for_reloc): Replace with... (Target_arm::Classify_reloc): ...this. (Target_arm::gc_process_relocs): Use Classify_reloc. (Target_arm::scan_relocs): Likewise. (Target_arm::relocate_section): Likewise. (Target_arm::scan_relocatable_relocs): Likewise. (Target_arm::relocate_relocs): Likewise. * i386.cc (Target_i386::emit_relocs_scan): New method. (Target_i386::Relocatable_size_for_reloc): Replace with... (Target_i386::Classify_reloc): ...this. (Target_i386::gc_process_relocs): Use Classify_reloc. (Target_i386::scan_relocs): Likewise. (Target_i386::relocate_section): Likewise. (Target_i386::scan_relocatable_relocs): Likewise. (Target_i386::relocate_relocs): Likewise. * mips.cc (Mips_scan_relocatable_relocs): Remove sh_type template parameter. (Mips_reloc_types): New class template. (Mips_classify_reloc): New class template. (Target_mips::Reltype): New typedef. (Target_mips::Relatype): New typedef. (Target_mips::emit_relocs_scan): New method. (Target_mips::get_r_sym): New method. (Target_mips::Relocatable_size_for_reloc): Replace with Mips_classify_reloc. (Target_mips::copy_reloc): Use Mips_classify_reloc. (Target_mips::gc_process_relocs): Likewise. (Target_mips::scan_relocs): Likewise. (Target_mips::relocate_section): Likewise. (Target_mips::scan_relocatable_relocs): Likewise. (Target_mips::relocate_relocs): Likewise. (mips_get_size_for_reloc): New function, factored out from Relocatable_size_for_reloc::get_size_for_reloc. (Target_mips::Scan::local): Use Mips_classify_reloc. (Target_mips::Scan::global): Likewise. (Target_mips::Relocate::relocate): Likewise. * powerpc.cc (Target_powerpc::emit_relocs_scan): New method. (Target_powerpc::Relocatable_size_for_reloc): Remove. (Target_powerpc::gc_process_relocs): Use Default_classify_reloc. (Target_powerpc::scan_relocs): Likewise. (Target_powerpc::relocate_section): Likewise. (Powerpc_scan_relocatable_reloc): Convert to class template. (Powerpc_scan_relocatable_reloc::Reltype): New typedef. (Powerpc_scan_relocatable_reloc::reloc_size): New const. (Powerpc_scan_relocatable_reloc::sh_type): New const. (Powerpc_scan_relocatable_reloc::get_r_sym): New method. (Powerpc_scan_relocatable_reloc::get_r_type): New method. (Target_powerpc::scan_relocatable_relocs): Use Powerpc_scan_relocatable_reloc. (Target_powerpc::relocate_relocs): Use Default_classify_reloc. * s390.cc (Target_s390::emit_relocs_scan): New method. (Target_s390::Relocatable_size_for_reloc): Remove. (Target_s390::gc_process_relocs): Use Default_classify_reloc. (Target_s390::scan_relocs): Likewise. (Target_s390::relocate_section): Likewise. (Target_s390::Relocatable_size_for_reloc::get_size_for_reloc): Remove. (Target_s390::scan_relocatable_relocs): Use Default_classify_reloc. (Target_s390::relocate_relocs): Use Default_classify_reloc. * sparc.cc (Target_sparc::emit_relocs_scan): New method. (Target_sparc::Relocatable_size_for_reloc): Remove. (Target_sparc::gc_process_relocs): Use Default_classify_reloc. (Target_sparc::scan_relocs): Likewise. (Target_sparc::relocate_section): Likewise. (Target_sparc::Relocatable_size_for_reloc::get_size_for_reloc): Remove. (Target_sparc::scan_relocatable_relocs): Use Default_classify_reloc. (Target_sparc::relocate_relocs): Use Default_classify_reloc. * tilegx.cc (Target_tilegx::emit_relocs_scan): New method. (Target_tilegx::Relocatable_size_for_reloc): Remove. (Target_tilegx::gc_process_relocs): Use Default_classify_reloc. (Target_tilegx::scan_relocs): Likewise. (Target_tilegx::relocate_section): Likewise. (Target_tilegx::Relocatable_size_for_reloc::get_size_for_reloc): Remove. (Target_tilegx::scan_relocatable_relocs): Use Default_classify_reloc. (Target_tilegx::relocate_relocs): Use Default_classify_reloc. * x86_64.cc (Target_x86_64::emit_relocs_scan): New method. (Target_x86_64::Relocatable_size_for_reloc): Remove. (Target_x86_64::gc_process_relocs): Use Default_classify_reloc. (Target_x86_64::scan_relocs): Likewise. (Target_x86_64::relocate_section): Likewise. (Target_x86_64::Relocatable_size_for_reloc::get_size_for_reloc): Remove. (Target_x86_64::scan_relocatable_relocs): Use Default_classify_reloc. (Target_x86_64::relocate_relocs): Use Default_classify_reloc. * testsuite/testfile.cc (Target_test::emit_relocs_scan): New method.
2016-01-01Copyright update for binutilsAlan Modra1-1/+1
2015-12-17Implement --long-plt flag (ARM only).Peter Collingbourne1-21/+106
gold/ PR gold/18780 * arm.cc (Target_arm::do_make_data_plt): Choose PLT generator based on value of --long-plt flag. (Output_data_plt_arm_standard::do_get_plt_entry_size): Moved to Output_data_plt_arm_short. (Output_data_plt_arm_standard::do_fill_plt_entry): Likewise. (Output_data_plt_arm_standard::plt_entry): Likewise. (Output_data_plt_arm_standard::do_fill_first_plt_entry): Fix variable reference. (Output_data_plt_arm_short): New class. (Output_data_plt_arm_short::do_fill_plt_entry): Error out on too large PLT offsets instead of asserting. (Output_data_plt_arm_long): New class. * options.h (General_options): Define --long-plt flag.
2015-12-09[GOLD] Relocate::relocate() paramsAlan Modra1-15/+10
Some linker code editing needs to change multiple insns. In some cases multiple relocations are involved and it is not sufficient to make the changes independently as relocations are processed, because doing so might lead to a partial edit. So in order to safely edit we need all the relocations available in relocate(). Also, to emit edited relocs corresponding to the edited code sequence we need some way to pass information from relocate() to relocate_relocs(), particularly if the edit depends on insns. We can't modify input relocs in relocate() as they are mmapped PROT_READ, nor it is particularly clean to write relocs to the output at that stage. So add a Relocatable_relocs* field to relinfo to mark edited relocs. Given that relocate is passed the raw reloc pointer, it makes sense to remove the rel/rela parameter and r_type too. However, that means the mips relocate() needs to know whether SHT_REL or SHT_RELA relocs are being processed. So add a rel_type for mips, which also has the benefit of removing relocate() overloading there. This patch adds the infrastructure without making use of it. Note that relinfo->rr will be NULL if not outputting relocations. * object.h (struct Relocate_info): Add "rr". * reloc.h (Relocatable_relocs::set_strategy): New accessor. * reloc.cc (Sized_relobj_file::do_relocate_sections): Init relinfo.rr for relocate_section and relocate_relocs. * powerpc.cc (relocate): Add rel_type and preloc parameters. Delete rela and r_type params, instead recalculate these from preloc. (relocate_relocs): Delete Relocatable_relocs* param, instead use relinfo->rr. * aarch64.cc: Likewise. * arm.cc: Likewise. * i386.cc: Likewise. * mips.cc: Likewise. * s390.cc: Likewise. * sparc.cc: Likewise. * target.h: Likewise. * tilegx.cc: Likewise. * x86_64.cc: Likewise. * testsuite/testfile.cc: Likewise. * target-reloc.h (relocate_section): Adjust to suit. (apply_relocation, relocate_relocs): Likewise.
2015-11-09Remove unnecessary target dependencies on relocation format.Cary Coutant1-1/+3
2015-11-09 Cary Coutant <ccoutant@gmail.com> Vladimir Radosavljevic <Vladimir.Radosavljevic@imgtec.com> gold/ * copy-relocs.h (Copy_relocs::copy_reloc): Replace reloc parameter with type, offset, addend. (Copy_relocs::save): Likewise. * copy-relocs.cc (Copy_relocs::copy_reloc): Likewise. (Copy_relocs::save): Likewise. * aarch64.cc (Target_aarch64::copy_reloc): Pass r_type, r_offset, and r_addend to Copy_relocs::copy_reloc. * arm.cc (Target_arm::copy_reloc): Likewise. * i386.cc (Target_i386::copy_reloc): Likewise. * mips.cc (Target_mips::copy_reloc): Likewise. * powerpc.cc (Target_powerpc::copy_reloc): Likewise. * s390.cc (Target_s390::copy_reloc): Likewise. * sparc.cc (Target_sparc::copy_reloc): Likewise. * tilegx.cc (Target_tilegx::copy_reloc): Likewise. * x86_64.cc (Target_x86_64::copy_reloc): Likewise.
2015-10-28Support 64-bit entry size in SHT_HASH (for s390).Marcin Kościelnicki1-2/+4
gold/ * dynobj.cc (Dynobj::create_elf_hash_table): Create hash table with target-specific entry size. (Dynobj::sized_create_elf_hash_table): Add size template parameter. * dynobj.h (Dynobj::sized_create_elf_hash_table): Likewise. * layout.cc (Layout::create_dynamic_symtab): Set entsize to hash_entry_size. * target.h (Target::hash_entry_size): New method. (Target::Target_info::hash_entry_size): New data member. * aarch64.cc (Target_aarch64::aarch64_info): Add hash_entry_size. * arm.cc (Target_arm::arm_info): Likewise. (Target_arm_nacl::arm_nacl_info): Likewise. * i386.cc (Target_i386::i386_info): Likewise. (Target_i386_nacl::i386_nacl_info): Likewise. (Target_iamcu::iamcu_info): Likewise. * mips.cc (Target_mips::mips_info): Likewise. (Target_mips_nacl::mips_nacl_info): Likewise. * powerpc.cc (Target_powerpc::powerpc_info): Likewise. * sparc.cc (Target_sparc::sparc_info): Likewise. * tilegx.cc (Target_tilegx::tilegx_info): Likewise. * x86_64.cc (Target_x86_64::x86_64_info): Likewise. (Target_x86_64_nacl::x86_64_nacl_info): Likewise. * testsuite/testfile.cc (Target_test::test_target_info): Likewise.
2015-07-232015-07-23 Ian Coolidge <icoolidge@google.com>Han Shen1-3/+4
Plumb --pic-veneer option for gold. gold/ChangeLog: * arm.cc (Reloc_stub::stub_type_for_reloc): Plumb to stub generation. * options.h (General_options): Add --pic-veneer option.
2015-07-20Properly set arm-specific elf flags wrt hardfp.Han Shen1-0/+1
gold/ChangeLog: * arm.cc (Target_arm::do_adjust_elf_header): Set flags into view.
2015-07-09Drop 'missing mapping symbols' warning for arm and aarch64.Han Shen1-9/+2
The psABI (AAELF) says this about mapping symbols: 4.6.5.1 Section-relative mapping symbols Mapping symbols defined in a section define a sequence of half-open address intervals that cover the address range of the section. Each interval starts at the address defined by the mapping symbol, and continues up to, but not including, the address defined by the next (in address order) mapping symbol or the end of the section. A section must have a mapping symbol defined at the beginning of the section; however, if the section contains only data then the mapping symbol may be omitted. That makes it pretty clear that, in the absence of a mapping symbol, the entire section can be treated as data. gold/ChangeLog: * aarch64.cc (AArch64_relobj::scan_errata): Drop missing symbol warning. * arm.cc (Arm_relobj::scan_section_for_cortex_a8_erratum): Drop missing symbol warning.
2015-04-07Add AArch32 support for arm gold linker.Han Shen1-1/+22
2015-02-11gold/arm.cc: Output mapping symbol for PLT codeWill Newton1-0/+7
Output an ARM state mapping symbol at the start of the PLT. With the current code objdump will fail to disassemble the PLT that gold creates. gold/ChangeLog: 2015-02-11 Will Newton <will.newton@linaro.org> PR gold/13321 * arm.cc (Target_arm::make_plt_section): Create an ARM state mapping symbol at the start of the PLT.
2015-01-29This patch adds IFUNC support for arm gold backend.Han Shen1-47/+546
This is a feature required in chromeos arm development work. Tested: 1) Built passed all-gold on x86_64 machine 2) Tested with basic gold aarch64 ifunc unittests - a) global ifunc, statically/non-statically linked b) local ifunc, statically/non-statically linked c) global/local, other shared library routine mixed, statically/non-statically linked d) arm/thumb mode ifunc e) linking chrome browser passed
2015-01-02ChangeLog rotatation and copyright year updateAlan Modra1-1/+1
2014-12-25ARM: Add support for value 3 of Tag_ABI_VFP_args attributeAlan Modra1-6/+6
Missing from 5c294fee elfcpp/ * arm.h: Add enums for Tag_ABI_FP_number_model and Tag_ABI_VFP_args. gold/ * arm.cc (Target_arm::do_adjust_elf_header): Provide namespace on new enums. (Target_arm::merge_object_attributes, ): Likewise.
2014-12-25ARM: Add support for value 3 of Tag_ABI_VFP_args attributeTerry Guo1-3/+11
*** bfd/ChangeLog *** 2014-12-25 Thomas Preud'homme <thomas.preudhomme@arm.com> * elf32-arm.c (elf32_arm_merge_eabi_attributes): Handle new Tag_ABI_VFP_args value and replace hardcoded values by enum values. (elf32_arm_post_process_headers): Set e_flags in ELF header as hard float only when Tag_ABI_VFP_args is 1, using new enum value AEABI_VFP_args_vfp to check that. *** binutils/ChangeLog *** 2014-12-25 Thomas Preud'homme <thomas.preudhomme@arm.com> * readelf.c (arm_attr_tag_ABI_VFP_args): Add "compatible". *** gdb/ChangeLog *** 2014-12-25 Thomas Preud'homme <thomas.preudhomme@arm.com> * arm-tdep.c (arm_gdbarch_init): Explicitely handle value 3 of Tag_ABI_VFP_args. Also replace hardcoded values by enum values in the switch handling the different values of Tag_ABI_VFP_args. *** gold/ChangeLog *** 2014-12-25 Thomas Preud'homme <thomas.preudhomme@arm.com> * arm.cc (Target_arm::do_adjust_elf_header): Set e_flags in ELF header as hard float only when Tag_ABI_VFP_args is 1, using new enum value AEABI_VFP_args_vfp to check that. (Target_arm::merge_object_attributes): Handle new Tag_ABI_VFP_args value and replace hardcoded values by enum values. *** include/elf/ChangeLog *** 2014-12-25 Thomas Preud'homme <thomas.preudhomme@arm.com> * arm.h: New AEABI_FP_number_model_* and AEABI_VFP_args_* enum values. *** ld/testsuite/ChangeLog *** 2014-12-25 Thomas Preud'homme <thomas.preudhomme@arm.com> * ld-arm/attr-merge-2a.s: Add Tag_ABI_VFP_args. * ld-arm/attr-merge-2b.s: Likewise. * ld-arm/attr-merge-2.attr: Likewise. * ld-arm/attr-merge-4a.s: Add Tag_ABI_FP_number_model and Tag_ABI_VFP_args. * ld-arm/attr-merge-4b.s: Likewise. * ld-arm/attr-merge-4.attr: Likewise. * ld-arm/attr-merge-6a.s: Likewise. * ld-arm/attr-merge-6b.s: Likewise. * ld-arm/attr-merge-6.attr: Add Tag_ABI_FP_number_model.
2014-07-08Fix internal error with LTO on ARM.Cary Coutant1-2/+2
This prevents the target-specific do_read_symbols methods from being called twice when do_layout_deferred_sections needs to layout an .eh_frame section. gold/ PR gold/15639 * dynobj.h (Sized_dynobj::base_read_symbols): New method. * dynobj.cc (Sized_dynobj::do_read_symbols): Move body to... (Sized_dynobj::base_read_symbols): ...new method. * object.h (Sized_relobj_file::base_read_symbols): New method. * object.cc (Sized_relobj_file::do_read_symbols): Move body to... (Sized_relobj_file::base_read_symbols): ...new method. * arm.cc (Arm_relobj::do_read_symbols): Call base_read_symbols. * mips.cc: (Mips_relobj::do_read_symbols): Likewise. * powerpc.cc (Powerpc_dynobj::do_read_symbols): Likewise.
2014-05-13With -pie and x86, the linker complains if it sees a PC-relative relocationSriraman Tallam1-2/+4
to access a global as it expects a GOTPCREL relocation. This is really not necessary as the linker could use a copy relocation to get around it. This patch enables copy relocations with pie. Context: This is useful because currently the GCC compiler with option -fpie makes every extern global access go through the GOT. That is because the compiler cannot tell if a global will end up being defined in the executable or not and is conservative. This ends up hurting performance when the binary is linked as mostly static where most of the globals do end up being defined in the executable. By allowing copy relocs with fPIE, the compiler need not generate a GOTPCREL(GOT access) for any global access. It can safely assume that all globals will be defined in the executable and generate a PC-relative access instead. Gold can then create a copy reloc for only the undefined globals. gold/ * symtab.h (may_need_copy_reloc): Remove check for position independent code. * x86_64.cc (Target_x86_64<size>::Scan::global): Add check for no position independence before pc absolute may_need_copy_reloc call. Add check for executable output befor pc relative may_need_copy_reloc call. * i386.cc: Ditto. * arm.cc: Ditto. * sparc.cc: Ditto. * tilegx.cc: Ditto. * powerpc.cc: Add check for no position independence before may_need_copy_reloc calls. * testsuite/pie_copyrelocs_test.cc: New file. * testsuite/pie_copyrelocs_shared_test.cc: New file. * Makefile.am (pie_copyrelocs_test): New test. * Makefile.in: Regenerate.
2014-03-05Update copyright yearsAlan Modra1-1/+1
2013-10-11gold/Roland McGrath1-4/+2
* i386.cc (Target_i386): Remove unused member dynbss_. * arm.cc (Target_arm): Likewise. * powerpc.cc (Target_powerpc): Likewise. * sparc.cc (Target_sparc): Likewise. * tilegx.cc (Target_tilegx): Likewise. * x86_64.cc (Target_x86_64): Likewise. * dwarf_reader.h (Dwarf_info_reader): Remove unused members type_signature_, type_offset_. * plugin.h (Plugin_hook): Remove unused member layout_. * readsyms.h (Add_symbols): Remove unused members dirpath_, dirindex_, mapfile_. (Read_member): Remove unused members input_objects_, symtab_, mapfile_, layout_. (Check_library): Remove unused member symtab_. * archive.h (Lib_group): Remove unused member lib_. * archive.cc (Lib_group::Lib_group): Update initializer. * incremental.h (Incremental_binary): Remove unused member target_. (Incremental_script_entry): Removed unused member script_. * layout.h (Write_symbols_task): Remove unused member input_objects_. * icf.h (Icf): Remove unused member num_tracked_relocs.
2013-07-30 gold/Cary Coutant1-2/+4
* parameters.cc (Parameters::entry): Return target-specific entry symbol name. * target.h (Target::entry_symbol_name): New function. (Target_info::entry_symbol_name): New data member. * arm.cc (Target_arm::arm_info): Add entry_symbol_name. (Target_arm_nacl::arm_nacl_info): Likewise. * i386.cc (Target_i386::i386_info): Likewise. (Target_i386_nacl::i386_nacl_info): Likewise. * powerpc.cc (Target_powerpc::powerpc_info): Likewise. * sparc.cc (Target_sparc::sparc_info): Likewise. * tilegx.cc (Target_tilegx::tilegx_info): Likewise. * x86_64.cc: (Target_x86_64::x86_64_info) Likewise. (Target_x86_64_nacl::x86_64_nacl_info) Likewise. * testsuite/testfile.cc (Target_test::test_target_info): Likewise.
2013-04-27 * target-reloc.h (relocate_section): If the reloc offset is out ofIan Lance Taylor1-0/+3
range, pass VIEW as NULL to relocate.relocate. * arm.cc (Target_arm:Relocate::relocate): Check for a NULL view. * i386.cc (Target_i386::Relocate::relocate): Likewise. * powerpc.cc (Target_powerpc::Relocate::relocate): Likewise. * sparc.cc (Target_sparc::Relocate::relocate): Likewise. * tilegx.cc (Target_tilegx::Relocate::relocate): Likewise. * x86_64.cc (Target_x86_64::Relocate::relocate): Likewise.
2013-01-09 * arm.cc (Target_arm::attributes_accept_div): New function.Ian Lance Taylor1-22/+83
(Target_arm::attributes_forbid_div): New function. (Target_arm::merge_object_attributes): Merge the Tag_DIV_use attribute using the same new functions as what bfd/elf32_arm.c does.
2012-12-03 * layout.h (Layout::get_executable_sections): Declare.Alan Modra1-5/+1
* layout.cc (Layout::get_executable_sections): New function. * arm.cc (Target_arm::group_sections): Use it. (Arm_output_section::group_sections): Delete now redundant test. * output.cc (Output_reloc::Output_reloc): Add is_relative. param to handle relative relocs. * output.h (Output_reloc::Output_reloc <absolute reloc>): Likewise. (Output_data_reloc::add_absolute): Adjust. (Output_data_reloc::add_relative): New function. (Output_data::reset_data_size): New function. (Output_relaxed_input_section::set_relobj, set_shndx): New functions. (Output_section::set_addralign): New function. (Output_section::checkpoint_set_addralign): New function. (Output_section::clear_section_offsets_need_adjustment): New function. (Output_section::input_sections): Make public. * powerpc.cc (class Output_data_brlt_powerpc): New. (class Stub_table, class Stub_control): New. (Powerpc_relobj::has14_, set_has_14bit_branch, has_14bit_branch, stub_table_, set_stub_table, stub_table): New vectors and accessor functions. (Target_powerpc::do_may_relax, do_relax, push_branch, new_stub_table, stub_tables, brlt_section, group_sections, add_branch_lookup_table, find_branch_lookup_table, write_branch_lookup_table, make_brlt_section): New functions. (Target_powerpc::struct Sort_sections, class Branch_info): New. (Target_powerpc::brlt_section_, stub_tables_, branch_lookup_table_, branch_info_): New vars. (Target_powerpc::make_plt_entry, make_local_ifunc_plt_entry): Don't make call stubs here. (Output_data_glink): Remove all call stub handling from this class. (Target_powerpc::Scan::local, global): Save interesting branch relocs and relocs for ifunc. Adjust calls to plt entry functions. (Target_powerpc::do_finalize_sections): Only make reg save/restore functions on final link. (Target_powerpc::Relocate::relocate): Adjust lookup of call stubs. Handle long branch destinations too. (Target_powerpc::do_dynsym_value, do_plt_address_for_global, do_plt_address_for_local): Adjust lookup of plt call stubs.
2012-11-15bfd/Roland McGrath1-2/+2
* elf32-arm.c (elf32_arm_nacl_plt0_entry): Use bic rather than bfc instruction for data sandboxing. gold/ * arm.cc (Output_data_plt_arm_nacl::first_plt_entry): Use bic rather than bfc instruction for data sandboxing.
2012-11-01gold/Roland McGrath1-4/+6
* target.h (Sized_target::relocate_relocs): Use Elf_Off for offset_in_output_section parameter. (Sized_target::relocate_special_relocatable): Likewise. * arm.cc (Target_arm::relocate_relocs): Likewise. (Target_arm::relocate_special_relocatable): Likewise. * i386.cc (Target_i386::relocate_relocs): Likewise. * powerpc.cc (Target_powerpc::relocate_relocs): Likewise. * sparc.cc (Target_sparc::relocate_relocs): Likewise. * target-reloc.h (relocate_relocs): Likewise. * testsuite/testfile.cc (Target_test): Likewise. * tilegx.cc (Target_tilegx::relocate_relocs): Likewise. * x86_64.cc (Target_x86_64::relocate_relocs): Likewise.
2012-10-30bfd:Nick Clifton1-3/+19
* elf32-arm.c (elf32_arm_print_private_bfd_data): Recognise and display the new ARM hard-float/soft-float ABI flags for EABI_VER5 (elf32_arm_post_process_headers): Add the hard-float/soft-float ABI flag as appropriate for ET_DYN/ET_EXEC in EABI_VER5. binutils: * readelf.c (decode_ARM_machine_flags): Recognise and display the new ARM hard-float/soft-float ABI flags for EABI_VER5. Split out the code for EABI_VER4 and EABI_VER5 to allow this. elfcpp: * arm.h: New enum for EABI soft- and hard-float flags. gold: * gold.cc (Target_arm::do_adjust_elf_header): Add the hard-float/soft-float ABI flag as appropriate for ET_DYN/ET_EXEC in EABI_VER5. include: * elf/arm.h (EF_ARM_ABI_FLOAT_SOFT): New define. (EF_ARM_ABI_FLOAT_HARD): Likewise. ld/testsuite: * ld-arm/eabi-hard-float.s: New test source. * ld-arm/eabi-soft-float.s: New test source. * ld-arm/eabi-hard-float.d: New test. * ld-arm/eabi-soft-float.d: New test. * ld-arm/eabi-soft-float-ABI4.d: New test. * ld-arm/eabi-soft-float-r.d: New test. * ld-arm/arm-elf.xp: Use the new tests. binutils: PR binutils/14779 * configure.in: Add checks for wchar.h and mbstate_t. * config.in: Regenerate. * configure: Regenerate. * readelf.c: Conditionally include wchar.h. (print_symbol): Conditionally use mbstate_t.
2012-10-18 * target-reloc.h (class Default_comdat_behavior): New, package up..Alan Modra1-2/+3
(get_comdat_behaviour): ..this. (relocate_section): Add Relocate_comdat_behavior template arg, adjust code to suit. * arm.cc (Target_arm::relocate_section): Adjust to suit. (Target_arm::scan_reloc_section): Likewise. * i386.cc (Target_i386::relocate_section): Likewise. * sparc.cc (Target_sparc::relocate_section): Likewise. * tilegx.cc (Target_tilegx::relocate_section): Likewise. * x86_64.cc (Target_x86_64::relocate_section): Likewise. * powerpc.cc (class Relocate_comdat_behavior): New. (Target_powerpc::relocate_section): Don't zap opd relocs. Supply gold::relocate_section with new template arg.
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