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2022-01-02Update year range in copyright notice of binutils filesAlan Modra1-1/+1
The result of running etc/update-copyright.py --this-year, fixing all the files whose mode is changed by the script, plus a build with --enable-maintainer-mode --enable-cgen-maint=yes, then checking out */po/*.pot which we don't update frequently. The copy of cgen was with commit d1dd5fcc38ead reverted as that commit breaks building of bfp opcodes files.
2021-01-01Update year range in copyright notice of binutils filesAlan Modra1-1/+1
2020-01-01Update year range in copyright notice of binutils filesAlan Modra1-1/+1
2019-02-19Check whether symbols with MOVW_.ABS relocations require PLT entries (aarch64).Egeyar Bagcioglu1-0/+11
2019-02-19 Egeyar Bagcioglu <egeyar.bagcioglu@oracle.com> gold/ PR gold/23870 * aarch64.cc (Target_aarch64::Scan::global): Check if a symbol with R_AARCH64_MOVW_.ABS_* relocations requires a PLT entry. * testsuite/Makefile.am: Add aarch64_pr23870 test case. * testsuite/Makefile.in: Regenerate. * testsuite/aarch64_pr23870_bar.c: New file. * testsuite/aarch64_pr23870_foo.c: New file. * testsuite/aarch64_pr23870_main.S: New file.
2019-01-01Update year range in copyright notice of binutils filesAlan Modra1-1/+1
2018-05-10Fix _GLOBAL_OFFSET_TABLE_ value for large GOTs (aarch64).Stephen Crane1-2/+2
Gold resolves GOT-relative relocs relative to the GOT base + 0x8000 when the GOT is larger than 0x8000. However, previously the _GLOBAL_OFFSET_TABLE_ symbol was set to GOT base + 0x8000 when the .got.plt was larger than 0x8000. This patch makes both checks use the size of the .got section so that they agree when to add 0x8000.
2018-04-06Further improve warnings for relocations referring to discarded sections.Cary Coutant1-9/+7
Relocations referring to discarded sections are now treated as errors instead of warnings. Also with this patch, we will now print the section group signature and the object file with the prevailing definition of that group along with the name of the symbol that the relocation is referring to. This additional information should be much more useful to anyone trying to track down the source of such errors. To do so, we now map each discarded section to the Kept_section info in the Layout class, and defer the logic that maps a discarded section to its counterpart in the kept group. This gives us the information we need to identify the signature symbol given the discarded section, and the name of the object file that provided the prevailing (i.e., first) definition of that group. gold/ * object.cc (Sized_relobj_file::include_section_group): Store reference to Kept_section info for discarded comdat sections regardless of size. Move size checking to map_to_kept_section. (Sized_relobj_file::include_linkonce_section): Likewise. (Sized_relobj_file::map_to_kept_section): Add section name parameter. Insert size checking logic from above functions. (Sized_relobj_file::find_kept_section_object): New method. (Sized_relobj_file::get_symbol_name): New method. * object.h (Sized_relobj_file::map_to_kept_section): Add section_name parameter. Adjust all callers. (Sized_relobj_file::find_kept_section_object): New method. (Sized_relobj_file::get_symbol_name): New method. (Sized_relobj_file::Kept_comdat_section): Replace object and shndx fields with sh_size, kept_section, symndx, and is_comdat fields. (Sized_relobj_file::set_kept_comdat_section): Replace kept_object and kept_shndx parameters with is_comdat, symndx, sh_size, and kept_section. (Sized_relobj_file::get_kept_comdat_section): Likewise. * target-reloc.h (enum Comdat_behavior): Change CB_WARNING to CB_ERROR. Adjust all references. (issue_undefined_symbol_error): New function template. (relocate_section): Pass section name to map_to_kept_section. Move discarded section code to new function above. * aarch64.cc (Target_aarch64::scan_reloc_section_for_stubs): Move declaration for gsym out one level. Call issue_discarded_error. * arm.cc (Target_arm::scan_reloc_section_for_stubs): Likewise. * powerpc.cc (Relocate_comdat_behavior): Change CB_WARNING to CB_ERROR.
2018-04-02Fix problem where mixed section types can cause internal error during a -r link.Cary Coutant1-0/+4
During a -r (or --emit-relocs) link, if two sections had the same name but different section types, gold would put relocations for both sections into the same relocation section even though the data sections remained separate. For .eh_frame sections, when one section is PROGBITS and another is X86_64_UNWIND, we really should be using the UNWIND section type and combining the sections anyway. For other sections, we should be creating one relocation section for each output data section. gold/ PR gold/23016 * incremental.cc (can_incremental_update): Check for unwind section type. * layout.h (Layout::layout): Add sh_type parameter. * layout.cc (Layout::layout): Likewise. (Layout::layout_reloc): Create new output reloc section if data section does not already have one. (Layout::layout_eh_frame): Check for unwind section type. (Layout::make_eh_frame_section): Use unwind section type for .eh_frame and .eh_frame_hdr. * object.h (Sized_relobj_file::Shdr_write): New typedef. (Sized_relobj_file::layout_section): Add sh_type parameter. (Sized_relobj_file::Deferred_layout::Deferred_layout): Add sh_type parameter. * object.cc (Sized_relobj_file::check_eh_frame_flags): Check for unwind section type. (Sized_relobj_file::layout_section): Add sh_type parameter; pass it to Layout::layout. (Sized_relobj_file::do_layout): Make local copy of sh_type. Force .eh_frame sections to unwind section type. Pass sh_type to layout_section. (Sized_relobj_file<size, big_endian>::do_layout_deferred_sections): Pass sh_type to layout_section. * output.cc (Output_section::Output_section): Initialize reloc_section_. * output.h (Output_section::reloc_section): New method. (Output_section::set_reloc_section): New method. (Output_section::reloc_section_): New data member. * target.h (Target::unwind_section_type): New method. (Target::Target_info::unwind_section_type): New data member. * aarch64.cc (aarch64_info): Add unwind_section_type. * arm.cc (arm_info, arm_nacl_info): Likewise. * i386.cc (i386_info, i386_nacl_info, iamcu_info): Likewise. * mips.cc (mips_info, mips_nacl_info): Likewise. * powerpc.cc (powerpc_info): Likewise. * s390.cc (s390_info): Likewise. * sparc.cc (sparc_info): Likewise. * tilegx.cc (tilegx_info): Likewise. * x86_64.cc (x86_64_info, x86_64_nacl_info): Likewise. * testsuite/Makefile.am (pr23016_1, pr23016_2): New test cases. * testsuite/Makefile.in: Regenerate. * testsuite/testfile.cc: Add unwind_section_type. * testsuite/pr23016_1.sh: New test script. * testsuite/pr23016_1a.s: New source file. * testsuite/pr23016_1b.s: New source file. * testsuite/pr23016_2.sh: New test script. * testsuite/pr23016_2a.s: New source file. * testsuite/pr23016_2b.s: New source file.
2018-03-28Add support for R_AARCH64_TLSLE_LDST8_TPREL_LO12, etc.Cary Coutant1-1/+41
elfcpp/ PR gold/22969 * aarch64.h: Fix spelling of R_AARCH64_TLSLE_LDST16_TPREL_LO12_NC. gold/ PR gold/22969 * aarch64-reloc.def: Add TLSLE_LDST* relocations. * aarch64.cc (Target_aarch64::optimize_tls_reloc): Likewise. (Target_aarch64::Scan::local): Likewise. (Target_aarch64::Scan::global): Likewise. (Target_aarch64::Relocate::relocate): Likewise. (Target_aarch64::Relocate::relocate_tls): Likewise.
2018-01-03Update year range in copyright notice of binutils filesAlan Modra1-1/+1
2017-11-30Fix internal error in fix_errata on aarch64.Peter Smith1-0/+25
The addresses of erratum stubs can be changed by relaxation passes, and need to be updated. gold/ PR gold/20765 * aarch64.cc (Aarch64_relobj::update_erratum_address): New method. (AArch64_relobj::scan_errata): Update addresses in stub table after relaxation pass.
2017-11-30Fix problem where erratum stubs are not always applied.Cary Coutant1-3/+3
I checked over the results of applying --fix-cortex-a53-843419 to a very large program (gitit) with two stub tables and thousands of erratum fixes. I noticed that all the erratum_stubs were being created but about 1/3 of them were being skipped over by fix_errata_and_relocate_erratum_stubs(). By skipped over I mean no branch relocation or adrp -> adr transformation was applied to the erratum address, leaving the erratum_stub unreachable, and with a branch with a 0 immediate. The root cause of the skipped over erratum_stubs is Erratum_stub::invalidate_erratum_stub() that is used to set relobj_ to NULL when an erratum_stub has been processed. Unfortunately relobj_ is used in operator<() so altering relobj makes the results from erratum_stubs_.lower_bound() as used in find_erratum_stubs_for_input_section() unreliable. 2017-11-30 Peter Smith <peter.smith@linaro.org> Cary Coutant <ccoutant@gmail.com> gold/ PR gold/20765 * aarch64.cc (Erratum_stub::invalidate_erratum_stub): Use erratum_insn_ instead of relobj_ to invalidate the stub. (Erratum_stub::is_invalidated_erratum_stub): Likewise.
2017-11-30Fix segfault in relocate_erratum_stub on aarch64.Peter Smith1-1/+1
The fix for PR21868 (an internal error when --fix-cortex-a53-843419 is applied) has a small mistake in it. When the stub_owner section needs an erratum fix an incorrect address for the stubs for the section is given to relocate_erratum_stub. If we are lucky we will get a segfault; if we aren't, an incorrect patch or data corruption is possible. The error is visible in PR21868, but the side-effects aren't fatal. gold/ PR gold/22233 * aarch64.cc (AArch64_relobj::fix_errata_and_relocate_erratum_stubs): Fix calculation of stub address.
2017-09-22[GOLD] Set non-exec stack for aarch64Jim Wilson1-4/+4
GNU-stack notes added in 2004, aarch64 port added in 2012, so no old object files with missing GNU-stack notes that we need to worry about. gold/ * aarch64.cc (Target_aarch64::aarch64_info): Set is_default_stack_executable to false.
2017-08-282017-08-28 James Clarke <jrtc27@jrtc27.com>Han Shen1-13/+33
gold/ChangeLog: PR gold/21868 * aarch64.cc (AArch64_relobj::try_fix_erratum_843419_optimized): Add extra view offset argument to function. (AArch64_relobj::fix_errata_and_relocate_erratum_stubs): Add extra view offset set to the output offset when the view has is_input_output_view set, since it has not already been included. Pass this to try_fix_erratum_843419_optimized.
2017-08-28Fix bad offset calculation for R_AARCH64_TLSDESC_* relocs.Igor Kudrin1-3/+3
If a custom linker script with an unexpected relative layout of .got and .got.plt sections was used, gold might produce a wrong offset when applying R_AARCH64_TLSDESC_* relocations. This patch fixes the issue by calculating "got_tlsdesc_offset" in a more direct way. gold/ * aarch64.cc (Target_aarch64::Relocate::relocate_tls): Make got_tlsdesc_offset signed and fix its calculation. * testsuite/Makefile.am (aarch64_tlsdesc): New test. * testsuite/Makefile.in: Regenerate. * testsuite/aarch64_tlsdesc.s: New test source file. * testsuite/aarch64_tlsdesc.sh: New test script. * testsuite/aarch64_tlsdesc.t: New test linker script.
2017-07-18Fix spelling typos.Yuri Chornovian1-2/+2
2017-07-11Fixing for PR gold/21491 - Errata workaround can produce broken images.Han Shen1-90/+132
The problem is caused by the fact that gold is relocating the stubs for an entire output section when it processes the relocations for a particular input section that happened to be designated as the stub table "owner". The Relocate_task for that input section may or may not run before the Relocate_task for another input section that contains the code that needs the erratum fix, but doesn't "own" the stub table. If it runs before (or might even race with) that other task, it ends up with a copy of the unrelocated original instruction. In other words - when calling fix_errata() from do_relocate_sections(), gold is going through the list of errata stubs that are associated only with that object. This routine updates the stored original instruction and replaces it in the output view with a branch to the stub. Later, as gold is going through the object file's input sections, it then checks for stub tables "owned" by each input section, and writes out all the stubs from that stub table, regardless of what object file each stub is associated with. Fixed by relocating the erratum stub only after the corresponding errata spot is fixed. That is to have fix_errata() call Stub_table::relocate_erratum_stub() for each stub. gold/ChangeLog 2017-07-06 Han Shen <shenhan@google.com> PR gold/21491 * aarch64.cc (Erratum_stub::invalidate_erratum_stub): New method. (Erratum_stub::is_invalidated_erratum_stub): New method. (Stub_table::relocate_reloc_stub): Renamed from "relocate_stub". (Stub_table::relocate_reloc_stubs): Renamed from "relocate_stubs". (Stub_table::relocate_erratum_stub): New method. (AArch64_relobj::fix_errata_and_relocate_erratum_stubs): Renamed from "fix_errata". (Target_aarch64::relocate_reloc_stub): Renamed from "relocate_stub".
2017-06-202017-06-20 Eric Christopher <echristo@gmail.com>Eric Christopher1-12/+9
* aarch64.cc (scan_reloc_for_stub): Use plt_address_for_global to calculate the symbol value. (scan_reloc_section_for_stubs): Allow stubs to be created for section symbols. (maybe_apply_stub): Handle creating stubs for weak symbols to match the code in scan_reloc_for_stub.
2017-06-152017-06-15 Eric Christopher <echristo@gmail.com>Eric Christopher1-4/+5
* aarch64.cc: Fix a few typos and grammar-os.
2017-06-15[GOLD] Don't install branch-to-stub for TLS relaxed ERRATUM 843419 sequences ↵Jiong Wang1-2/+29
on AArch64 TLS relaxation may change erratum 843419 sequences that those offending ADRP instructions actually transformed into other instructions in which case there is erratum 843419 risk anymore that we should avoid installing unnecessary branch-to-stub. gold/ * aarch64.cc (Insn_utilities::is_mrs_tpidr_el0): New method. (AArch64_relobj<size, big_endian>::try_fix_erratum_843419_optimized): Return ture for some TLS relaxed sequences.
2017-06-072017-06-07 Eric Christopher <echristo@gmail.com>Eric Christopher1-2/+16
* aarch64.cc (maybe_apply_stub): Add debug logging for looking up stubs to undefined symbols and early return rather than fail to look them up. (scan_reloc_for_stub): Add debug logging for no stub creation for undefined symbols.
2017-05-12Fix misplacement of a relaxed section on AArch64.Igor Kudrin1-1/+26
gold/ChangeLog PR gold/21430 * aarch64.cc (AArch64_relobj::convert_input_section_to_relaxed_section): Set the section offset to -1ULL. (Target_aarch64::relocate_section): Adjust the view in case of a relaxed input section. * testsuite/Makefile.am (pr21430): New test. * testsuite/Makefile.in: Regenerate * testsuite/pr21430.s: New test source file. * testsuite/pr21430.sh: New test script.
2017-01-20Fix problem in aarch64 gold sources uncovered by Coverty - using sizeof on a ↵Nick Clifton1-2/+8
pointer instead of an array. * aarch64.cc (Stub_template_repertoire): Change ST_E_835769_INSNS from a pointer to an array.
2017-01-10Refactor Sized_relobj_file::do_relocate_sections.Cary Coutant1-3/+3
gold/ * aarch64.cc (AArch64_relobj::do_relocate_sections): Call Sized_relobj_file::relocate_section_range(). * arm.cc (Arm_relobj::do_relocate_sections): Likewise. * object.h (Sized_relobj_file::relocate_section_range): New method. * reloc.cc (Sized_relobj_file::do_relocate_sections): Move implementation... (Sized_relobj_file::relocate_section_range): ...to new method.
2017-01-02Update year range in copyright notice of all files.Alan Modra1-1/+1
2016-12-01Fix internal error when relaxing branches to STT_SECTION symbols.Cary Coutant1-0/+2
gold/ PR gold/20807 * aarch64.cc (Target_aarch64::scan_reloc_section_for_stubs): Handle section symbols correctly. * arm.cc (Target_arm): Likewise. * powerpc.cc (Target_powerpc): Likewise.
2016-11-27Fix spelling in comments in C source files (gold)Ambrogino Modigliani1-2/+2
* aarch64.cc: Fix spelling in comments. * arm.cc: Fix spelling in comments. * icf.cc: Fix spelling in comments. * layout.cc: Fix spelling in comments. * layout.h: Fix spelling in comments. * mips.cc: Fix spelling in comments. * output.h: Fix spelling in comments. * plugin.h: Fix spelling in comments. * script-sections.h: Fix spelling in comments. * script.h: Fix spelling in comments. * stringpool.h: Fix spelling in comments. * tilegx.cc: Fix spelling in comments.
2016-10-06[GOLD] -Wimplicit-fallthrough warning fixesAlan Modra1-2/+2
* aarch64.cc: Spell fall through comments as "// Fall through.". * arm.cc: Likewise. * mips.cc: Likewise. * powerpc.cc: Likewise. * s390.cc: Likewise. * sparc.cc: Likewise. * x86_64.cc: Likewise. * powerpc.cc (Target_powerpc::Relocate::relocate): Add missing fall through comments. * sparc.cc: (Target_sparc::Scan::global): Likewise. (Target_sparc::Relocate::relocate): Likewise. * tilegx.cc (Target_tilegx::Relocate::relocate): Likewise. * resolve.cc (symbol_to_bits): Add missing break.
2016-09-26[GOLD] warning fixesAlan Modra1-1/+1
* aarch64.cc (Target_aarch64::is_erratum_835769_sequence): Avoid compiler warning. * output.cc (Output_segment::set_section_addresses): Likewise.
2016-07-26[Gold, aarch64] Implement some AArch64 relocs.Han Shen1-0/+51
This CL implemented the following relocs for AArch64 target. - R_AARCH64_MOVW_UABS_G* - R_AARCH64_MOVW_SABS_G* relocations gold/ChangeLog 2016-07-26 Igor Kudrin <ikudrin@accesssoftek.com> * aarch64-reloc-property.cc (Rvalue_bit_select_impl): New class. (rvalue_bit_select): Use Rvalue_bit_select_impl. * aarch64-reloc.def (MOVW_UABS_G0, MOVW_UABS_G0_NC, MOVW_UABS_G1, MOVW_UABS_G1_NC, MOVW_UABS_G2, MOVW_UABS_G2_NC, MOVW_UABS_G3, MOVW_SABS_G0, MOVW_SABS_G1, MOVW_SABS_G2): New relocations. * aarch64.cc (Target_aarch64::Scan::local): Add cases for new MOVW_UABS_* and MOVW_SABS_* relocations. (Target_aarch64::Scan::global): Likewise. (Target_aarch64::Relocate::relocate): Add cases and handlings for new MOVW_UABS_* and MOVW_SABS_* relocations. * testsuite/Makefile.am (aarch64_relocs): New test. * testsuite/Makefile.in: Regenerate. * testsuite/aarch64_globals.s: New test source file. * testsuite/aarch64_relocs.s: Likewise. * testsuite/aarch64_relocs.sh: New test script.
2016-06-28Implement the R_AARCH64_NONE relocation.Igor Kudrin1-0/+6
According to "ELF for the ARM(r) 64-bit Architecture (AArch64)", this relocation can be used "to prevent removal of sections that might otherwise appear to be unused." gold/ * aarch64-reloc.def (NONE): New relocation. * aarch64.cc (Target_aarch64::Scan::local): Handle R_AARCH64_NONE. (Target_aarch64::Scan::global): Likewise. * testsuite/Makefile.am (aarch64_reloc_none): New test. * testsuite/Makefile.in: Regenerate. * testsuite/aarch64_reloc_none.s: New test source file. * testsuite/aarch64_reloc_none.sh: New test script.
2016-06-28Implement SORT_BY_INIT_PRIORITY.Igor Kudrin1-2/+8
2016-06-28 Igor Kudrin <ikudrin@accesssoftek.com> gold/ PR gold/18098 * script-c.h (Sort_wildcard): Add SORT_WILDCARD_BY_INIT_PRIORITY. * script-sections.cc (Input_section_sorter::get_init_priority): New method. (Input_section_sorter::operator()): Handle SORT_WILDCARD_BY_INIT_PRIORITY. (Output_section_element_input::print): Likewise. * script.cc (script_keyword_parsecodes): Add entry SORT_BY_INIT_PRIORITY. * yyscript.y (SORT_BY_INIT_PRIORITY): New token. (wildcard_section): Handle SORT_BY_INIT_PRIORITY. * testsuite/Makefile.am (script_test_14): New test. * testsuite/Makefile.in: Regenerate. * testsuite/script_test_14.s: New test source file. * testsuite/script_test_14.sh: New test script. * testsuite/script_test_14.t: New test linker script.
2016-05-09Fix for PR gold/19987.Han Shen1-4/+19
2016-02-11Remove info message for every erratum 843419 found and fixed.Han Shen1-4/+0
2016-02-11 Rahul Chaudhry <rahulchaudhry@google.com> * aarch64.cc (Target_aarch64::scan_erratum_843419_span): Remove info message for every erratum 843419 found and fixed.
2016-01-15[gold][aarch64] PR gold/19472 - DSOs need pc-relative stubs.Han Shen1-2/+4
The stub generated during relaxation uses absolute addressing mode for shared libraries, which is not correct. Use pc-relative addressing instead. gold/ChangeLog: 2016-01-15 Han Shen <shenhan@google.com> PR gold/19472 - DSOs need pc-relative stubs. * aarch64.cc (Reloc_stub::stub_type_for_reloc): Return PC-relative stub type for DSOs and pie executables.
2016-01-11Fix internal error when applying TLSDESC relocations with no TLS segment.Cary Coutant1-6/+0
gold/ PR gold/19353 * aarch64.cc (Target_aarch64::relocate_tls): Don't insist that we have a TLS segment for GD-to-IE optimization. * i386.cc (Target_i386::tls_gd_to_ie): Remove tls_segment parameter. Adjust all calls. (Target_i386::tls_desc_gd_to_ie): Likewise. (Target_i386::relocate_tls): Don't insist that we have a TLS segment for TLSDESC GD-to-IE optimizations. * x86_64.cc (Target_x86_64::tls_gd_to_ie): Remove tls_segment parameter. Adjust all calls. (Target_x86_64::tls_desc_gd_to_ie): Likewise. (Target_x86_64::relocate_tls): Don't insist that we have a TLS segment for TLSDESC GD-to-IE optimizations.
2016-01-11Refactor gold to enable support for MIPS-64 relocation format.Cary Coutant1-40/+83
For MIPS-64, the r_info field in the relocation format is replaced by several individual fields, including r_sym and r_type. To enable support for this format, I've refactored target-independent code to remove almost all uses of the r_info field. (I've left alone a couple of routines used only for incremental linking, which I can update if/when the MIPS target adds support for incremental linking.) For routines that are already templated on a Classify_reloc class (namely, gc_process_relocs, relocate_section, and relocate_relocs), I've extended the Classify_reloc interface to include sh_type (which no longer needs to be a separate template parameter) as well as get_r_sym() and get_r_type() methods for extracting the r_sym and r_type fields. For scan_relocatable_relocs, I've extended the Default_scan_relocatable_relocs class by converting it to a class template with Classify_reloc as a template parameter. For the remaining routines that need to access r_sym, I've added a virtual Target::get_r_sym() method with an override for the MIPS target. In elfcpp, I've added Mips64_rel, etc., accessor classes and corresponding internal data structures. The MIPS target uses these new classes within its own Mips_classify_reloc class. The Mips64_ accessor classes also expose the r_ssym, r_type2, and r_type3 fields from the relocation. These changes should be functionally the same for all but the MIPS target. elfcpp/ * elfcpp.h (Mips64_rel, Mips64_rel_write): New classes. (Mips64_rela, Mips64_rela_write): New classes. * elfcpp_internal.h (Mips64_rel_data, Mips64_rela_data): New structs. gold/ * gc.h (get_embedded_addend_size): Remove sh_type parameter. (gc_process_relocs): Remove sh_type template parameter. Use Classify_reloc to access r_sym, r_type, and r_addend fields. * object.h (Sized_relobj_file::split_stack_adjust): Add target parameter. (Sized_relobj_file::split_stack_adjust_reltype): Likewise. * reloc-types.h (Reloc_types::copy_reloc_addend): (SHT_REL and SHT_RELA specializations) Remove. * reloc.cc (Emit_relocs_strategy): Rename and move to target-reloc.h. (Sized_relobj_file::emit_relocs_scan): Call Target::emit_relocs_scan(). (Sized_relobj_file::emit_relocs_scan_reltype): Remove. (Sized_relobj_file::split_stack_adjust): Add target parameter. Adjust all callers. (Sized_relobj_file::split_stack_adjust_reltype): Likewise. Call Target::get_r_sym() to get r_sym field from relocations. (Track_relocs::next_symndx): Call Target::get_r_sym(). * target-reloc.h (scan_relocs): Remove sh_type template parameter; add Classify_reloc template parameter. Use for accessing r_sym and r_type. (relocate_section): Likewise. (Default_classify_reloc): New class (renamed and moved from reloc.cc). (Default_scan_relocatable_relocs): Remove sh_type template parameter. (Default_scan_relocatable_relocs::Reltype): New typedef. (Default_scan_relocatable_relocs::reloc_size): New const. (Default_scan_relocatable_relocs::sh_type): New const. (Default_scan_relocatable_relocs::get_r_sym): New method. (Default_scan_relocatable_relocs::get_r_type): New method. (Default_emit_relocs_strategy): New class. (scan_relocatable_relocs): Replace sh_type template parameter with Scan_relocatable_relocs class. Use it to access r_sym and r_type fields. (relocate_relocs): Replace sh_type template parameter with Classify_reloc class. Use it to access r_sym and r_type fields. * target.h (Target::is_call_to_non_split): Replace r_type parameter with pointer to relocation. Adjust all callers. (Target::do_is_call_to_non_split): Likewise. (Target::emit_relocs_scan): New virtual method. (Sized_target::get_r_sym): New virtual method. * target.cc (Target::do_is_call_to_non_split): Replace r_type parameter with pointer to relocation. * aarch64.cc (Target_aarch64::emit_relocs_scan): New method. (Target_aarch64::Relocatable_size_for_reloc): Remove. (Target_aarch64::gc_process_relocs): Use Default_classify_reloc. (Target_aarch64::scan_relocs): Likewise. (Target_aarch64::relocate_section): Likewise. (Target_aarch64::Relocatable_size_for_reloc::get_size_for_reloc): Remove. (Target_aarch64::scan_relocatable_relocs): Use Default_classify_reloc. (Target_aarch64::relocate_relocs): Use Default_classify_reloc. * arm.cc (Target_arm::Arm_scan_relocatable_relocs): Remove sh_type template parameter. (Target_arm::emit_relocs_scan): New method. (Target_arm::Relocatable_size_for_reloc): Replace with... (Target_arm::Classify_reloc): ...this. (Target_arm::gc_process_relocs): Use Classify_reloc. (Target_arm::scan_relocs): Likewise. (Target_arm::relocate_section): Likewise. (Target_arm::scan_relocatable_relocs): Likewise. (Target_arm::relocate_relocs): Likewise. * i386.cc (Target_i386::emit_relocs_scan): New method. (Target_i386::Relocatable_size_for_reloc): Replace with... (Target_i386::Classify_reloc): ...this. (Target_i386::gc_process_relocs): Use Classify_reloc. (Target_i386::scan_relocs): Likewise. (Target_i386::relocate_section): Likewise. (Target_i386::scan_relocatable_relocs): Likewise. (Target_i386::relocate_relocs): Likewise. * mips.cc (Mips_scan_relocatable_relocs): Remove sh_type template parameter. (Mips_reloc_types): New class template. (Mips_classify_reloc): New class template. (Target_mips::Reltype): New typedef. (Target_mips::Relatype): New typedef. (Target_mips::emit_relocs_scan): New method. (Target_mips::get_r_sym): New method. (Target_mips::Relocatable_size_for_reloc): Replace with Mips_classify_reloc. (Target_mips::copy_reloc): Use Mips_classify_reloc. (Target_mips::gc_process_relocs): Likewise. (Target_mips::scan_relocs): Likewise. (Target_mips::relocate_section): Likewise. (Target_mips::scan_relocatable_relocs): Likewise. (Target_mips::relocate_relocs): Likewise. (mips_get_size_for_reloc): New function, factored out from Relocatable_size_for_reloc::get_size_for_reloc. (Target_mips::Scan::local): Use Mips_classify_reloc. (Target_mips::Scan::global): Likewise. (Target_mips::Relocate::relocate): Likewise. * powerpc.cc (Target_powerpc::emit_relocs_scan): New method. (Target_powerpc::Relocatable_size_for_reloc): Remove. (Target_powerpc::gc_process_relocs): Use Default_classify_reloc. (Target_powerpc::scan_relocs): Likewise. (Target_powerpc::relocate_section): Likewise. (Powerpc_scan_relocatable_reloc): Convert to class template. (Powerpc_scan_relocatable_reloc::Reltype): New typedef. (Powerpc_scan_relocatable_reloc::reloc_size): New const. (Powerpc_scan_relocatable_reloc::sh_type): New const. (Powerpc_scan_relocatable_reloc::get_r_sym): New method. (Powerpc_scan_relocatable_reloc::get_r_type): New method. (Target_powerpc::scan_relocatable_relocs): Use Powerpc_scan_relocatable_reloc. (Target_powerpc::relocate_relocs): Use Default_classify_reloc. * s390.cc (Target_s390::emit_relocs_scan): New method. (Target_s390::Relocatable_size_for_reloc): Remove. (Target_s390::gc_process_relocs): Use Default_classify_reloc. (Target_s390::scan_relocs): Likewise. (Target_s390::relocate_section): Likewise. (Target_s390::Relocatable_size_for_reloc::get_size_for_reloc): Remove. (Target_s390::scan_relocatable_relocs): Use Default_classify_reloc. (Target_s390::relocate_relocs): Use Default_classify_reloc. * sparc.cc (Target_sparc::emit_relocs_scan): New method. (Target_sparc::Relocatable_size_for_reloc): Remove. (Target_sparc::gc_process_relocs): Use Default_classify_reloc. (Target_sparc::scan_relocs): Likewise. (Target_sparc::relocate_section): Likewise. (Target_sparc::Relocatable_size_for_reloc::get_size_for_reloc): Remove. (Target_sparc::scan_relocatable_relocs): Use Default_classify_reloc. (Target_sparc::relocate_relocs): Use Default_classify_reloc. * tilegx.cc (Target_tilegx::emit_relocs_scan): New method. (Target_tilegx::Relocatable_size_for_reloc): Remove. (Target_tilegx::gc_process_relocs): Use Default_classify_reloc. (Target_tilegx::scan_relocs): Likewise. (Target_tilegx::relocate_section): Likewise. (Target_tilegx::Relocatable_size_for_reloc::get_size_for_reloc): Remove. (Target_tilegx::scan_relocatable_relocs): Use Default_classify_reloc. (Target_tilegx::relocate_relocs): Use Default_classify_reloc. * x86_64.cc (Target_x86_64::emit_relocs_scan): New method. (Target_x86_64::Relocatable_size_for_reloc): Remove. (Target_x86_64::gc_process_relocs): Use Default_classify_reloc. (Target_x86_64::scan_relocs): Likewise. (Target_x86_64::relocate_section): Likewise. (Target_x86_64::Relocatable_size_for_reloc::get_size_for_reloc): Remove. (Target_x86_64::scan_relocatable_relocs): Use Default_classify_reloc. (Target_x86_64::relocate_relocs): Use Default_classify_reloc. * testsuite/testfile.cc (Target_test::emit_relocs_scan): New method.
2016-01-01Copyright update for binutilsAlan Modra1-1/+1
2015-12-09[GOLD] Relocate::relocate() paramsAlan Modra1-10/+7
Some linker code editing needs to change multiple insns. In some cases multiple relocations are involved and it is not sufficient to make the changes independently as relocations are processed, because doing so might lead to a partial edit. So in order to safely edit we need all the relocations available in relocate(). Also, to emit edited relocs corresponding to the edited code sequence we need some way to pass information from relocate() to relocate_relocs(), particularly if the edit depends on insns. We can't modify input relocs in relocate() as they are mmapped PROT_READ, nor it is particularly clean to write relocs to the output at that stage. So add a Relocatable_relocs* field to relinfo to mark edited relocs. Given that relocate is passed the raw reloc pointer, it makes sense to remove the rel/rela parameter and r_type too. However, that means the mips relocate() needs to know whether SHT_REL or SHT_RELA relocs are being processed. So add a rel_type for mips, which also has the benefit of removing relocate() overloading there. This patch adds the infrastructure without making use of it. Note that relinfo->rr will be NULL if not outputting relocations. * object.h (struct Relocate_info): Add "rr". * reloc.h (Relocatable_relocs::set_strategy): New accessor. * reloc.cc (Sized_relobj_file::do_relocate_sections): Init relinfo.rr for relocate_section and relocate_relocs. * powerpc.cc (relocate): Add rel_type and preloc parameters. Delete rela and r_type params, instead recalculate these from preloc. (relocate_relocs): Delete Relocatable_relocs* param, instead use relinfo->rr. * aarch64.cc: Likewise. * arm.cc: Likewise. * i386.cc: Likewise. * mips.cc: Likewise. * s390.cc: Likewise. * sparc.cc: Likewise. * target.h: Likewise. * tilegx.cc: Likewise. * x86_64.cc: Likewise. * testsuite/testfile.cc: Likewise. * target-reloc.h (relocate_section): Adjust to suit. (apply_relocation, relocate_relocs): Likewise.
2015-11-09Remove unnecessary target dependencies on relocation format.Cary Coutant1-1/+4
2015-11-09 Cary Coutant <ccoutant@gmail.com> Vladimir Radosavljevic <Vladimir.Radosavljevic@imgtec.com> gold/ * copy-relocs.h (Copy_relocs::copy_reloc): Replace reloc parameter with type, offset, addend. (Copy_relocs::save): Likewise. * copy-relocs.cc (Copy_relocs::copy_reloc): Likewise. (Copy_relocs::save): Likewise. * aarch64.cc (Target_aarch64::copy_reloc): Pass r_type, r_offset, and r_addend to Copy_relocs::copy_reloc. * arm.cc (Target_arm::copy_reloc): Likewise. * i386.cc (Target_i386::copy_reloc): Likewise. * mips.cc (Target_mips::copy_reloc): Likewise. * powerpc.cc (Target_powerpc::copy_reloc): Likewise. * s390.cc (Target_s390::copy_reloc): Likewise. * sparc.cc (Target_sparc::copy_reloc): Likewise. * tilegx.cc (Target_tilegx::copy_reloc): Likewise. * x86_64.cc (Target_x86_64::copy_reloc): Likewise.
2015-11-05Add aarch64-specific --no-apply-dynamic-relocs option.Cary Coutant1-0/+25
With --no-apply-dynamic-relocs on aarch64 targets, gold will not apply link-time values for absolute relocations that become dynamic relocations. This provides a workaround for broken Android dynamic linkers that use the link-time value as an extra addend to the relocation. gold/ PR gold/19163 * aarch64.cc (Target_aarch64::Relocate::relocate): Don't apply certain relocations if --no-apply-dynamic-relocs is set. * options.h (--apply-dynamic-relocs): New aarch64-specific option.
2015-10-28Support 64-bit entry size in SHT_HASH (for s390).Marcin Kościelnicki1-4/+8
gold/ * dynobj.cc (Dynobj::create_elf_hash_table): Create hash table with target-specific entry size. (Dynobj::sized_create_elf_hash_table): Add size template parameter. * dynobj.h (Dynobj::sized_create_elf_hash_table): Likewise. * layout.cc (Layout::create_dynamic_symtab): Set entsize to hash_entry_size. * target.h (Target::hash_entry_size): New method. (Target::Target_info::hash_entry_size): New data member. * aarch64.cc (Target_aarch64::aarch64_info): Add hash_entry_size. * arm.cc (Target_arm::arm_info): Likewise. (Target_arm_nacl::arm_nacl_info): Likewise. * i386.cc (Target_i386::i386_info): Likewise. (Target_i386_nacl::i386_nacl_info): Likewise. (Target_iamcu::iamcu_info): Likewise. * mips.cc (Target_mips::mips_info): Likewise. (Target_mips_nacl::mips_nacl_info): Likewise. * powerpc.cc (Target_powerpc::powerpc_info): Likewise. * sparc.cc (Target_sparc::sparc_info): Likewise. * tilegx.cc (Target_tilegx::tilegx_info): Likewise. * x86_64.cc (Target_x86_64::x86_64_info): Likewise. (Target_x86_64_nacl::x86_64_nacl_info): Likewise. * testsuite/testfile.cc (Target_test::test_target_info): Likewise.
2015-10-27Patch for PR gold/19042 - unsupported reloc 311/312.Han Shen1-0/+23
gold/ * aarch64.cc (Target_aarch64::Scan::local): Add support for reloc 311/312.
2015-10-07gold: fix ABI pagesize for aarch64Andreas Schwab1-4/+4
* aarch64.cc (aarch64_info): Set abi_pagesize to 64K.
2015-07-22GOLD aarch64 warning fixAlan Modra1-1/+1
aarch64.cc:2026:50: error: integer overflow in expression [-Werror=overflow] Insntype adr_insn = adrp_insn & ((1 << 31) - 1); * aarch64.cc (try_fix_erratum_843419_optimized): Warning fix.
2015-07-20Optimize erratum 843419 fix.Han Shen1-12/+153
gold/ChangeLog: * aarch64.cc (AArch64_insn_utilities::is_adr): New method. (AArch64_insn_utilities::aarch64_adr_encode_imm): New method. (AArch64_insn_utilities::aarch64_adrp_decode_imm): New method. (E843419_stub): New sub-class of Erratum_stub. (AArch64_relobj::try_fix_erratum_843419_optimized): New method. (AArch64_relobj::section_needs_reloc_stub_scanning): Try optimized fix. (AArch64_relobj::create_erratum_stub): Add 1 argument. (Target_aarch64::scan_erratum_843419_span): Pass in adrp insn offset.
2015-07-09Use "gold_info" instead of "gold_warning" for erratum fix.Han Shen1-2/+2
gold/ChangeLog: * aarch64.cc (Target_aarch64::scan_erratum_843419_span): Use 'gold_info'. (Target_aarch64::scan_erratum_835769_span): USe 'gold_info'.
2015-07-09Drop 'missing mapping symbols' warning for arm and aarch64.Han Shen1-4/+0
The psABI (AAELF) says this about mapping symbols: 4.6.5.1 Section-relative mapping symbols Mapping symbols defined in a section define a sequence of half-open address intervals that cover the address range of the section. Each interval starts at the address defined by the mapping symbol, and continues up to, but not including, the address defined by the next (in address order) mapping symbol or the end of the section. A section must have a mapping symbol defined at the beginning of the section; however, if the section contains only data then the mapping symbol may be omitted. That makes it pretty clear that, in the absence of a mapping symbol, the entire section can be treated as data. gold/ChangeLog: * aarch64.cc (AArch64_relobj::scan_errata): Drop missing symbol warning. * arm.cc (Arm_relobj::scan_section_for_cortex_a8_erratum): Drop missing symbol warning.
2015-07-07Make gold aarch64 accept long form of mapping symbols.Han Shen1-2/+9
2015-07-07 Han Shen <shenhan@google.com> gold/ChangeLog: 2015-07-06 Han Shen <shenhan@google.com> * aarch64.cc (AArch64_relobj::do_count_local_symbols): Make legal of mapping symbols.
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