aboutsummaryrefslogtreecommitdiff
path: root/gold/aarch64.cc
AgeCommit message (Collapse)AuthorFilesLines
2017-05-12Fix misplacement of a relaxed section on AArch64.Igor Kudrin1-1/+26
gold/ChangeLog PR gold/21430 * aarch64.cc (AArch64_relobj::convert_input_section_to_relaxed_section): Set the section offset to -1ULL. (Target_aarch64::relocate_section): Adjust the view in case of a relaxed input section. * testsuite/Makefile.am (pr21430): New test. * testsuite/Makefile.in: Regenerate * testsuite/pr21430.s: New test source file. * testsuite/pr21430.sh: New test script.
2017-01-20Fix problem in aarch64 gold sources uncovered by Coverty - using sizeof on a ↵Nick Clifton1-2/+8
pointer instead of an array. * aarch64.cc (Stub_template_repertoire): Change ST_E_835769_INSNS from a pointer to an array.
2017-01-10Refactor Sized_relobj_file::do_relocate_sections.Cary Coutant1-3/+3
gold/ * aarch64.cc (AArch64_relobj::do_relocate_sections): Call Sized_relobj_file::relocate_section_range(). * arm.cc (Arm_relobj::do_relocate_sections): Likewise. * object.h (Sized_relobj_file::relocate_section_range): New method. * reloc.cc (Sized_relobj_file::do_relocate_sections): Move implementation... (Sized_relobj_file::relocate_section_range): ...to new method.
2017-01-02Update year range in copyright notice of all files.Alan Modra1-1/+1
2016-12-01Fix internal error when relaxing branches to STT_SECTION symbols.Cary Coutant1-0/+2
gold/ PR gold/20807 * aarch64.cc (Target_aarch64::scan_reloc_section_for_stubs): Handle section symbols correctly. * arm.cc (Target_arm): Likewise. * powerpc.cc (Target_powerpc): Likewise.
2016-11-27Fix spelling in comments in C source files (gold)Ambrogino Modigliani1-2/+2
* aarch64.cc: Fix spelling in comments. * arm.cc: Fix spelling in comments. * icf.cc: Fix spelling in comments. * layout.cc: Fix spelling in comments. * layout.h: Fix spelling in comments. * mips.cc: Fix spelling in comments. * output.h: Fix spelling in comments. * plugin.h: Fix spelling in comments. * script-sections.h: Fix spelling in comments. * script.h: Fix spelling in comments. * stringpool.h: Fix spelling in comments. * tilegx.cc: Fix spelling in comments.
2016-10-06[GOLD] -Wimplicit-fallthrough warning fixesAlan Modra1-2/+2
* aarch64.cc: Spell fall through comments as "// Fall through.". * arm.cc: Likewise. * mips.cc: Likewise. * powerpc.cc: Likewise. * s390.cc: Likewise. * sparc.cc: Likewise. * x86_64.cc: Likewise. * powerpc.cc (Target_powerpc::Relocate::relocate): Add missing fall through comments. * sparc.cc: (Target_sparc::Scan::global): Likewise. (Target_sparc::Relocate::relocate): Likewise. * tilegx.cc (Target_tilegx::Relocate::relocate): Likewise. * resolve.cc (symbol_to_bits): Add missing break.
2016-09-26[GOLD] warning fixesAlan Modra1-1/+1
* aarch64.cc (Target_aarch64::is_erratum_835769_sequence): Avoid compiler warning. * output.cc (Output_segment::set_section_addresses): Likewise.
2016-07-26[Gold, aarch64] Implement some AArch64 relocs.Han Shen1-0/+51
This CL implemented the following relocs for AArch64 target. - R_AARCH64_MOVW_UABS_G* - R_AARCH64_MOVW_SABS_G* relocations gold/ChangeLog 2016-07-26 Igor Kudrin <ikudrin@accesssoftek.com> * aarch64-reloc-property.cc (Rvalue_bit_select_impl): New class. (rvalue_bit_select): Use Rvalue_bit_select_impl. * aarch64-reloc.def (MOVW_UABS_G0, MOVW_UABS_G0_NC, MOVW_UABS_G1, MOVW_UABS_G1_NC, MOVW_UABS_G2, MOVW_UABS_G2_NC, MOVW_UABS_G3, MOVW_SABS_G0, MOVW_SABS_G1, MOVW_SABS_G2): New relocations. * aarch64.cc (Target_aarch64::Scan::local): Add cases for new MOVW_UABS_* and MOVW_SABS_* relocations. (Target_aarch64::Scan::global): Likewise. (Target_aarch64::Relocate::relocate): Add cases and handlings for new MOVW_UABS_* and MOVW_SABS_* relocations. * testsuite/Makefile.am (aarch64_relocs): New test. * testsuite/Makefile.in: Regenerate. * testsuite/aarch64_globals.s: New test source file. * testsuite/aarch64_relocs.s: Likewise. * testsuite/aarch64_relocs.sh: New test script.
2016-06-28Implement the R_AARCH64_NONE relocation.Igor Kudrin1-0/+6
According to "ELF for the ARM(r) 64-bit Architecture (AArch64)", this relocation can be used "to prevent removal of sections that might otherwise appear to be unused." gold/ * aarch64-reloc.def (NONE): New relocation. * aarch64.cc (Target_aarch64::Scan::local): Handle R_AARCH64_NONE. (Target_aarch64::Scan::global): Likewise. * testsuite/Makefile.am (aarch64_reloc_none): New test. * testsuite/Makefile.in: Regenerate. * testsuite/aarch64_reloc_none.s: New test source file. * testsuite/aarch64_reloc_none.sh: New test script.
2016-06-28Implement SORT_BY_INIT_PRIORITY.Igor Kudrin1-2/+8
2016-06-28 Igor Kudrin <ikudrin@accesssoftek.com> gold/ PR gold/18098 * script-c.h (Sort_wildcard): Add SORT_WILDCARD_BY_INIT_PRIORITY. * script-sections.cc (Input_section_sorter::get_init_priority): New method. (Input_section_sorter::operator()): Handle SORT_WILDCARD_BY_INIT_PRIORITY. (Output_section_element_input::print): Likewise. * script.cc (script_keyword_parsecodes): Add entry SORT_BY_INIT_PRIORITY. * yyscript.y (SORT_BY_INIT_PRIORITY): New token. (wildcard_section): Handle SORT_BY_INIT_PRIORITY. * testsuite/Makefile.am (script_test_14): New test. * testsuite/Makefile.in: Regenerate. * testsuite/script_test_14.s: New test source file. * testsuite/script_test_14.sh: New test script. * testsuite/script_test_14.t: New test linker script.
2016-05-09Fix for PR gold/19987.Han Shen1-4/+19
2016-02-11Remove info message for every erratum 843419 found and fixed.Han Shen1-4/+0
2016-02-11 Rahul Chaudhry <rahulchaudhry@google.com> * aarch64.cc (Target_aarch64::scan_erratum_843419_span): Remove info message for every erratum 843419 found and fixed.
2016-01-15[gold][aarch64] PR gold/19472 - DSOs need pc-relative stubs.Han Shen1-2/+4
The stub generated during relaxation uses absolute addressing mode for shared libraries, which is not correct. Use pc-relative addressing instead. gold/ChangeLog: 2016-01-15 Han Shen <shenhan@google.com> PR gold/19472 - DSOs need pc-relative stubs. * aarch64.cc (Reloc_stub::stub_type_for_reloc): Return PC-relative stub type for DSOs and pie executables.
2016-01-11Fix internal error when applying TLSDESC relocations with no TLS segment.Cary Coutant1-6/+0
gold/ PR gold/19353 * aarch64.cc (Target_aarch64::relocate_tls): Don't insist that we have a TLS segment for GD-to-IE optimization. * i386.cc (Target_i386::tls_gd_to_ie): Remove tls_segment parameter. Adjust all calls. (Target_i386::tls_desc_gd_to_ie): Likewise. (Target_i386::relocate_tls): Don't insist that we have a TLS segment for TLSDESC GD-to-IE optimizations. * x86_64.cc (Target_x86_64::tls_gd_to_ie): Remove tls_segment parameter. Adjust all calls. (Target_x86_64::tls_desc_gd_to_ie): Likewise. (Target_x86_64::relocate_tls): Don't insist that we have a TLS segment for TLSDESC GD-to-IE optimizations.
2016-01-11Refactor gold to enable support for MIPS-64 relocation format.Cary Coutant1-40/+83
For MIPS-64, the r_info field in the relocation format is replaced by several individual fields, including r_sym and r_type. To enable support for this format, I've refactored target-independent code to remove almost all uses of the r_info field. (I've left alone a couple of routines used only for incremental linking, which I can update if/when the MIPS target adds support for incremental linking.) For routines that are already templated on a Classify_reloc class (namely, gc_process_relocs, relocate_section, and relocate_relocs), I've extended the Classify_reloc interface to include sh_type (which no longer needs to be a separate template parameter) as well as get_r_sym() and get_r_type() methods for extracting the r_sym and r_type fields. For scan_relocatable_relocs, I've extended the Default_scan_relocatable_relocs class by converting it to a class template with Classify_reloc as a template parameter. For the remaining routines that need to access r_sym, I've added a virtual Target::get_r_sym() method with an override for the MIPS target. In elfcpp, I've added Mips64_rel, etc., accessor classes and corresponding internal data structures. The MIPS target uses these new classes within its own Mips_classify_reloc class. The Mips64_ accessor classes also expose the r_ssym, r_type2, and r_type3 fields from the relocation. These changes should be functionally the same for all but the MIPS target. elfcpp/ * elfcpp.h (Mips64_rel, Mips64_rel_write): New classes. (Mips64_rela, Mips64_rela_write): New classes. * elfcpp_internal.h (Mips64_rel_data, Mips64_rela_data): New structs. gold/ * gc.h (get_embedded_addend_size): Remove sh_type parameter. (gc_process_relocs): Remove sh_type template parameter. Use Classify_reloc to access r_sym, r_type, and r_addend fields. * object.h (Sized_relobj_file::split_stack_adjust): Add target parameter. (Sized_relobj_file::split_stack_adjust_reltype): Likewise. * reloc-types.h (Reloc_types::copy_reloc_addend): (SHT_REL and SHT_RELA specializations) Remove. * reloc.cc (Emit_relocs_strategy): Rename and move to target-reloc.h. (Sized_relobj_file::emit_relocs_scan): Call Target::emit_relocs_scan(). (Sized_relobj_file::emit_relocs_scan_reltype): Remove. (Sized_relobj_file::split_stack_adjust): Add target parameter. Adjust all callers. (Sized_relobj_file::split_stack_adjust_reltype): Likewise. Call Target::get_r_sym() to get r_sym field from relocations. (Track_relocs::next_symndx): Call Target::get_r_sym(). * target-reloc.h (scan_relocs): Remove sh_type template parameter; add Classify_reloc template parameter. Use for accessing r_sym and r_type. (relocate_section): Likewise. (Default_classify_reloc): New class (renamed and moved from reloc.cc). (Default_scan_relocatable_relocs): Remove sh_type template parameter. (Default_scan_relocatable_relocs::Reltype): New typedef. (Default_scan_relocatable_relocs::reloc_size): New const. (Default_scan_relocatable_relocs::sh_type): New const. (Default_scan_relocatable_relocs::get_r_sym): New method. (Default_scan_relocatable_relocs::get_r_type): New method. (Default_emit_relocs_strategy): New class. (scan_relocatable_relocs): Replace sh_type template parameter with Scan_relocatable_relocs class. Use it to access r_sym and r_type fields. (relocate_relocs): Replace sh_type template parameter with Classify_reloc class. Use it to access r_sym and r_type fields. * target.h (Target::is_call_to_non_split): Replace r_type parameter with pointer to relocation. Adjust all callers. (Target::do_is_call_to_non_split): Likewise. (Target::emit_relocs_scan): New virtual method. (Sized_target::get_r_sym): New virtual method. * target.cc (Target::do_is_call_to_non_split): Replace r_type parameter with pointer to relocation. * aarch64.cc (Target_aarch64::emit_relocs_scan): New method. (Target_aarch64::Relocatable_size_for_reloc): Remove. (Target_aarch64::gc_process_relocs): Use Default_classify_reloc. (Target_aarch64::scan_relocs): Likewise. (Target_aarch64::relocate_section): Likewise. (Target_aarch64::Relocatable_size_for_reloc::get_size_for_reloc): Remove. (Target_aarch64::scan_relocatable_relocs): Use Default_classify_reloc. (Target_aarch64::relocate_relocs): Use Default_classify_reloc. * arm.cc (Target_arm::Arm_scan_relocatable_relocs): Remove sh_type template parameter. (Target_arm::emit_relocs_scan): New method. (Target_arm::Relocatable_size_for_reloc): Replace with... (Target_arm::Classify_reloc): ...this. (Target_arm::gc_process_relocs): Use Classify_reloc. (Target_arm::scan_relocs): Likewise. (Target_arm::relocate_section): Likewise. (Target_arm::scan_relocatable_relocs): Likewise. (Target_arm::relocate_relocs): Likewise. * i386.cc (Target_i386::emit_relocs_scan): New method. (Target_i386::Relocatable_size_for_reloc): Replace with... (Target_i386::Classify_reloc): ...this. (Target_i386::gc_process_relocs): Use Classify_reloc. (Target_i386::scan_relocs): Likewise. (Target_i386::relocate_section): Likewise. (Target_i386::scan_relocatable_relocs): Likewise. (Target_i386::relocate_relocs): Likewise. * mips.cc (Mips_scan_relocatable_relocs): Remove sh_type template parameter. (Mips_reloc_types): New class template. (Mips_classify_reloc): New class template. (Target_mips::Reltype): New typedef. (Target_mips::Relatype): New typedef. (Target_mips::emit_relocs_scan): New method. (Target_mips::get_r_sym): New method. (Target_mips::Relocatable_size_for_reloc): Replace with Mips_classify_reloc. (Target_mips::copy_reloc): Use Mips_classify_reloc. (Target_mips::gc_process_relocs): Likewise. (Target_mips::scan_relocs): Likewise. (Target_mips::relocate_section): Likewise. (Target_mips::scan_relocatable_relocs): Likewise. (Target_mips::relocate_relocs): Likewise. (mips_get_size_for_reloc): New function, factored out from Relocatable_size_for_reloc::get_size_for_reloc. (Target_mips::Scan::local): Use Mips_classify_reloc. (Target_mips::Scan::global): Likewise. (Target_mips::Relocate::relocate): Likewise. * powerpc.cc (Target_powerpc::emit_relocs_scan): New method. (Target_powerpc::Relocatable_size_for_reloc): Remove. (Target_powerpc::gc_process_relocs): Use Default_classify_reloc. (Target_powerpc::scan_relocs): Likewise. (Target_powerpc::relocate_section): Likewise. (Powerpc_scan_relocatable_reloc): Convert to class template. (Powerpc_scan_relocatable_reloc::Reltype): New typedef. (Powerpc_scan_relocatable_reloc::reloc_size): New const. (Powerpc_scan_relocatable_reloc::sh_type): New const. (Powerpc_scan_relocatable_reloc::get_r_sym): New method. (Powerpc_scan_relocatable_reloc::get_r_type): New method. (Target_powerpc::scan_relocatable_relocs): Use Powerpc_scan_relocatable_reloc. (Target_powerpc::relocate_relocs): Use Default_classify_reloc. * s390.cc (Target_s390::emit_relocs_scan): New method. (Target_s390::Relocatable_size_for_reloc): Remove. (Target_s390::gc_process_relocs): Use Default_classify_reloc. (Target_s390::scan_relocs): Likewise. (Target_s390::relocate_section): Likewise. (Target_s390::Relocatable_size_for_reloc::get_size_for_reloc): Remove. (Target_s390::scan_relocatable_relocs): Use Default_classify_reloc. (Target_s390::relocate_relocs): Use Default_classify_reloc. * sparc.cc (Target_sparc::emit_relocs_scan): New method. (Target_sparc::Relocatable_size_for_reloc): Remove. (Target_sparc::gc_process_relocs): Use Default_classify_reloc. (Target_sparc::scan_relocs): Likewise. (Target_sparc::relocate_section): Likewise. (Target_sparc::Relocatable_size_for_reloc::get_size_for_reloc): Remove. (Target_sparc::scan_relocatable_relocs): Use Default_classify_reloc. (Target_sparc::relocate_relocs): Use Default_classify_reloc. * tilegx.cc (Target_tilegx::emit_relocs_scan): New method. (Target_tilegx::Relocatable_size_for_reloc): Remove. (Target_tilegx::gc_process_relocs): Use Default_classify_reloc. (Target_tilegx::scan_relocs): Likewise. (Target_tilegx::relocate_section): Likewise. (Target_tilegx::Relocatable_size_for_reloc::get_size_for_reloc): Remove. (Target_tilegx::scan_relocatable_relocs): Use Default_classify_reloc. (Target_tilegx::relocate_relocs): Use Default_classify_reloc. * x86_64.cc (Target_x86_64::emit_relocs_scan): New method. (Target_x86_64::Relocatable_size_for_reloc): Remove. (Target_x86_64::gc_process_relocs): Use Default_classify_reloc. (Target_x86_64::scan_relocs): Likewise. (Target_x86_64::relocate_section): Likewise. (Target_x86_64::Relocatable_size_for_reloc::get_size_for_reloc): Remove. (Target_x86_64::scan_relocatable_relocs): Use Default_classify_reloc. (Target_x86_64::relocate_relocs): Use Default_classify_reloc. * testsuite/testfile.cc (Target_test::emit_relocs_scan): New method.
2016-01-01Copyright update for binutilsAlan Modra1-1/+1
2015-12-09[GOLD] Relocate::relocate() paramsAlan Modra1-10/+7
Some linker code editing needs to change multiple insns. In some cases multiple relocations are involved and it is not sufficient to make the changes independently as relocations are processed, because doing so might lead to a partial edit. So in order to safely edit we need all the relocations available in relocate(). Also, to emit edited relocs corresponding to the edited code sequence we need some way to pass information from relocate() to relocate_relocs(), particularly if the edit depends on insns. We can't modify input relocs in relocate() as they are mmapped PROT_READ, nor it is particularly clean to write relocs to the output at that stage. So add a Relocatable_relocs* field to relinfo to mark edited relocs. Given that relocate is passed the raw reloc pointer, it makes sense to remove the rel/rela parameter and r_type too. However, that means the mips relocate() needs to know whether SHT_REL or SHT_RELA relocs are being processed. So add a rel_type for mips, which also has the benefit of removing relocate() overloading there. This patch adds the infrastructure without making use of it. Note that relinfo->rr will be NULL if not outputting relocations. * object.h (struct Relocate_info): Add "rr". * reloc.h (Relocatable_relocs::set_strategy): New accessor. * reloc.cc (Sized_relobj_file::do_relocate_sections): Init relinfo.rr for relocate_section and relocate_relocs. * powerpc.cc (relocate): Add rel_type and preloc parameters. Delete rela and r_type params, instead recalculate these from preloc. (relocate_relocs): Delete Relocatable_relocs* param, instead use relinfo->rr. * aarch64.cc: Likewise. * arm.cc: Likewise. * i386.cc: Likewise. * mips.cc: Likewise. * s390.cc: Likewise. * sparc.cc: Likewise. * target.h: Likewise. * tilegx.cc: Likewise. * x86_64.cc: Likewise. * testsuite/testfile.cc: Likewise. * target-reloc.h (relocate_section): Adjust to suit. (apply_relocation, relocate_relocs): Likewise.
2015-11-09Remove unnecessary target dependencies on relocation format.Cary Coutant1-1/+4
2015-11-09 Cary Coutant <ccoutant@gmail.com> Vladimir Radosavljevic <Vladimir.Radosavljevic@imgtec.com> gold/ * copy-relocs.h (Copy_relocs::copy_reloc): Replace reloc parameter with type, offset, addend. (Copy_relocs::save): Likewise. * copy-relocs.cc (Copy_relocs::copy_reloc): Likewise. (Copy_relocs::save): Likewise. * aarch64.cc (Target_aarch64::copy_reloc): Pass r_type, r_offset, and r_addend to Copy_relocs::copy_reloc. * arm.cc (Target_arm::copy_reloc): Likewise. * i386.cc (Target_i386::copy_reloc): Likewise. * mips.cc (Target_mips::copy_reloc): Likewise. * powerpc.cc (Target_powerpc::copy_reloc): Likewise. * s390.cc (Target_s390::copy_reloc): Likewise. * sparc.cc (Target_sparc::copy_reloc): Likewise. * tilegx.cc (Target_tilegx::copy_reloc): Likewise. * x86_64.cc (Target_x86_64::copy_reloc): Likewise.
2015-11-05Add aarch64-specific --no-apply-dynamic-relocs option.Cary Coutant1-0/+25
With --no-apply-dynamic-relocs on aarch64 targets, gold will not apply link-time values for absolute relocations that become dynamic relocations. This provides a workaround for broken Android dynamic linkers that use the link-time value as an extra addend to the relocation. gold/ PR gold/19163 * aarch64.cc (Target_aarch64::Relocate::relocate): Don't apply certain relocations if --no-apply-dynamic-relocs is set. * options.h (--apply-dynamic-relocs): New aarch64-specific option.
2015-10-28Support 64-bit entry size in SHT_HASH (for s390).Marcin Kościelnicki1-4/+8
gold/ * dynobj.cc (Dynobj::create_elf_hash_table): Create hash table with target-specific entry size. (Dynobj::sized_create_elf_hash_table): Add size template parameter. * dynobj.h (Dynobj::sized_create_elf_hash_table): Likewise. * layout.cc (Layout::create_dynamic_symtab): Set entsize to hash_entry_size. * target.h (Target::hash_entry_size): New method. (Target::Target_info::hash_entry_size): New data member. * aarch64.cc (Target_aarch64::aarch64_info): Add hash_entry_size. * arm.cc (Target_arm::arm_info): Likewise. (Target_arm_nacl::arm_nacl_info): Likewise. * i386.cc (Target_i386::i386_info): Likewise. (Target_i386_nacl::i386_nacl_info): Likewise. (Target_iamcu::iamcu_info): Likewise. * mips.cc (Target_mips::mips_info): Likewise. (Target_mips_nacl::mips_nacl_info): Likewise. * powerpc.cc (Target_powerpc::powerpc_info): Likewise. * sparc.cc (Target_sparc::sparc_info): Likewise. * tilegx.cc (Target_tilegx::tilegx_info): Likewise. * x86_64.cc (Target_x86_64::x86_64_info): Likewise. (Target_x86_64_nacl::x86_64_nacl_info): Likewise. * testsuite/testfile.cc (Target_test::test_target_info): Likewise.
2015-10-27Patch for PR gold/19042 - unsupported reloc 311/312.Han Shen1-0/+23
gold/ * aarch64.cc (Target_aarch64::Scan::local): Add support for reloc 311/312.
2015-10-07gold: fix ABI pagesize for aarch64Andreas Schwab1-4/+4
* aarch64.cc (aarch64_info): Set abi_pagesize to 64K.
2015-07-22GOLD aarch64 warning fixAlan Modra1-1/+1
aarch64.cc:2026:50: error: integer overflow in expression [-Werror=overflow] Insntype adr_insn = adrp_insn & ((1 << 31) - 1); * aarch64.cc (try_fix_erratum_843419_optimized): Warning fix.
2015-07-20Optimize erratum 843419 fix.Han Shen1-12/+153
gold/ChangeLog: * aarch64.cc (AArch64_insn_utilities::is_adr): New method. (AArch64_insn_utilities::aarch64_adr_encode_imm): New method. (AArch64_insn_utilities::aarch64_adrp_decode_imm): New method. (E843419_stub): New sub-class of Erratum_stub. (AArch64_relobj::try_fix_erratum_843419_optimized): New method. (AArch64_relobj::section_needs_reloc_stub_scanning): Try optimized fix. (AArch64_relobj::create_erratum_stub): Add 1 argument. (Target_aarch64::scan_erratum_843419_span): Pass in adrp insn offset.
2015-07-09Use "gold_info" instead of "gold_warning" for erratum fix.Han Shen1-2/+2
gold/ChangeLog: * aarch64.cc (Target_aarch64::scan_erratum_843419_span): Use 'gold_info'. (Target_aarch64::scan_erratum_835769_span): USe 'gold_info'.
2015-07-09Drop 'missing mapping symbols' warning for arm and aarch64.Han Shen1-4/+0
The psABI (AAELF) says this about mapping symbols: 4.6.5.1 Section-relative mapping symbols Mapping symbols defined in a section define a sequence of half-open address intervals that cover the address range of the section. Each interval starts at the address defined by the mapping symbol, and continues up to, but not including, the address defined by the next (in address order) mapping symbol or the end of the section. A section must have a mapping symbol defined at the beginning of the section; however, if the section contains only data then the mapping symbol may be omitted. That makes it pretty clear that, in the absence of a mapping symbol, the entire section can be treated as data. gold/ChangeLog: * aarch64.cc (AArch64_relobj::scan_errata): Drop missing symbol warning. * arm.cc (Arm_relobj::scan_section_for_cortex_a8_erratum): Drop missing symbol warning.
2015-07-07Make gold aarch64 accept long form of mapping symbols.Han Shen1-2/+9
2015-07-07 Han Shen <shenhan@google.com> gold/ChangeLog: 2015-07-06 Han Shen <shenhan@google.com> * aarch64.cc (AArch64_relobj::do_count_local_symbols): Make legal of mapping symbols.
2015-06-29Patch for gold internal error while fixing erratum 843419.Han Shen1-4/+47
The crash reason is that the insn to be moved to stub may be a relocation spot, so instead of placing the origin insn (that is insn before-relocation) to the stub, I have to place the relocated one. Note the relocation involved is non-pc-relative, so it is safe to move the relocated insn. gold/ChangeLog: 2015-06-29 Han Shen <shenhan@google.com> * AArch64.cc (Erratum_stub::Insn_utilities): New typedef. (Erratum_stub::update_erratum_insn): New method. (Stub_table::relocate_stubs): Modified to place relocated insn. (AArch64_relobj::fix_errata): Modified gold_assert.
2015-06-12[gold][aarch64] Fix erratum 835769.Han Shen1-41/+252
gold/ChangeLog: * aarch64.cc (AArch64_insn_utilities::BYTES_PER_INSN): Move defintion outside class definition. (AArch64_insn_utilities::AARCH64_ZR): New static constant. (AArch64_insn_utilities::aarch64_op31): New member. (AArch64_insn_utilities::aarch64_ra): New member. (AArch64_insn_utilities::aarch64_mac): New member. (AArch64_insn_utilities::aarch64_mlxl): New member. (ST_E_835769): New global enum member. (Stub_table::relocate_stubs): Add 835769 handler. (Stub_template_repertoire::Stub_template_repertoire): Install new stub type. (AArch64_relobj::scan_errata): This func is renamed from scan_erratum_843419. (AArch64_relobj::do_count_local_symbols): Add 835769 handler. (AArch64_relobj::do_relocate_sections): Add 835769 handler. (AArch64_relobj::scan_sections_for_stubs): Add 835769 handler. (Target_aarch64::scan_erratum_835769_span): New method. (Target_aarch64::create_erratum_stub): New method. (Target_aarch64::is_erratum_835769_sequence): New method. (Target_aarch64::scan_erratum_843419_sequence): Move part of the code into create_erratum_stub. * options.h (fix_cortex_a53_835769): New option.
2015-06-11Fix gold build error at -O0.Cary Coutant1-2/+6
In aarch64.cc, Erratum_stub::STUB_ADDR_ALIGN and Reloc_stub::STUB_ADDR_ALIGN are declared as static const int, and initialized in the class body. These values are referenced from outside the class body, and with no optimization, the references go unresolved. gold/ * aarch64.cc (Erratum_stub::STUB_ADDR_ALIGN): Move initialization outside class body. (Reloc_stub::STUB_ADDR_ALIGN): Likewise.
2015-06-10Patch for erratum-843419 (2 of 2 - fix erratum occurrences).Han Shen1-176/+657
Now fixing for 843419 is fully functional. The first part of the erratum fix CL is here - https://sourceware.org/ml/binutils/2015-04/msg00229.html gold/ChangeLog 2015-06-10 Han Shen <shenhan@google.com> * aarch64.cc(global enum): New constants representing stub types. (Stub_template): New POD struct. (Stub_template_repertoire): New class. (Stub_base): New class. (Erratum_stub): New class. (Reloc_stub): Refactored to be a subclass of Stub_base. (Reloc_stub::Stub_type): Removed. (Reloc_stub::offset): Moved to Stub_base. (Reloc_stub::set_offset): Moved to Stub_base. (Reloc_stub::destination_address): Moved to Stub_base. (Reloc_stub::set_destination_address): Moved to Stub_base. (Reloc_stub::reset_destination_address): Moved to Stub_base. (Reloc_stub::stub_type): Renamed and moved to Stub_base. (Reloc_stub::stub_size): Renamed and moved to Stub_base. (Reloc_stub::stub_insns): Renamed and moved to Stub_base. (Reloc_stub::write): Moved to Stub_base. (Reloc_stub::invalid_offset): Moved to Stub_base. (Reloc_stub::invalid_address): Moved to Stub_base. (Reloc_stub::stub_type_): Renamed and moved to Stub_base. (Reloc_stub::stub_insns_): Moved to Stub_base. (Reloc_stub::offset_): Moved to Stub_base. (Reloc_stub::destination_address_): Moved to Stub_base. (Stub_table::The_aarch64_relobj): New typedef. (Stub_table::The_erratum_stub): New typedef. (Stub_table::The_erratum_stub_less): New typedef. (Stub_table::The_erratum_stub_set): New typedef. (Stub_table::The_erratum_stub_set_iter): New typedef. (Stub_table::empty): Added emptiness testing for erratum stubs. (Stub_table::add_erratum_stub): New method to add an erratum stub. (Stub_table::find_erratum_stub): New method. (Stub_table::find_erratum_stubs_for_input_section): New method. (Stub_table::erratum_stub_address): New method. (Stub_table::update_date_size_changed_p): Modified to handle erratum stubs. (Stub_table::do_addralign): Modified to handle erratum stubs. (Stub_table::erratum_stubs_): New member. (Stub_table::erratum_stub_size_): New member. (Stub_table::relocate_stubs): Modified to handle erratum stubs. (Stub_table::do_write): Modified to handle erratum stubs. (AArch64_relobj::The_erratum_stub): New typedef. (AArch64_relobj::Erratum_stub_set_iter): New typedef. (AArch64_relobj::fix_errata): New method. (Target_aarch64::The_reloc_stub_type): Removed. (Target_aarch64::The_erratum_stub): New typede. (AArch64_relocate_functions::construct_b): New method.
2015-04-27[gold] Rename '--fix-cortex-a53' to '--fix-cortex-a53-843419'.Han Shen1-2/+2
Keep gold consistent with bfd erratum-fixing option names, so as to ease life in Makefile/scripts. gold/ * options.h (--fix-cortex-a53-843419): Rename option. * aarch64.cc (AArch64_relobj::do_count_local_symbols): Use renamed option. (AArch64_relobj::scan_sections_for_stubs): Use renamed option.
2015-04-16[gold] The first patch to address cortex-a53 erratum-843419.Han Shen1-2/+583
It implemented scanning the binary and reporting occurrences to users when '--fix-cortex-a53' is turned on. With this, gold users will be able to see if or not there are such erratum occurrences in the output binary. Also included in the CL is reading/recording mapping symbols, which is needed during scan. gold/ChangeLog: * aarch64.cc (AArch64_insn_utilities): New utility class. (AArch64_relobj::Mapping_symbol_position): New struct. (AArch64_relobj::Mapping_symbol_info): New typedef. (AArch64_relobj::do_count_local_symbols): New function overriding parent's implementation. (AArch64_relobj::mapping_symbol_info_): New member (AArch64_relobj::scan_erratum_843419): New method. (Target_aarch64::scan_erratum_843419_span): New method. (Target_aarch64::is_erratum_843419_sequence): New method. * options.h (fix_cortex_a53): New option.
2015-04-06Fix the signature of a virtual method to match the one in the parent class.Rafael Ávila de Espíndola1-6/+4
2015-03-30Support AARCH64_TLSLD_ADD_DTPREL_* relocations.Jing Yu1-9/+16
Also Change _TLS_MODULE_BASE_. Always let it point to the start of TLS segment. 2015-03-28 Jing Yu <jingyu@google.com> * aarch64-reloc.def: New TLSLD_ADD_DTPREL_HI12, TLSLD_ADD_DTPREL_LO12_NC. * aarch64.cc (Target_aarch64::define_tls_base_symbol): Always let _TLS_MODULE_BASE_ point to the start of tls segment. (Target_aarch64::optimize_tls_reloc): Add cases for R_AARCH64_TLSLD_ADD_DTPREL_HI12 and R_AARCH64_TLSLD_ADD_DTPREL_LO12_NC. (Target_aarch64::Scan::local): Likewise. (Target_aarch64::Scan::global): Likewise. (Target_aarch64::Relocate::relocate): Likewise. (Target_aarch64::Relocate::relocate_tls): Likewise. And remove subtracting tls segment size from symbol value for TLSLD_*_DTPREL relocations.
2015-02-12Add missing TLSLE relocations for gold aarch64 backend.Jing Yu1-5/+35
gold/ChangeLog: * aarch64-reloc.def (TLSLE_MOVW_TPREL_G2, TLSLE_MOVW_TPREL_G1, TLSLE_MOVW_TPREL_G1_NC, TLSLE_MOVW_TPREL_G0, TLSLE_MOVW_TPREL_G0_NC,): New relocation. * aarch64.cc (Target_aarch64::Scan::local): Add cases for new TLSLE_MOVW_* relocations. (Target_aarch64::Scan::global): Likewise. (Target_aarch64::Relocate::relocate): Likewise. (Target_aarch64::Relocate::relocate_tls): Add cases and handlings for new TLSLE_MOVW_* relocations.
2015-01-29This patch adds IFUNC support for arm gold backend.Han Shen1-1/+1
This is a feature required in chromeos arm development work. Tested: 1) Built passed all-gold on x86_64 machine 2) Tested with basic gold aarch64 ifunc unittests - a) global ifunc, statically/non-statically linked b) local ifunc, statically/non-statically linked c) global/local, other shared library routine mixed, statically/non-statically linked d) arm/thumb mode ifunc e) linking chrome browser passed
2015-01-02ChangeLog rotatation and copyright year updateAlan Modra1-1/+1
2014-12-14Cast current_group_size to unsigned longH.J. Lu1-1/+1
* aarch64.cc (AArch64_relocate_functions::maybe_apply_stub): Cast current_group_size to unsigned long when reporting error.
2014-12-10Give informative error message for stub-group-sizeJing Yu1-10/+17
This patch gives current stub-group-size in error message when stub is too far away. * aarch64.cc (Target_aarch64): Add new variable: stub_group_size_. (AArch64_relocate_functions::maybe_apply_stub): Add new parameter. Update error message. (Target_aarch64::do_relax): Use absolute value of option stub_group_size. Replace local variable with class member stub_group_size_.
2014-11-26Fix for gold linking tlsdesc into an executable with -pie.Han Shen1-0/+5
(Also included in this patch is a minor typo fix in gold/ChangeLog.) When linking the following tlsdesc access sequence into an executable with -pie, adrp x0, :tlsdesc:tls_gd ldr x1, [x0, #:tlsdesc_lo12:tls_gd] add x0, x0, :tlsdesc_lo12:tls_gd .tlsdesccall tls_gd blr x1 mrs x1, tpidr_el0 add x0, x1, x0 ldr w0, [x0] current gold-aarch64 backend does tls-desc-gd-to-ie relaxation, into adrp x0, 1000 <__FRAME_END__+0x720> ldr x1, [x0,#4064] ;; <=== the target register should be x0 nop nop mrs x1, tpidr_el0 add x0, x1, x0 ldr w0, [x0] This code is wrong. The fix changes ldr target register into x0.
2014-10-29Misc about gold for aarch64 backend.Han Shen1-122/+566
The patch does the following things: -- Add support for ifunc. -- Enable safe icf -- Add support for TLSLD relocations R_AARCH64_TLSLD_ADR_PAGE21, R_AARCH64_TLSLD_ADD_LO12_NC, R_AARCH64_TLSLD_MOVW_DTPREL_G1, R_AARCH64_TLSLD_MOVW_DTPREL_G0_NC. (R_AARCH64_TLSLD_MOVW_* are used by LLVM.) -- Add support for TLSLD->TLSLE relaxation. -- Add support for R_AARCH64_LD_PREL_LO19, R_AARCH64_ADR_PREL_LO21. -- Fix 2 encoding bugs in AArch64_relocate_functions::update_movnz. -- Correct TLS relocation properties in gold/aarch64-reloc.def. -- Update testsuite/icf_safe_so_test.cc, testsuite/icf_safe_test.sh. gold/ 2014-10-29 Han Shen <shenhan@google.com> Jing Yu <jingyu@google.com> * aarch64-reloc.def: Add LD_PREL_LO12, ADR_PREL_LO21, TLSLD_ADR_PAGE21, TLSLD_ADD_LO12_NC, TLSLD_MOVW_DTPREL_G1, TLSLD_MOVW_DTPREL_G0_NC. Change property of TLS relocations to Symbol::TLS_REF. * aarch64.cc (Target_aarch64::do_can_check_for_function_pointers): New method. (Target_aarch64::reloc_needs_plt_for_ifunc): New method. (Target_aarch64::tls_ld_to_le): New method. (Target_aarch64::aarch64_info): Enable can_icf_inline_merge_sections for 64bit targets. (Output_data_plt_aarch64::irelative_rel_): New data member. (Output_data_plt_aarch64::add_entry): Add irelative entries to plt. (Output_data_plt_aarch64::add_local_ifunc_entry): New method. (Output_data_plt_aarch64::add_relocation): New method. (Output_data_plt_aarch64::do_write): Add gold_assert on got_irelative offset. Add got_irelative size to got size. (AArch64_relocate_functions): Typedef AArch64_valtype. Replace long type string with the new typename. (AArch64_relocate_functions::update_adr): Replace parameter x with immed. (AArch64_relocate_functions::update_movnz): Correct wrong val mask. (AArch64_relocate_functions::reloc_common): New method. (AArch64_relocate_funcsions::rela_general): Extract common part out into reloc_common method. (AArch64_relocate_functions::rela_general): Likewise. (AArch64_relocate_functions::pcrela_general): Likewise. (AArch64_relocate_functions::adr): New method. (AArch64_relocate_functions::adrp): Calculate immed before calling update_adr. (AArch64_relocate_functions::adrp): Likewise. (AArch64_relocate_functions::movnz): Cast x to SignedW type when comparing x to 0. Calculate immed from ~x when x < 0. (Target_aarch64::optimize_tls_reloc): Add new cases for TLSLD_ADR_PAGE21, TLSLD_ADD_LO12_NC, TLSLD_MOVW_DTPREL_G1, TLSLD_MOVW_DTPREL_G0_NC. (Target_aarch64::possible_function_pointer_reloc): Implement this method. (Target_aarch64::Scan::local_reloc_may_be_function_pointer): Update comment. (Target_aarch64::Scan::local): Add codes to handle STT_GNU_IFUNC symbol. Add cases for TLSLD_ADR_PAGE21, TLSLD_ADD_LO12_NC, TLSLD_MOVW_DTPREL_G1, TLSLD_MOVW_DTPREL_G0_NC. (Target_aarch64::Scan::global): Add codes to handle STT_GNU_IFUNC symbol. Add cases for TLSLD_ADR_PAGE21, TLSLD_ADD_LO12_NC, TLSLD_MOVW_DTPREL_G1, TLSLD_MOVW_DTPREL_G0_NC. (Target_aarch64::make_plt_entry): Call add_entry with two more parameters. (Target_aarch64::make_local_ifunc_plt_entry): New method. (Target_aarch64::Relocate::relocate): Add cases for LD_PREL_LO19, ADR_PREL_LO21, TLSLD_ADR_PAGE21, TLSLD_ADD_LO12_NC, TLSLD_MOVW_DTPREL_G1, TLSLD_MOVW_DTPREL_G0_NC. (Target_aarch64::Relocate::relocate_tls): Add cases for TLSLD_ADR_PAGE21, TLSLD_ADD_LO12_NC, TLSLD_MOVW_DTPREL_G1, TLSLD_MOVW_DTPREL_G0_NC. * testsuite/icf_safe_so_test.cc: Correct test comment. * testsuite/icf_safe_test.sh: Add AArch64 arch.
2014-10-17Add "typename" keyword to satisfy GCC 4.2.Cary Coutant1-1/+1
gold/ * aarch64.cc (AArch64_relocate_functions::maybe_apply_stub): Add "typename" keyword.
2014-10-15Here we have the patch for gold aarch64 backend to support relaxation.Han Shen1-39/+2124
In short relaxation is the linker's generation of stubs that fixes the out-of-range jumps/branches in the original object file. With this implementation, we are able to link a 456MB aarch64 application. Tested: 1) Build natively on x86_64 and aarch64 machines. 2) Pass unit tests regarding relaxation.
2014-09-17Add tls support to gold aarch64 backend.Jing Yu1-132/+1482
elfcpp/ChangeLog: 2014-09-17 Han Shen <shenhan@google.com> * aarch64.h (R_AARCH64_TLS_DTPREL64): Switch enum value with ... (R_AARCH64_TLS_DTPMOD64): ... enum value. gold/ChangeLog: 2014-09-17 Han Shen <shenhan@google.com> Jing Yu <jingyu@google.com> * aarch64-reloc.def: Add TLSGD_ADR_PAGE21, TLSGD_ADD_LO12_NC, TLSDESC_ADR_PAGE21, TLSDESC_LD64_LO12, TLSDESC_ADD_LO12, TLSDESC_CALL. * aarch64.cc (Target_aarch64): Add data members got_irelative_, got_tlsdesc_, rela_irelative_, got_mod_index_offset_, tlsdesc_reloc_info_, tls_base_symbol_defined_. Initialize them in constructor. (Target_aarch64::do_reloc_symbol_index): New method. (Target_aarch64::do_reloc_addend): New method. (Target_aarch64::add_tlsdesc_info): New method. (Target_aarch64::do_dynsym_value): New method. (Target_aarch64::do_make_data_plt): Add new parameters: got, got_irelative. Pass them to Output_data_plt_aarch64_standard. (Target_aarch64::make_data_plt): Add new parameters: got, got_irelative. Pass them to do_make_data_plt. (Target_aarch64::Relocate): Add skip_call_tls_get_addr_ variable. (Target_aarch64::Relocate:tls_gd_to_le): New method. (Target_aarch64::Relocate:tls_ie_to_le): New method. (Target_aarch64::Relocate:tls_desc_gd_to_le): New method. (Target_aarch64::Relocate:tls_desc_gd_to_ie): New method. (Target_aarch64::got_tlsdesc_section): New method. (Target_aarch64::make_local_ifunc_plt_entry): New method. (Target_aarch64::define_tls_base_symbol): New method. (Target_aarch64::reserve_tlsdesc_entries): New method. (Target_aarch64::got_mod_index_entry): New method. (Target_aarch64::rela_tlsdesc_section): New method. (Target_aarch64::rela_irelative_section): New method. (Target_aarch64::Tlsdesc_info): New struct. (Target_aarch64::got_section): Create .got.plt space for IRELATIVE relocations and tlsdesc relocations. (Target_aarch64::optimize_tls_reloc): Implement method. (Output_data_plt_aarch64): Add member variables: tlsdesc_rel_, got_, got_irelative_, irelative_count_, tlsdesc_got_offset_. Initialize them in constructor. (Output_data_plt_aarch64::reserve_tlsdesc_entry): New method. (Output_data_plt_aarch64::has_tlsdesc_entry): New method. (Output_data_plt_aarch64::get_tlsdesc_got_offset): New method. (Output_data_plt_aarch64::get_tlsdesc_plt_offset): New method. (Output_data_plt_aarch64::rela_tlsdesc): New method. (Output_data_plt_aarch64::rela_irelative): New method. (Output_data_plt_aarch64::entry_count): Count IRELATIVE relocations. (Output_data_plt_aarch64::first_plt_entry_offset): Add const attribute. (Output_data_plt_aarch64::get_plt_tlsdesc_entry_size): New method. (Output_data_plt_aarch64::fill_tlsdesc_entry): New method. (Output_data_plt_aarch64::do_get_plt_tlsdesc_entry_size): New method. (Output_data_plt_aarch64::do_fill_tlsdesc_entry): New method. (Output_data_plt_aarch64_standard): New member variables: plt_tlsdesc_entry_size, tlsdesc_plt_entry. (Output_data_plt_aarch64_standard::Output_data_plt_aarch64_standard): New parameter: got, got_irelative. (Output_data_plt_aarch64_standard::do_get_plt_entry_size): New method. (Output_data_plt_aarch64_standard::do_fill_tlsdesc_entry): New method. (Output_data_plt_aarch64::do_write): Replace got_address with gotplt_address. Add irelative_count_ to count. Write tlsdesc entry. (AArch64_relocate_functions::update_movnz): New method. (AArch64_relocate_functions): Correct format. (AArch64_relocate_functions::movnz): New method. (Target_aarch64::Scan::local): Correct format. Move r_sym, got to before the switch. Add new cases to switch. Check ie_to_le relaxation on tlsie relocations. Add code handling tlsgd tlsdesc cases. (Target_aarch64::Scan::global): Move arp to front. Do copy_reloc when needed. Add new cases to switch. Insert dynamic RELATIVE relocation when needed. Add code handling tlsgd, tlsie, tlsdesc cases. Call reloc_name_in_error_message to print unsupported reloc. (Target_aarch64::make_plt_section): Pass got_ and got_irelative_ to make_data_plt. (Target_aarch64::do_finalize_sections): Emit relocs to save COPY relocs. Fill in some more dynamic tags. (Target_aarch64::Relocate::relocate): Handle tlsgd, tlsdesc relocs. Skip call tls_get_addr when tlsgd is relaxed. (Target_aarch64::Relocate::relocate_tls): Correct format. Add code handling tlsgd, tlsdesc relocs, and tls gd->le, ie->le, tlsdesc->le, tlsdesc->ie relaxation.
2014-08-29The 3rd patch for aarch64 gold.Han Shen1-50/+591
This enables - 1. static linking hello world 2. limited support for TLSIE and TLSLE 3. limited support for linking shared library, linking executable against shared library. gold/ChangeLog 2014-08-29 Han Shen <shenhan@google.com> Jing Yu <jingyu@google.com> * aarch64-reloc-property.cc (AArch64_reloc_property_table::reloc_name_in_error_message): Fix bug in reference reloc property in the table. * aarch64-reloc.def: Add TLSLE reloc types and fix some errors in 3 other entries. * aarch64.cc: (Output_data_got_aarch64::add_static_reloc): 2 new overloaded methods. (Output_data_got_aarch64::do_write): Add code to write out static relocs. (class Output_data_got_aarch64::Static_reloc): New class to wrap static relocs. (Output_data_got_aarch64::static_relocs): New vector to hold static relocs. (Target_aarch64::TCB_SIZE): New const static memeber. (Target_aarch64::tcb_size): New method. (Target_aarch64::Relocate::relocate): Add code handling new reloc types. (Target_aarch64::Relocate::relocate_tls): New method. (Target_aarch64::Scan::local): Add code handling new reloc types. (Target_aarch64::Scan::global): Add code handling new reloc types.
2014-08-08gold aarch64 patch to enable linking hello_wolrd.Jing Yu1-149/+999
elfcpp/ChangeLog: 2014-08-08 Han Shen <shenhan@google.com> * aarch64.h (withdrawn): Replaced with R_AARCH64_withdrawn. 2014-08-08 Jing Yu <jingyu@google.com> Han Shen <shenhan@google.com> * Makefile.am (HFILES): Add aarch64-reloc-property.h. (DEFFILES): add aarch64-reloc.def. (TARGETSOURCES): Add aarch64-reloc-property.cc. (ALL_TARGETOBJS): Add aarch64-reloc-property.$(OBJEXT). * Makefile.in: Regenerate. * aarch64-reloc-property.cc: New file. * aarch64-reloc-property.h: New file. * aarch64-reloc.def: New file. * aarch64.cc: Include aarch64-reloc-property.h. Replace spaces with tab to make the format consistent. (Output_data_got_aarch64::symbol_table_): New method. (Target_aarch64::do_plt_address_for_global): New method. (Target_aarch64::do_plt_address_for_local): New method. (Target_aarch64::do_select_as_default_target): New method. (Target_aarch64::do_make_data_plt): New method. (Target_aarch64::make_data_plt): New method. (Output_data_plt_aarch64::has_irelative_section): New method. (Output_data_plt_aarch64::address_for_global): New method. (Output_data_plt_aarch64::address_for_local): New method. (Output_data_plt_aarch64::irelative_rel_): New parameter. (Output_data_plt_aarch64::add_entry): Implement contents. (Output_data_plt_aarch64::set_final_data_size): Fix typo. (Output_data_plt_aarch64::do_write): Remove useless got_base. Set the got_pov entry to plt0. (Output_data_plt_aarch64_standard::do_fill_first_plt_entry): Implement contents. (Output_data_plt_aarch64_standard::do_fill_plt_entry): Implement. (AArch64_howto): New struct. (aarch64_howto[]): New static const array. (AArch64_relocate_functions): New class. (Target_aarch64::Scan::get_reference_flags): Remove method. (Target_aarch64::Scan::local): Implement to support a few relocations. (Target_aarch64::Scan::global): Implement to support a few relocations. (Target_aarch64::make_plt_section): Implement contents. (Target_aarch64::make_plt_entry): Implement contents. (Target_aarch64::do_finalize_sections): Implement contents. (Target_aarch64::Relocate::relocate): Implement a few relocations. (Target_aarch64::relocate_section): Implement contents.
2014-07-022014-07-02 Jing Yu <jingyu@google.com>Jing Yu1-0/+1447
Initial patch to enable gold aarch64 backend. This patch is just a skeleton which almost does nothing. It does not support ILP32 now. gold/ChangeLog: * aarch64.cc: New file * Makefile.am (TARGETSOURCES): Add aarch64.cc (ALL_TARGETOBJS): Add aarch64.$(OBJEXT) * Makefile.in: Regenerate. * configure.tgt: Add entries for aarch64*. * configure.ac: Likewise. * configure: Likewise. elfcpp/ChangeLog: * aarch64.h: New file. New enums for aarch64-elf64 relocations. * elfcpp.h (EM_AARCH64, SHT_AARCH64_ATTRIBUTES, PT_AARCH64_ARCHEXT, PT_AARCH64_UNWIND): New enum constant.
generated by cgit v1.1 at 2024-12-22 22:08:37 +0000