aboutsummaryrefslogtreecommitdiff
path: root/gdb/riscv-tdep.c
AgeCommit message (Expand)AuthorFilesLines
2022-01-01Automatic Copyright Year update after running gdb/copyright.pyJoel Brobecker1-1/+1
2021-12-02(RISCV) fix handling of fixed-point type return valuesJoel Brobecker1-3/+44
2021-11-26gdb: add risc-v disassembler options supportAndrew Burgess1-0/+8
2021-11-18gdbsupport: make gdb_assert_not_reached accept a format stringSimon Marchi1-3/+3
2021-11-16gdb/gdbsupport: make xstrprintf and xstrvprintf return a unique_ptrAndrew Burgess1-2/+2
2021-11-15gdb: fix gdbarch_tdep ODR violationSimon Marchi1-15/+22
2021-10-29gdb: remove TYPE_FIELD_BITPOSSimon Marchi1-1/+1
2021-10-29gdb: remove TYPE_FIELD_LOC_KINDSimon Marchi1-1/+1
2021-10-28gdb: add add_setshow_prefix_cmdSimon Marchi1-16/+10
2021-10-25gdb: change functions returning value contents to use gdb::array_viewSimon Marchi1-5/+5
2021-10-03gdb: Fix comment in riscv_scan_prologueLancelot SIX1-1/+1
2021-10-03gdb: Support the c.mv insn in the riscv prologue scanner.Lancelot SIX1-1/+12
2021-08-12gdb: riscv_scan_prologue: handle LD and LW instructionsLancelot SIX1-0/+33
2021-07-16gdb: Support stepping out from signal handler on riscv*-linuxLancelot SIX1-0/+10
2021-06-29gdb: add names to unwinders, add debug messages when looking for unwinderSimon Marchi1-0/+1
2021-06-21gdb/riscv: add support for vector registers in target descriptionsAndrew Burgess1-3/+118
2021-05-12gdb: generate the prefix name for prefix commands on demandMarco Barisione1-4/+4
2021-03-25gdb/riscv: fix creating breakpoints at invalid addressesChangbin Du1-1/+0
2021-03-05gdb/riscv: make riscv target description names globalAndrew Burgess1-4/+10
2021-02-24gdb/riscv: select rv32 target by default when requestedAndrew Burgess1-15/+13
2021-02-19RISC-V: PR27158, fixed UJ/SB types and added CSS/CL/CS types for .insn.Nelson Chu1-12/+12
2021-01-19trad-frame cleanupsLuis Machado1-5/+4
2021-01-18gdb/riscv: use a single regset supply function for riscv fbsd & linuxAndrew Burgess1-0/+50
2021-01-04Refactor struct trad_frame_saved_regsLuis Machado1-2/+3
2021-01-01Update copyright year range in all GDB filesJoel Brobecker1-1/+1
2020-12-02gdb/riscv: rewrite target description validation, add rv32e supportAndrew Burgess1-315/+396
2020-12-02gdb/riscv: remove csr aliases created with DECLARE_CSR_ALIASAndrew Burgess1-10/+0
2020-12-02gdb/riscv: place unknown csrs into the correct register groupsAndrew Burgess1-7/+27
2020-11-11gdb/riscv: add ability to decode dwarf CSR numbersAndrew Burgess1-0/+3
2020-11-02gdb, gdbserver, gdbsupport: fix leading space vs tabs issuesSimon Marchi1-131/+131
2020-11-02gdb/riscv: read frame base register as unsigned in the unwinderAndrew Burgess1-1/+1
2020-09-17Change management of tdesc_arch_dataTom Tromey1-11/+8
2020-09-17gdb/riscv: fix decode of c.sdsp instructionChungyi Chi1-1/+1
2020-09-14gdb: remove TYPE_VECTORSimon Marchi1-2/+2
2020-09-14gdb: add type::is_vector / type::set_is_vectorSimon Marchi1-1/+1
2020-09-14gdb: remove TYPE_VARARGSSimon Marchi1-1/+1
2020-06-25gdb/riscv: Loop over all registers for 'info all-registers'Andrew Burgess1-1/+1
2020-06-25gdb/riscv: Record information about unknown tdesc registersAndrew Burgess1-1/+109
2020-06-25gdb/riscv: Improve support for matching against target descriptionsAndrew Burgess1-142/+193
2020-06-25gdb/riscv: Take CSR names from target descriptionAndrew Burgess1-29/+46
2020-06-25gdb/riscv: Fix whitespace errorAndrew Burgess1-2/+2
2020-06-25gdb/riscv: Improved register alias name creationAndrew Burgess1-29/+66
2020-06-08gdb: remove TYPE_FIELD_TYPE macroSimon Marchi1-6/+6
2020-05-22gdb: remove TYPE_NFIELDS macroSimon Marchi1-4/+4
2020-05-20[PATCH v2 0/9] RISC-V: Support version controling for ISA standard extensions...Nelson Chu1-3/+3
2020-05-16gdb: remove TYPE_NAME macroSimon Marchi1-2/+2
2020-05-16gdb: add type::name / type::set_nameSimon Marchi1-1/+1
2020-05-14gdb: remove TYPE_CODE macroSimon Marchi1-20/+20
2020-04-17Replace most calls to help_list and cmd_show_listTom Tromey1-50/+14
2020-03-25gdb/riscv: Apply NaN boxing when writing return values into registersAndrew Burgess1-29/+40
generated by cgit v1.1 at 2024-11-24 22:55:18 +0000