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2000-07-30Protoization.Kevin Buettner1-9/+4
2000-07-11* mips-tdep.c: General cleanup. Delete all #if 0 code. ConvertAndrew Cagney1-361/+180
all old style K&R function definitions to ISO-C. (struct gdbarch_tdep): Add mips_abi_string. (mips_gdbarch_init): Initialize. (mips_dump_tdep): Print mips_abi_string and other values. (mips_push_arguments): Add more detailed tracing.
2000-07-11Force MIPS to sign-extend any addresses read from registers.Andrew Cagney1-22/+30
2000-07-11Move the ``set mask-address'' command to remote-mips.c. DisableAndrew Cagney1-15/+71
address masking in mips-tdep.c.
2000-07-10* mips-tdep.c (mips_push_arguments): Always align struct_addr on aAndrew Cagney1-3/+8
16 byte boundary. Align allocated argument space using MIPS_STACK_ARGSIZE. Reserve space on stack for the struct return and floating-point registers. Use fp_register_arg_p to determine if float_argreg should be aligned.
2000-07-07More mult-arch conversions: IEEE_FLOAT, SKIP_PROLOGUE,Andrew Cagney1-29/+26
SAVED_PC_AFTER_CALL, DECR_PC_AFTER_BREAK, BREAKPOINT_FROM_PC, INNER_THAN.
2000-07-062000-07-06 Michael Snyder <msnyder@cleaver.cygnus.com>Michael Snyder1-3/+5
* mips-tdep.c: Replace '16' with bfd_mach_mips16 where appropriate.
2000-06-23For EABI, start allocting space on the stack when the registers areAndrew Cagney1-11/+16
full. Not when the number of args == 8.
2000-06-23When FP registers are full, store FP arguments on stack and not inAndrew Cagney1-12/+29
integer registers.
2000-06-17Add ``set debug mips'' command. Add much debugging.Andrew Cagney1-11/+91
2000-06-17For MIPS_EABI, squeeze simple floating point structs into an FP register.Andrew Cagney1-1/+8
2000-06-17EABI64 was selecting EABI32Andrew Cagney1-1/+1
2000-06-12Multi-arch GDB_TARGET_IS_MIPS64.Andrew Cagney1-23/+36
2000-06-12Print all known but not yet multi-arched values.Andrew Cagney1-7/+328
2000-06-10Re-implement gdbach_dump() so that it prints out the macro values.Andrew Cagney1-58/+76
Add ``maint print arch'' command. Add ``gdbarch_register()'' function that also takes gdbarch_dump_tdep(). Use in mips-tdep.c.
2000-06-08MIPS is always multi-arch enabled.Andrew Cagney1-1/+25
2000-06-08Delete MIPS_DEFAULT_FPU from config/mips/*.hAndrew Cagney1-0/+9
2000-06-08Change signature of function add_set_enum_cmd() so that it usesAndrew Cagney1-6/+6
constant character pointers. Update everything. As a consequence fix infrun's follow-fork plugging a small memory leak.
2000-05-28PARAMS removal.Kevin Buettner1-23/+23
2000-05-16Fix signature of add_set_enum_cmd. Change VAR parameter to char**.Andrew Cagney1-5/+5
Cleanup signature of add_set_cmd. Change VAR parameter to void*.
2000-05-12Handle case of 32 ABI saving 32 bit registers on stack when targetAndrew Cagney1-1/+67
has 64 bit ISA.
2000-05-12Fix tipo 32->64 in MIPS_EABI.Andrew Cagney1-1/+1
2000-05-11Add preliminary support for IRIX's n32 abi to the MIPS's multi-arch code.Andrew Cagney1-59/+115
2000-05-08Move some of the MIPS n32 ABI configuration options into the mipsAndrew Cagney1-54/+96
multi-arch vector.
2000-04-27Include "arch-utils.h".Andrew Cagney1-0/+1
2000-04-13* mips-tdep.c (do_fp_register_row): copy the number of bytesDJ Delorie1-2/+2
allocated, not the size of the pointer.
2000-04-09Rename gdbarch-utils.[hc] to arch-utils.[hc].Andrew Cagney1-12/+114
2000-02-22Bring COERCE_FLOAT_TO_DOUBLE under gdbarch's control.Jim Blandy1-0/+19
* valops.c (COERCE_FLOAT_TO_DOUBLE): Rework definition to be more function-like. (default_coerce_float_to_double, standard_coerce_float_to_double): New functions. (value_arg_coerce): Adjust for new definition. * value.h (default_coerce_float_to_double, standard_coerce_float_to_double): New declarations for the above. * gdbarch.sh (coerce_float_to_double): New entry, replacing macro. * gdbarch.c, gdbarch.h: Regenerated. * tm-alpha.h, tm-fr30.h, tm-m32r.h, tm-mips.h, tm-hppa.h, tm-rs6000.h, tm-sh.h, tm-sparc.h (COERCE_FLOAT_TO_DOUBLE): Change definitions. * mips-tdep.c (mips_coerce_float_to_double): Supply our own custom function here. (mips_gdbarch_init): Install that as our coerce_float_to_double function.
1999-12-22import gdb-1999-12-21 snapshotJason Molenda1-2/+13
1999-12-14import gdb-1999-12-13 snapshotJason Molenda1-1/+1
1999-12-07import gdb-1999-12-06 snapshotJason Molenda1-0/+311
1999-10-05import gdb-1999-10-04 snapshotJason Molenda1-1/+2
1999-09-09import gdb-1999-09-08 snapshotStan Shebs1-6/+4
1999-08-23import gdb-1999-08-23 snapshotJason Molenda1-2/+7
1999-07-12import gdb-1999-07-12 snapshotJason Molenda1-3/+80
1999-07-07import gdb-1999-07-07 post reformatJason Molenda1-887/+982
1999-07-07import gdb-1999-07-07 pre reformatJason Molenda1-0/+2
1999-06-14import gdb-1999-06-14 snapshotJason Molenda1-2/+9
1999-06-07import gdb-1999-06-07 snapshotJason Molenda1-22/+48
1999-05-11import gdb-1999-05-10Stan Shebs1-12/+20
1999-04-26import gdb-19990422 snapshotStan Shebs1-52/+229
1999-04-16Initial creation of sourceware repositorygdb-4_18-branchpointStan Shebs1-0/+3259
1999-04-16Initial creation of sourceware repositoryStan Shebs1-3496/+0
1998-12-28hp merge changes -- too numerous to mention here; see ChangeLog andDavid Taylor1-8/+7
ChangeLog-gdbtk for details.
1998-12-19 * mips-tdep.c (mips32_heuristic_proc_desc): Clear temp_saved_regsStu Grossman1-6/+9
on restart. Fixes problem with backtracing through functions that use virtual frame pointers.
1998-12-18Missed this file:Andrew Cagney1-0/+1
* config/mips/tm-mips.h (enum mips_fpu_type, mips_fpu): Move to mips-tdep.c.
1998-12-18CARP/vr4xxx:Andrew Cagney1-90/+171
Rewrite ``set mipsfpu'' command so that it works with the multi-arch framework. For vr4111 and vr4121 disable the FPU.
1998-12-18CARP:Andrew Cagney1-12/+30
Pass gdbarch_info by value to the arch init function. Review doco. Update mips-tdep.c
1998-12-16CARP:Andrew Cagney1-0/+127
For MIPS, multi-arch MIPS_EABI, MIPS_LAST_FP_ARG_REGNUM, MIPS_LAST_ARG_REGNUM.
1998-12-12CARP: Mechanism to replace EXTRA_FRAME_INFO.Andrew Cagney1-23/+17
Add two pointers (saved_regs, extra_info) to struct frame_info. Introduce new macro FRAME_INIT_SAVED_REGS which replaces FRAME_FIND_SAVED_REGS. Document. Use in mn10300 and rs6000 targets. Fix side effects on ALPHA, MIPS, Z8K and SPARC targets.
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