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2020-06-25gdb/riscv: Remove CSR feature fileAndrew Burgess6-986/+0
There is currently a bug in the RISC-V CSR/FPU feature files. The CSRs containing the FPU status registers are mentioned in both the FPU feature file and the CSR feature file. My original thinking when adding the FPU feature file was that it made more sense to group the FPU status registers with the other FPU state. This opened up the possibility of debugging very simple (possibly simulator only) targets that had little more than CPU and FPU available for GDB to access. When I then added code to automatically generate the CSR XML file I forgot to filter out the FPU status CSRs, so these registers were mentioned twice. Now for GDB's default RISC-V target descriptions this doesn't actually matter. I did consider adding the CSRs to the default target description, but in the end I didn't bother. The reasoning again was simplicity; the default target description is only to be used when the target doesn't supply its own description, and NOT supplying the CSRs actually serves to encourage targets to supply an accurate description. Combine this with the fact that the CSRs change from revision to revision, sometimes in non-backward compatible ways, then having a "default" set of CSRs just feels like a path to confusion and complaints. However, having a broken CSR XML file in the GDB source tree has had one negative effect, QEMU has copied this file into its source tree, and is using this as its description that it passes to GDB. That is QEMU announces the FPU status registers twice, once in the FPU feature, and once in the CSR feature. This commit starts along the path back to sanity by deleting the default CSR XML files from within GDB. These files were not used in any way by current GDB, so there is absolutely no loss of functionality with this change. gdb/ChangeLog: * features/Makefile: Remove all references to the deleted files below. * features/riscv/32bit-csr.c: Deleted. * features/riscv/32bit-csr.xml: Deleted. * features/riscv/64bit-csr.c: Deleted. * features/riscv/64bit-csr.xml: Deleted. * features/riscv/rebuild-csr-xml.sh: Deleted.
2020-06-17gdb, gdbserver: remove ARM regdat filesSimon Marchi1-3/+1
This patch removes the leftover regformats .dat files for the arm architecture. There are no longer relevant, since the arm architecture has been converted to use feature-based target-descriptions. These .dat files are used by GDBserver ports that still use static target descriptions. These .dat files are generated from corresponding .xml files in the features directory. And since the corresponding .xml files for these arm .dat files don't exist anymore, it is impossible to re-generated them. If you delete these .dat files and type "make" in the features directory, you'll get: make: *** No rule to make target '../regformats/arm/arm-with-iwmmxt.dat', needed by 'all'. Stop. So it removes the entries in the `WHICH` variable of gdb/features/Makefile. Finally, it removes the rule in gdbserver/Makefile to generate .cc files from `../gdb/regformats/arm/%.dat`. gdb/ChangeLog: * features/Makefile (WHICH): Remove arm files. * regformats/arm/arm-with-iwmmxt.dat: Remove. * regformats/arm/arm-with-neon.dat: Remove. * regformats/arm/arm-with-vfpv2.dat: Remove. * regformats/arm/arm-with-vfpv3.dat: Remove. gdbserver/ChangeLog: * Makefile.in (%-generated.cc: ../gdb/regformats/arm/%.dat): Remove. Change-Id: I3b7d989c50e2cb92235c1f7c7071a26839d84c78
2020-06-17gdb/features: remove rx.xml from XMLTOC listSimon Marchi1-1/+0
When trying to run `make` in the features directory, in a clean repo, we get: Makefile:254: warning: overriding recipe for target 'rx.c' Makefile:250: warning: ignoring old recipe for target 'rx.c' make: Nothing to be done for 'all'. The warnings come from the fact that `rx.xml` is present in two lists, causing two `rx.c` targets to be defined. It is ok for it to be in the FEATURES_XMLFILES list, as this architecture uses the "feature-based" target-descriptions. It shouldn't be in the XMLTOC list, as this is for architectures that define complete/static target descriptions as XML files. gdb/ChangeLog: * features/Makefile (XMLTOC): Remove rx.xml. Change-Id: Iada4ab54b3d4542588fac543d16ee35a92537319
2020-06-12RISC-V: Update the rebuild-csr-xml.sh.Nelson Chu1-2/+2
We add new arguments defined and aborted verisons for DECLARE_CSR to support privileged versions controling in binutils. Therefore, the rebuild-csr-xml.sh should be updated, too. gdb/ * features/riscv/rebuild-csr-xml.sh: Updated.
2020-03-30RISC-V: Update CSR to privileged spec 1.11.Nelson Chu2-4/+6
gas/ * testsuite/gas/riscv/alias-csr.d: Move this to priv-reg-pseudo. * testsuite/gas/riscv/alias-csr.s: Likewise. * testsuite/gas/riscv/no-aliases-csr.d: Move this to priv-reg-pseudo-noalias. * testsuite/gas/riscv/bad-csr.d: Rename to priv-reg-fail-nonexistent. * testsuite/gas/riscv/bad-csr.l: Likewise. * testsuite/gas/riscv/bad-csr.s: Likewise. * testsuite/gas/riscv/satp.d: Removed. Already included in priv-reg. * testsuite/gas/riscv/satp.s: Likewise. * testsuite/gas/riscv/priv-reg-pseudo.d: New testcase for all pseudo csr instruction, including alias-csr testcase. * testsuite/gas/riscv/priv-reg-pseudo.s: Likewise. * testsuite/gas/riscv/priv-reg-pseudo-noalias.d: New testcase for all pseudo instruction with objdump -Mno-aliases. * testsuite/gas/riscv/priv-reg-fail-nonexistent.d: New testcase. * testsuite/gas/riscv/priv-reg-fail-nonexistent.l: Likewise. * testsuite/gas/riscv/priv-reg-fail-nonexistent.s: Likewise. * testsuite/gas/riscv/priv-reg.d: Update CSR to 1.11. * testsuite/gas/riscv/priv-reg.s: Likewise. * testsuite/gas/riscv/priv-reg-fail-rv32-only.l: Likewise. * testsuite/gas/riscv/csr-dw-regnums.d: Likewise. * testsuite/gas/riscv/csr-dw-regnums.s: Likewise. include/ * opcode/riscv-opc.h: Update CSR to 1.11. gdb/ * features/riscv/32bit-csr.xml: Regenerated. * features/riscv/64bit-csr.xml: Regenerated.
2020-03-16arc: Migrate to new target featuresAnton Kolesov13-331/+343
This patch replaces usage of target descriptions in ARC, where the whole description is fixed in XML, with new target descriptions where XML describes individual features, and GDB assembles those features into actual target description. v2: Removed arc.c from ALLDEPFILES in gdb/Makefile.in. Removed vim modeline from arc-tdep.c to have it in a separate patch. Removed braces from one line "if/else". Undid the type change for "jb_pc" (kept it as "int"). Joined the unnecessary line breaks into one line. No more moving around arm targets in gdb/features/Makefile. Changed pattern checking for ARC features from "arc/{aux,core}" to "arc/". v3: Added include gaurds to arc.h. Added arc_read_description to _create_ target descriptions less. v4: Got rid of ARC_SYS_TYPE_NONE. Renamed ARC_SYS_TYPE_INVALID to ARC_SYS_TYPE_NUM. Fixed a few indentations/curly braces. Converted arc_sys_type_to_str from a macro to an inline function. gdb/ChangeLog: 2020-03-16 Anton Kolesov <anton.kolesov@synopsys.com> Shahab Vahedi <shahab@synopsys.com> * Makefile.in: Add arch/arc.o * configure.tgt: Likewise. * arc-tdep.c (arc_tdesc_init): Use arc_read_description. (_initialize_arc_tdep): Don't initialize old target descriptions. (arc_read_description): New function to cache target descriptions. * arc-tdep.h (arc_read_description): Add proto type. * arch/arc.c: New file. * arch/arc.h: Likewise. * features/Makefile: Replace old target descriptions with new. * features/arc-arcompact.c: Remove. * features/arc-arcompact.xml: Likewise. * features/arc-v2.c: Likewise * features/arc-v2.xml: Likewise * features/arc/aux-arcompact.xml: New file. * features/arc/aux-v2.xml: Likewise. * features/arc/core-arcompact.xml: Likewise. * features/arc/core-v2.xml: Likewise. * features/arc/aux-arcompact.c: Generate. * features/arc/aux-v2.c: Likewise. * features/arc/core-arcompact.c: Likewise. * features/arc/core-v2.c: Likewise. * target-descriptions (maint_print_c_tdesc_cmd): Support ARC features.
2020-02-20RISC-V: Support the ISA-dependent CSR checking.Nelson Chu2-66/+9
According to the riscv privilege spec, some CSR are only valid when rv32 or the specific extension is set. We extend the DECLARE_CSR and DECLARE_CSR_ALIAS to record more informaton we need, and then check whether the CSR is valid according to these information. We report warning message when the CSR is invalid, so we have a choice between error and warning by --fatal-warnings option. Also, a --no-warn/-W option is used to turn the warnings off, if people don't want the warnings. gas/ * config/tc-riscv.c (enum riscv_csr_class): New enum. Used to decide whether or not this CSR is legal in the current ISA string. (struct riscv_csr_extra): New structure to hold all extra information of CSR. (riscv_init_csr_hash): New function. According to the DECLARE_CSR and DECLARE_CSR_ALIAS, insert CSR extra information into csr_extra_hash. Call hash_reg_name to insert CSR address into reg_names_hash. (md_begin): Call riscv_init_csr_hashes for each DECLARE_CSR. (reg_csr_lookup_internal, riscv_csr_class_check): New functions. Decide whether the CSR is valid according to the csr_extra_hash. (init_opcode_hash): Update 'if (hash_error != NULL)' as hash_error is not a boolean. This is same as riscv_init_csr_hash, so keep the consistent usage. * testsuite/gas/riscv/csr-dw-regnums.d: Add -march=rv32if option. * testsuite/gas/riscv/priv-reg.d: Add f-ext by -march option. * testsuite/gas/riscv/priv-reg-fail-fext.d: New testcase. The source file is `priv-reg.s`, and the ISA is rv32i without f-ext, so the f-ext CSR are not allowed. * testsuite/gas/riscv/priv-reg-fail-fext.l: Likewise. * testsuite/gas/riscv/priv-reg-fail-rv32-only.d: New testcase. The source file is `priv-reg.s`, and the ISA is rv64if, so the rv32-only CSR are not allowed. * testsuite/gas/riscv/priv-reg-fail-rv32-only.l: Likewise. include/ * opcode/riscv-opc.h: Extend DECLARE_CSR and DECLARE_CSR_ALIAS to record riscv_csr_class. opcodes/ * riscv-dis.c (print_insn_args): Updated since the DECLARE_CSR is changed. gdb/ * riscv-tdep.c: Updated since the DECLARE_CSR is changed. * riscv-tdep.h: Likewise. * features/riscv/rebuild-csr-xml.sh: Generate the 64bit-csr.xml without rv32-only CSR. * features/riscv/64bit-csr.xml: Regernated. binutils/ * dwarf.c: Updated since the DECLARE_CSR is changed.
2020-01-01Update copyright year range in all GDB files.Joel Brobecker177-177/+177
gdb/ChangeLog: Update copyright year range in all GDB files.
2019-10-16Create xml-builtin.h to declare xml_builtinsChristian Biesinger1-0/+2
xml-builtin.c only has character arrays and no dependencies, so this creates a simple header file for that purpose so that gdbserver can include that instead of re-declaring xml_builtin. Despite the name, feature_to_c.sh is already specific to xml_builtins (it hardcodes the variable name), so making it always output the include for xml-builtin.h seems fine. gdb/ChangeLog: 2019-10-16 Christian Biesinger <cbiesinger@google.com> * Makefile.in: Add xml-builtin.h. * features/feature_to_c.sh: Add an include for xml-builtin.h to ensure that the compiler checks that the types match. * xml-builtin.h: New file. * xml-support.c (fetch_xml_builtin): Add missing const. * xml-support.h: Remove declaration of xml_builtins. gdb/gdbserver/ChangeLog: 2019-10-16 Christian Biesinger <cbiesinger@google.com> * server.c: Include xml-builtin.h. (get_xml_features): Don't declare xml_builtins here. Change-Id: I806ef0851c43ead90b545a11794e41f5e5178436
2019-09-20Remove Cell Broadband Engine debugging supportUlrich Weigand5-367/+1
This patch implements removal of Cell/B.E. support, including - Support for the spu-*-* target - Support for native stand-alone SPU debugging - Support for integrated debugging of combined PPU/SPU applications - Remote debugging (gdbserver) support for all the above. The patch also removes the TARGET_OBJECT_SPU target object type, as this is available only on Cell/B.E. targets, including - Native Linux support - Core file support (including core file generation) - Remote target support, including removal of the qXfer:spu:read and qXfer:spu:write remote protocal packets and associated support in gdbserver. gdb/ChangeLog 2019-09-20 Ulrich Weigand <uweigand@de.ibm.com> * NEWS: Mention that Cell/B.E. debugging support was removed. * MAINTAINERS: Remove spu target. * config/djgpp/fnchange.lst: Remove entries for removed files. * Makefile.in (ALL_TARGET_OBS): Remove solib-spu.o, spu-multiarch.o, and spu-tdep.o. (HFILES_NO_SRCDIR): Remove solib-spu.h and spu-tdep.h. (ALLDEPFILES): Remove solib-spu.c, spu-linux-nat.c, spu-multiarch.c, and spu-tdep.c. * spu-linux-nat.c: Remove file. * spu-multiarch.c: Remove file. * spu-tdep.c: Remove file. * spu-tdep.h: Remove file. * solib-spu.c: Remove file. * solib-spu.h: Remove file. * configure.host (powerpc64*-*-linux*): Remove Cell/B.E. support. * configure.nat (spu-linux): Remove. * configure.tgt (powerpc*-*-linux*): Remove solib-spu.o and solib-multiarch.o from gdb_target_obs. (spu*-*-*): Remove. * arch/ppc-linux-common.h (struct ppc_linux_features): Remove "cell" feature flag. (ppc_linux_no_features): Update. * arch/ppc-linux-common.c (ppc_linux_match_description): Remove Cell/B.E. support. * arch/ppc-linux-tdesc.h (tdesc_powerpc_cell32l): Remove declaration. (tdesc_powerpc_cell64l): Likewise. * nat/ppc-linux.h (PPC_FEATURE_CELL): Remove. * ppc-linux-nat.c (ppc_linux_nat_target::read_description): Remove Cell/B.E. support. * ppc-linux-tdep.h: Do not include "solib-spu.h" or "spu-tdep.h". Do not include "features/rs6000/powerpc-cell32l.c" or "features/rs6000/powerpc-cell64l.c". (ppc_linux_spu_section): Remove. (ppc_linux_core_read_description): Remove Cell/B.E. support. (spe_context_objfile, spe_context_lm_addr, spe_context_offset, spe_context_cache_ptid, spe_context_cache_ptid): Remove. (ppc_linux_spe_context_lookup): Remove. (ppc_linux_spe_context_inferior_created): Remove. (ppc_linux_spe_context_solib_loaded): Remove. (ppc_linux_spe_context_solib_unloaded): Remove. (ppc_linux_spe_context): Remove. (struct ppu2spu_cache): Remove. (ppu2spu_prev_arch, ppu2spu_this_id, ppu2spu_prev_register): Remove. (struct ppu2spu_data): Remove. (ppu2spu_unwind_register, ppu2spu_sniffer, ppu2spu_dealloc_cache, ppu2spu_unwind): Remove. (ppc_linux_init_abi): Remove Cell/B.E. support. * rs6000-tdep.h (rs6000_gdbarch_init): Remove Cell/B.E. support. * features/Makefile (rs6000/powerpc-cell32l-expedite): Remove. (rs6000/powerpc-cell64l-expedite): Likewise (WHICH): Remove rs6000/powerpc-cell32l and rs6000/powerpc-cell64l. (XMLTOC): Remove rs6000/powerpc-cell32l.xml and rs6000/powerpc-cell64l.xml. * features/rs6000/powerpc-cell32l.xml: Remove. * features/rs6000/powerpc-cell64l.xml: Likewise. * features/rs6000/powerpc-cell32l.c: Remove generated file. * features/rs6000/powerpc-cell64l.c: Likewise. * regformats/rs6000/powerpc-cell32l.dat: Remove generated file. * regformats/rs6000/powerpc-cell64l.dat: Likewise. * regformats/reg-spu.dat: Remove. * target.h (enum target_object): Remove TARGET_OBJECT_SPU. * corelow.c (struct spuid_list): Remove. (add_to_spuid_list): Remove. (core_target::xfer_partial): Remove support for TARGET_OBJECT_SPU. * remote.c (PACKET_qXfer_spu_read, PACKET_qXfer_spu_write): Remove. (remote_protocol_features): Remove associated entries. (_initialize_remote): No longer initialize them. (remote_target::xfer_partial): Remove support for TARGET_OBJECT_SPU. * linux-nat.c (SPUFS_MAGIC): Remove. (linux_proc_xfer_spu): Remove. (spu_enumerate_spu_ids): Remove. (linux_nat_target::xfer_partial): Remove support for TARGET_OBJECT_SPU. * linux-tdep.c (-linux_spu_make_corefile_notes): Remove. (linux_make_corefile_notes): No longer call it. * regcache.c (cooked_read_test): Remove bfd_arch_spu special case. (cooked_write_test): Likewise. gdb/doc/ChangeLog 2019-09-20 Ulrich Weigand <uweigand@de.ibm.com> * doc/gdb.texinfo (Remote Configuration): Remove documentation for qXfer:spu:read and qXfer:spu:write. (General Query Packets): Likewise. (Cell Broadband Engine SPU architecture): Remove subsection. gdb/gdbserver/ChangeLog 2019-09-20 Ulrich Weigand <uweigand@de.ibm.com> * configure.srv (ipa_ppc_linux_regobj): Remove powerpc-cell32l-ipa.o and powerpc-cell64l-ipa.o. (powerpc*-*-linux*): Remove powerpc-cell32l.o and powerpc-cell64l.o from srv_regobj. Remove rs6000/powerpc-cell32l.xml and rs6000/powerpc-cell64l.xml from srv_xmlfiles. (spu*-*-*): Remove. * spu-low.c: Remove file. * linux-ppc-low.c (INSTR_SC, NR_spu_run): Remove. (parse_spufs_run): Remove. (ppc_get_pc): Remove Cell/B.E. support. (ppc_set_pc): Likewise. (ppc_breakpoint_at): Likewise. (ppc_arch_setup): Likewise. (ppc_get_ipa_tdesc_idx): Do not handle tdesc_powerpc_cell64l or tdesc_powerpc_cell32l. (initialize_low_arch): Do not call init_registers_powerpc_cell64l or init_registers_powerpc_cell32l. * linux-ppc-ipa.c (get_ipa_tdesc): Do not handle PPC_TDESC_CELL. (initialize_low_tracepoint): Do not call init_registers_powerpc_cell64l or init_registers_powerpc_cell32l. * linux-ppc-tdesc-init.h (PPC_TDESC_CELL): Mark as unused. (init_registers_powerpc_cell32l): Remove prototype. (init_registers_powerpc_cell64l): Likewise. * target.h (struct target_ops): Remove qxfer_spu member. * server.c (handle_qxfer_spu): Remove. (qxfer_packets): Remove entry for "spu". (handle_query): No longer support qXfer:spu:read or qXfer:spu:write. * linux-low.c (SPUFS_MAGIC): Remove. (spu_enumerate_spu_ids): Remove. (linux_qxfer_spu): Remove. (linux_target_ops): Remove qxfer_spu member. * lynx-low.c (lynx_target_ops): Remove qxfer_spu member. * nto-low.c (nto_target_ops): Remove qxfer_spu member. * win32-low.c (win32_target_ops): Remove qxfer_spu member. gdb/testsuite/ChangeLog 2019-09-20 Ulrich Weigand <uweigand@de.ibm.com> * gdb.arch/spu-info.exp: Remove file. * gdb.arch/spu-info.c: Remove file. * gdb.arch/spu-ls.exp: Remove file. * gdb.arch/spu-ls.c: Remove file. * gdb.asm/asm-source.exp: Remove support for spu*-*-*. * gdb.asm/spu.inc: Remove file. * gdb.base/dump.exp: Remove support for spu*-*-*. * gdb.base/stack-checking.exp: Likewise. * gdb.base/overlays.exp: Likewise. * gdb.base/ovlymgr.c: Likewise. * gdb.base/spu.ld: Remove file. * gdb.cp/bs15503.exp: Remove support for spu*-*-*. * gdb.cp/cpexprs.exp: Likewise. * gdb.cp/exception.exp: Likewise. * gdb.cp/gdb2495.exp: Likewise. * gdb.cp/mb-templates.exp: Likewise. * gdb.cp/pr9167.exp: Likewise. * gdb.cp/userdef.exp: Likewise. * gdb.xml/tdesc-regs.exp: Remove support for spu*-*-*. * gdb.cell: Remove directory. * lib/cell.exp: Remove file.
2019-08-25Convert the RX target to make use of target descriptions.Yoshinori Sato3-0/+156
gdb/ChangeLog 2019-08-25 Yoshinori Sato <ysato@users.sourceforge.jp> * gdb/rx-tdep.c (rx_register_names): New. (rx_register_name): Delete. (rx_psw_type): Delete. (rx_fpsw_type): Delete. (rx_register_type): Delete. (rx_gdbarch_init): Convert target-descriptions. (_initialize_rx_tdep): Add initialize_tdesc_rx. * gdb/features/Makefile: Add rx.xml. * gdb/features/rx.xml: New. * gdb/features/rx.c: Generated. * gdb/NEWS: Mention target description support. gdb/doc/ChangeLog: 2019-08-25 Yoshinori Sato <ysato@users.sourceforge.jp> * gdb.texinfo (Standard Target Features): Add RX Features sub-section.
2019-07-19Arm: Remove unused feature files and testsAlan Hayward14-549/+0
Remove the xml tests. Now that it has been proven the new descriptions are identical, there is no need to keep testing that. Also, it would prevent the old xml files from being removed. Remove the old xml files from gdbserver and delete them. gdb/ChangeLog: * arm-tdep.c (_initialize_arm_tdep): Remove xml tests. * features/arm/arm-with-iwmmxt.c: Remove. * features/arm/arm-with-iwmmxt.xml: Remove. * features/arm/arm-with-m-fpa-layout.c: Remove. * features/arm/arm-with-m-fpa-layout.xml: Remove. * features/arm/arm-with-m-vfp-d16.c: Remove. * features/arm/arm-with-m-vfp-d16.xml: Remove. * features/arm/arm-with-m.c: Remove. * features/arm/arm-with-m.xml: Remove. * features/arm/arm-with-neon.c: Remove. * features/arm/arm-with-neon.xml: Remove. * features/arm/arm-with-vfpv2.c: Remove. * features/arm/arm-with-vfpv2.xml: Remove. * features/arm/arm-with-vfpv3.c: Remove. * features/arm/arm-with-vfpv3.xml: Remove. gdb/gdbserver/ChangeLog: 2019-07-05 Alan Hayward <alan.hayward@arm.com> * configure.srv: Remove Arm xml files.
2019-07-10Arm: Create feature files for Arm target descriptionsAlan Hayward9-14/+312
Add Arm to the list of feature target description targets and generate the relevant C files. Add arm-m-profile-with-fpa.xml as the feature version of the exisiting arm-with-m-fpa-layout.xml. Add extra comments to the Makefile for readability. New files are not yet used. gdb/ChangeLog: * features/Makefile: Use feature target descriptions for Arm. * features/arm/arm-core.c: Generate new file. * features/arm/arm-fpa.c: Likewise. * features/arm/arm-m-profile-with-fpa.xml: Likewise. * features/arm/arm-m-profile.c: Likewise. * features/arm/arm-vfpv2.c: Likewise. * features/arm/arm-vfpv3.c: Likewise. * features/arm/xscale-iwmmxt.c: Likewise. * target-descriptions.c (maint_print_c_tdesc_cmd): Add Arm.
2019-07-10Regenerate aarch64-pauth.cAlan Hayward1-1/+0
aarch64-pauth.c was slightly out of sync with the generated version. Regenerate it. gdb/ChangeLog: * features/aarch64-pauth.c: Regenerate.
2019-07-09Rename common to gdbsupportTom Tromey30-30/+30
This is the next patch in the ongoing series to move gdbsever to the top level. This patch just renames the "common" directory. The idea is to do this move in two parts: first rename the directory (this patch), then move the directory to the top. This approach makes the patches a bit more tractable. I chose the name "gdbsupport" for the directory. However, as this patch was largely written by sed, we could pick a new name without too much difficulty. Tested by the buildbot. gdb/ChangeLog 2019-07-09 Tom Tromey <tom@tromey.com> * contrib/ari/gdb_ari.sh: Change common to gdbsupport. * configure: Rebuild. * configure.ac: Change common to gdbsupport. * gdbsupport: Rename from common. * acinclude.m4: Change common to gdbsupport. * Makefile.in (CONFIG_SRC_SUBDIR, COMMON_SFILES) (HFILES_NO_SRCDIR, stamp-version, ALLDEPFILES): Change common to gdbsupport. * aarch64-tdep.c, ada-lang.c, ada-lang.h, agent.c, alloc.c, amd64-darwin-tdep.c, amd64-dicos-tdep.c, amd64-fbsd-nat.c, amd64-fbsd-tdep.c, amd64-linux-nat.c, amd64-linux-tdep.c, amd64-nbsd-tdep.c, amd64-obsd-tdep.c, amd64-sol2-tdep.c, amd64-tdep.c, amd64-windows-tdep.c, arch-utils.c, arch/aarch64-insn.c, arch/aarch64.c, arch/aarch64.h, arch/amd64.c, arch/amd64.h, arch/arm-get-next-pcs.c, arch/arm-linux.c, arch/arm.c, arch/i386.c, arch/i386.h, arch/ppc-linux-common.c, arch/riscv.c, arch/riscv.h, arch/tic6x.c, arm-tdep.c, auto-load.c, auxv.c, ax-gdb.c, ax-general.c, ax.h, breakpoint.c, breakpoint.h, btrace.c, btrace.h, build-id.c, build-id.h, c-lang.h, charset.c, charset.h, cli/cli-cmds.c, cli/cli-cmds.h, cli/cli-decode.c, cli/cli-dump.c, cli/cli-option.h, cli/cli-script.c, coff-pe-read.c, command.h, compile/compile-c-support.c, compile/compile-c.h, compile/compile-cplus-symbols.c, compile/compile-cplus-types.c, compile/compile-cplus.h, compile/compile-loc2c.c, compile/compile.c, completer.c, completer.h, contrib/ari/gdb_ari.sh, corefile.c, corelow.c, cp-support.c, cp-support.h, cp-valprint.c, csky-tdep.c, ctf.c, darwin-nat.c, debug.c, defs.h, disasm-selftests.c, disasm.c, disasm.h, dtrace-probe.c, dwarf-index-cache.c, dwarf-index-cache.h, dwarf-index-write.c, dwarf2-frame.c, dwarf2expr.c, dwarf2loc.c, dwarf2read.c, event-loop.c, event-top.c, exceptions.c, exec.c, extension.h, fbsd-nat.c, features/aarch64-core.c, features/aarch64-fpu.c, features/aarch64-pauth.c, features/aarch64-sve.c, features/i386/32bit-avx.c, features/i386/32bit-avx512.c, features/i386/32bit-core.c, features/i386/32bit-linux.c, features/i386/32bit-mpx.c, features/i386/32bit-pkeys.c, features/i386/32bit-segments.c, features/i386/32bit-sse.c, features/i386/64bit-avx.c, features/i386/64bit-avx512.c, features/i386/64bit-core.c, features/i386/64bit-linux.c, features/i386/64bit-mpx.c, features/i386/64bit-pkeys.c, features/i386/64bit-segments.c, features/i386/64bit-sse.c, features/i386/x32-core.c, features/riscv/32bit-cpu.c, features/riscv/32bit-csr.c, features/riscv/32bit-fpu.c, features/riscv/64bit-cpu.c, features/riscv/64bit-csr.c, features/riscv/64bit-fpu.c, features/tic6x-c6xp.c, features/tic6x-core.c, features/tic6x-gp.c, filename-seen-cache.h, findcmd.c, findvar.c, fork-child.c, gcore.c, gdb_bfd.c, gdb_bfd.h, gdb_proc_service.h, gdb_regex.c, gdb_select.h, gdb_usleep.c, gdbarch-selftests.c, gdbthread.h, gdbtypes.h, gnu-nat.c, go32-nat.c, guile/guile.c, guile/scm-ports.c, guile/scm-safe-call.c, guile/scm-type.c, i386-fbsd-nat.c, i386-fbsd-tdep.c, i386-go32-tdep.c, i386-linux-nat.c, i386-linux-tdep.c, i386-tdep.c, i387-tdep.c, ia64-libunwind-tdep.c, ia64-linux-nat.c, inf-child.c, inf-ptrace.c, infcall.c, infcall.h, infcmd.c, inferior-iter.h, inferior.c, inferior.h, inflow.c, inflow.h, infrun.c, infrun.h, inline-frame.c, language.h, linespec.c, linux-fork.c, linux-nat.c, linux-tdep.c, linux-thread-db.c, location.c, machoread.c, macrotab.h, main.c, maint.c, maint.h, memattr.c, memrange.h, mi/mi-cmd-break.h, mi/mi-cmd-env.c, mi/mi-cmd-stack.c, mi/mi-cmd-var.c, mi/mi-interp.c, mi/mi-main.c, mi/mi-parse.h, minsyms.c, mips-linux-tdep.c, namespace.h, nat/aarch64-linux-hw-point.c, nat/aarch64-linux-hw-point.h, nat/aarch64-linux.c, nat/aarch64-sve-linux-ptrace.c, nat/amd64-linux-siginfo.c, nat/fork-inferior.c, nat/linux-btrace.c, nat/linux-btrace.h, nat/linux-namespaces.c, nat/linux-nat.h, nat/linux-osdata.c, nat/linux-personality.c, nat/linux-procfs.c, nat/linux-ptrace.c, nat/linux-ptrace.h, nat/linux-waitpid.c, nat/mips-linux-watch.c, nat/mips-linux-watch.h, nat/ppc-linux.c, nat/x86-dregs.c, nat/x86-dregs.h, nat/x86-linux-dregs.c, nat/x86-linux.c, nto-procfs.c, nto-tdep.c, objfile-flags.h, objfiles.c, objfiles.h, obsd-nat.c, observable.h, osdata.c, p-valprint.c, parse.c, parser-defs.h, ppc-linux-nat.c, printcmd.c, probe.c, proc-api.c, procfs.c, producer.c, progspace.h, psymtab.h, python/py-framefilter.c, python/py-inferior.c, python/py-ref.h, python/py-type.c, python/python.c, record-btrace.c, record-full.c, record.c, record.h, regcache-dump.c, regcache.c, regcache.h, remote-fileio.c, remote-fileio.h, remote-sim.c, remote.c, riscv-tdep.c, rs6000-aix-tdep.c, rust-exp.y, s12z-tdep.c, selftest-arch.c, ser-base.c, ser-event.c, ser-pipe.c, ser-tcp.c, ser-unix.c, skip.c, solib-aix.c, solib-target.c, solib.c, source-cache.c, source.c, source.h, sparc-nat.c, spu-linux-nat.c, stack.c, stap-probe.c, symfile-add-flags.h, symfile.c, symfile.h, symtab.c, symtab.h, target-descriptions.c, target-descriptions.h, target-memory.c, target.c, target.h, target/waitstatus.c, target/waitstatus.h, thread-iter.h, thread.c, tilegx-tdep.c, top.c, top.h, tracefile-tfile.c, tracefile.c, tracepoint.c, tracepoint.h, tui/tui-io.c, ui-file.c, ui-out.h, unittests/array-view-selftests.c, unittests/child-path-selftests.c, unittests/cli-utils-selftests.c, unittests/common-utils-selftests.c, unittests/copy_bitwise-selftests.c, unittests/environ-selftests.c, unittests/format_pieces-selftests.c, unittests/function-view-selftests.c, unittests/lookup_name_info-selftests.c, unittests/memory-map-selftests.c, unittests/memrange-selftests.c, unittests/mkdir-recursive-selftests.c, unittests/observable-selftests.c, unittests/offset-type-selftests.c, unittests/optional-selftests.c, unittests/parse-connection-spec-selftests.c, unittests/ptid-selftests.c, unittests/rsp-low-selftests.c, unittests/scoped_fd-selftests.c, unittests/scoped_mmap-selftests.c, unittests/scoped_restore-selftests.c, unittests/string_view-selftests.c, unittests/style-selftests.c, unittests/tracepoint-selftests.c, unittests/unpack-selftests.c, unittests/utils-selftests.c, unittests/xml-utils-selftests.c, utils.c, utils.h, valarith.c, valops.c, valprint.c, value.c, value.h, varobj.c, varobj.h, windows-nat.c, x86-linux-nat.c, xml-support.c, xml-support.h, xml-tdesc.h, xstormy16-tdep.c, xtensa-linux-nat.c, dwarf2read.h: Change common to gdbsupport. gdb/gdbserver/ChangeLog 2019-07-09 Tom Tromey <tom@tromey.com> * configure: Rebuild. * configure.ac: Change common to gdbsupport. * acinclude.m4: Change common to gdbsupport. * Makefile.in (SFILES, OBS, GDBREPLAY_OBS, IPA_OBJS) (version-generated.c, gdbsupport/%-ipa.o, gdbsupport/%.o): Change common to gdbsupport. * ax.c, event-loop.c, fork-child.c, gdb_proc_service.h, gdbreplay.c, gdbthread.h, hostio-errno.c, hostio.c, i387-fp.c, inferiors.c, inferiors.h, linux-aarch64-tdesc-selftest.c, linux-amd64-ipa.c, linux-i386-ipa.c, linux-low.c, linux-tic6x-low.c, linux-x86-low.c, linux-x86-tdesc-selftest.c, linux-x86-tdesc.c, lynx-i386-low.c, lynx-low.c, mem-break.h, nto-x86-low.c, regcache.c, regcache.h, remote-utils.c, server.c, server.h, spu-low.c, symbol.c, target.h, tdesc.c, tdesc.h, thread-db.c, tracepoint.c, win32-i386-low.c, win32-low.c: Change common to gdbsupport.
2019-07-04i386/AArch64: Remove unused xml filesAlan Hayward31-621/+1
Remove all the xml files that are no longer used by gdbserver, and remove their entries from the makefile. gdb/ChangeLog: * features/Makefile: Remove unused xml files. * features/aarch64.xml: Remove. * features/i386/amd64-avx-avx512-linux.xml: Remove. * features/i386/amd64-avx-avx512.xml: Remove. * features/i386/amd64-avx-linux.xml: Remove. * features/i386/amd64-avx-mpx-avx512-pku-linux.xml: Remove. * features/i386/amd64-avx-mpx-avx512-pku.xml: Remove. * features/i386/amd64-avx-mpx-linux.xml: Remove. * features/i386/amd64-avx-mpx.xml: Remove. * features/i386/amd64-avx.xml: Remove. * features/i386/amd64-linux.xml: Remove. * features/i386/amd64-mpx-linux.xml: Remove. * features/i386/amd64-mpx.xml: Remove. * features/i386/amd64.xml: Remove. * features/i386/i386-avx-avx512-linux.xml: Remove. * features/i386/i386-avx-avx512.xml: Remove. * features/i386/i386-avx-linux.xml: Remove. * features/i386/i386-avx-mpx-avx512-pku-linux.xml: Remove. * features/i386/i386-avx-mpx-avx512-pku.xml: Remove. * features/i386/i386-avx-mpx-linux.xml: Remove. * features/i386/i386-avx-mpx.xml: Remove. * features/i386/i386-avx.xml: Remove. * features/i386/i386-linux.xml: Remove. * features/i386/i386-mmx-linux.xml: Remove. * features/i386/i386-mmx.xml: Remove. * features/i386/i386-mpx-linux.xml: Remove. * features/i386/i386-mpx.xml: Remove. * features/i386/i386.xml: Remove. * features/i386/x32-avx-avx512-linux.xml: Remove. * features/i386/x32-avx-linux.xml: Remove. * features/i386/x32-linux.xml: Remove.
2019-06-26AArch64: Add missing CPSR flagsAlan Hayward2-4/+31
Add all the CPSR flags for Armv8.1-A through to Armv8.4-A. In addition, document all the existing flags, and remove the superfluous empty spaces. gdb/ChangeLog: * features/aarch64-core.c (create_feature_aarch64_core): Regenerate. * features/aarch64-core.xml: Add cpsr flags.
2019-05-14AArch64: Add half float view to V registersAlan Hayward3-0/+12
AArch64 can fill the vector registers with half precision floats. Add a view for this. Add builtin type ieee half and connect this to the existing floatformats_ieee_half. gdb/ChangeLog: 2019-05-14 Alan Hayward <alan.hayward@arm.com> * aarch64-tdep.c (aarch64_vnh_type): Add half view. (aarch64_vnv_type): Likewise. * target-descriptions.c (make_gdb_type): Add TDESC_TYPE_IEEE_HALF. * common/tdesc.c: Likewise. * common/tdesc.h (enum tdesc_type_kind): Likewise. * features/aarch64-fpu.c (create_feature_aarch64_fpu): Regenerate. * features/aarch64-fpu.xml: Add ieee half view. * features/aarch64-sve.c (create_feature_aarch64_fpu): Likewise. * gdbtypes.c (gdbtypes_post_init): Add builtin_half * gdbtypes.h (struct builtin_type): Likewise. (struct objfile_type): Likewise.
2019-03-28AArch64: 128bit views for SVE registersAlan Hayward1-0/+14
SVE can view Z registers as 128bit values using .q prefix. Add this view to the SVE feature. gdb/ChangeLog: * features/aarch64-sve.c (create_feature_aarch64_sve): Add q view.
2019-03-22AArch64: Add pointer authentication featureAlan Hayward3-0/+30
Pointer Authentication is a new feature in AArch64 v8.3-a. When enabled in the compiler, function return addresses will be mangled by the kernel. Add register description xml and wire up to aarch64_linux_read_description. This description includes the two pauth user registers. Nothing yet uses the feature - that is added in later patches. gdb/ChangeLog: * aarch64-linux-nat.c (aarch64_linux_nat_target::read_description): Add pauth param. * aarch64-linux-tdep.c (aarch64_linux_core_read_description): Likewise. * aarch64-tdep.c (struct target_desc): Add in pauth. (aarch64_read_description): Add pauth param. (aarch64_gdbarch_init): Likewise. * aarch64-tdep.h (aarch64_read_description): Likewise. * arch/aarch64.c (aarch64_create_target_description): Likewise. * arch/aarch64.h (aarch64_create_target_description): Likewise. * features/Makefile: Add new files. * features/aarch64-pauth.c: New file. * features/aarch64-pauth.xml: New file. gdb/doc/ChangeLog: * gdb.texinfo: Describe pauth feature. gdb/gdbserver/ChangeLog: * linux-aarch64-ipa.c (get_ipa_tdesc): Add pauth param. (initialize_low_tracepoint): Likewise. * linux-aarch64-low.c (aarch64_arch_setup): Likewise. * linux-aarch64-tdesc-selftest.c (aarch64_tdesc_test): Likewise. * linux-aarch64-tdesc.c (struct target_desc): Likewise. (aarch64_linux_read_description): Likewise. * linux-aarch64-tdesc.h (aarch64_linux_read_description): Likewise.
2019-03-12Support the fs_base and gs_base registers on i386.John Baldwin2-0/+27
As on amd64, these registers hold the base address of the fs and gs segments, respectively. For i386 these two registers are 32 bits. gdb/ChangeLog: * amd64-fbsd-nat.c (amd64_fbsd_nat_target::read_description): Update calls to i386_target_description to add 'segments' parameter. * amd64-tdep.c (amd64_init_abi): Set tdep->fsbase_regnum. Don't add segment base registers. * arch/i386.c (i386_create_target_description): Add 'segments' parameter to enable segment base registers. * arch/i386.h (i386_create_target_description): Likewise. * features/i386/32bit-segments.xml: New file. * features/i386/32bit-segments.c: Generate. * i386-fbsd-nat.c (i386_fbsd_nat_target::read_description): Update call to i386_target_description to add 'segments' parameter. * i386-fbsd-tdep.c (i386fbsd_core_read_description): Likewise. * i386-go32-tdep.c (i386_go32_init_abi): Likewise. * i386-linux-tdep.c (i386_linux_read_description): Likewise. * i386-tdep.c (i386_validate_tdesc_p): Add segment base registers if feature is present. (i386_gdbarch_init): Pass I386_NUM_REGS to set_gdbarch_num_regs. Add 'segments' parameter to call to i386_target_description. (i386_target_description): Add 'segments' parameter to enable segment base registers. (_initialize_i386_tdep) [GDB_SELF_TEST]: Add 'segments' parameter to call to i386_target_description. * i386-tdep.h (struct gdbarch_tdep): Add 'fsbase_regnum'. (enum i386_regnum): Add I386_FSBASE_REGNUM and I386_GSBASE_REGNUM. Define I386_NUM_REGS. (i386_target_description): Add 'segments' parameter to enable segment base registers. gdb/gdbserver/ChangeLog: * linux-x86-tdesc.c (i386_linux_read_description): Update call to i386_create_target_description for 'segments' parameter. * lynx-i386-low.c (lynx_i386_arch_setup): Likewise. * nto-x86-low.c (nto_x86_arch_setup): Likewise. * win32-i386-low.c (i386_arch_setup): Likewise.
2019-02-26gdb/riscv: Use legacy register numbers in default target descriptionAndrew Burgess6-10/+30
When the target description support was added to RISC-V, the register numbers assigned to the fflags, frm, and fcsr control registers in the default target descriptions didn't match the register numbers used by GDB before the target description support was added. What this means is that if a tools exists in the wild that is using hard-coded register number, setup to match GDB's old numbering, then this will have been broken (for fflags, frm, and fcsr) by the move to target descriptions. QEMU is such a tool. There are a couple of solutions that could be used to work around this issue: - The user can create their own xml description file with the register numbers setup to match their old tool, then load this by telling GDB 'set tdesc filename FILENAME'. - Update their old tool to use the newer default numbering scheme, or better yet add proper target description support to their tool. - We could have RISC-V GDB change to maintain the old defaults. This patch changes GDB back to using the old numbering scheme. This change is only visible to remote targets that don't supply their own xml description file and instead rely on GDB's default numbering. Note that even though 32bit-cpu.xml and 64bit-cpu.xml have changed, the corresponding .c file has not, this is because the numbering added to the registers in the xml files is number 0, this doesn't result in any new C code being generated . gdb/ChangeLog: * features/riscv/32bit-cpu.xml: Add register numbers. * features/riscv/32bit-fpu.c: Regenerate. * features/riscv/32bit-fpu.xml: Add register numbers. * features/riscv/64bit-cpu.xml: Add register numbers. * features/riscv/64bit-fpu.c: Regenerate. * features/riscv/64bit-fpu.xml: Add register numbers.
2019-01-01Update copyright year range in all GDB files.Joel Brobecker212-212/+212
This commit applies all changes made after running the gdb/copyright.py script. Note that one file was flagged by the script, due to an invalid copyright header (gdb/unittests/basic_string_view/element_access/char/empty.cc). As the file was copied from GCC's libstdc++-v3 testsuite, this commit leaves this file untouched for the time being; a patch to fix the header was sent to gcc-patches first. gdb/ChangeLog: Update copyright year range in all GDB files.
2018-11-21gdb/riscv: Add target description supportAndrew Burgess14-0/+1426
This commit adds target description support for riscv. I've used the split feature approach for specifying the architectural features, and the CSR feature is auto-generated from the riscv-opc.h header file. If the target doesn't provide a suitable target description then GDB will build one by looking at the bfd headers. This commit does not implement target description creation for the Linux or FreeBSD native targets, both of these will need to add read_description methods into their respective target classes, which probe the target features, and then call riscv_create_target_description to build a suitable target description. Until this is done Linux and FreeBSD will get the same default target description based on the bfd that bare-metal targets get. I've only added feature descriptions for 32 and 64 bit registers, 128 bit registers (for RISC-V) are not supported in the reset of GDB yet. This commit removes the special reading of the MISA register in order to establish the target features, this was only used for figuring out the f-register size, and even that wasn't done consistently. We now rely on the target to tell us what size of registers it has (or look in the BFD as a last resort). The result of this is that we should now support RV64 targets with 32-bit float, though I have not extensively tested this combination yet. * Makefile.in (ALL_TARGET_OBS): Add arch/riscv.o. (HFILES_NO_SRCDIR): Add arch/riscv.h. * arch/riscv.c: New file. * arch/riscv.h: New file. * configure.tgt: Add cpu_obs list of riscv, move riscv-tdep.o into this list, and add arch/riscv.o. * features/Makefile: Add riscv features. * features/riscv/32bit-cpu.c: New file. * features/riscv/32bit-cpu.xml: New file. * features/riscv/32bit-csr.c: New file. * features/riscv/32bit-csr.xml: New file. * features/riscv/32bit-fpu.c: New file. * features/riscv/32bit-fpu.xml: New file. * features/riscv/64bit-cpu.c: New file. * features/riscv/64bit-cpu.xml: New file. * features/riscv/64bit-csr.c: New file. * features/riscv/64bit-csr.xml: New file. * features/riscv/64bit-fpu.c: New file. * features/riscv/64bit-fpu.xml: New file. * features/riscv/rebuild-csr-xml.sh: New file. * riscv-tdep.c: Add 'arch/riscv.h' include. (riscv_gdb_reg_names): Delete. (csr_reggroup): New global. (struct riscv_register_alias): Delete. (struct riscv_register_feature): New structure. (riscv_register_aliases): Delete. (riscv_xreg_feature): New global. (riscv_freg_feature): New global. (riscv_virtual_feature): New global. (riscv_csr_feature): New global. (riscv_create_csr_aliases): New function. (riscv_read_misa_reg): Delete. (riscv_has_feature): Delete. (riscv_isa_xlen): Simplify, just return cached xlen. (riscv_isa_flen): Simplify, just return cached flen. (riscv_has_fp_abi): Update for changes in struct gdbarch_tdep. (riscv_register_name): Update to make use of tdesc_register_name. Look up xreg and freg names in the new globals riscv_xreg_feature and riscv_freg_feature. Don't supply csr aliases here. (riscv_fpreg_q_type): Delete. (riscv_register_type): Use tdesc_register_type in almost all cases, override the returned type in a few specific cases only. (riscv_print_one_register_info): Handle errors reading registers. (riscv_register_reggroup_p): Use tdesc_register_in_reggroup_p for registers that are otherwise unknown to GDB. Also check the csr_reggroup. (riscv_print_registers_info): Remove assert about upper register number, and use gdbarch_register_reggroup_p instead of short-cutting. (riscv_find_default_target_description): New function. (riscv_check_tdesc_feature): New function. (riscv_add_reggroups): New function. (riscv_setup_register_aliases): New function. (riscv_init_reggroups): New function. (_initialize_riscv_tdep): Add calls to setup CSR aliases, and setup register groups. Register new riscv debug variable. * riscv-tdep.h: Add 'arch/riscv.h' include. (struct gdbarch_tdep): Remove abi union, and add riscv_gdbarch_features field. Remove cached quad floating point type, and provide initialisation for double type field. * target-descriptions.c (maint_print_c_tdesc_cmd): Add riscv to the list of targets using the feature based target descriptions. * NEWS: Mention target description support. gdb/doc/ChangeLog: * gdb.texinfo (Standard Target Features): Add RISC-V Features sub-section.
2018-10-26[PowerPC] Add support for HTM registersEdjunior Barbosa Machado14-0/+1146
This patch adds support for Hardware Transactional Memory registers for the powerpc linux native and core file targets, and for the pwoerpc linux server stub. These registers include both the HTM special-purpose registers (TFHAR, TEXASR and TFIAR) as well as the set of registers that are checkpointed (saved) when a transaction is initiated, which the processor restores in the event of a transaction failure. The set of checkpointed general-purpose registers is returned by the linux kernel in the same format as the regular general-purpose registers, defined in struct pt_regs. However, the architecture specifies that only some of the registers present in pt_regs are checkpointed (GPRs 0-31, CR, XER, LR and CTR). The kernel fills the slots for MSR and NIP with other info. The other fields usually don't have meaningful values. GDB doesn't define registers that are not checkpointed in the architecture, but when generating a core file, GDB fills the slot for the checkpointed MSR with the regular MSR. These are usually similar, although some bits might be different, and in some cases the checkpointed MSR will have a value of 0 in a kernel-generated core-file. The checkpointed NIP is filled with TFHAR by GDB in the core-file, which is what the kernel does. The other fields are set to 0 by GDB. Core files generated by the kernel have a note section for checkpointed GPRs with the same size for both 32-bit and 64-bit threads, and the values for the registers of a 32-bit thread are squeezed in the first half, with no useful data in the second half. GDB generates a smaller note section for 32-bit threads, but can read both sizes. The checkpointed XER is required to be 32-bit in the target description documentation, even though the more recent ISAs define it as 64-bit wide, since the high-order 32-bits are reserved, and because in Linux there is no way to get a 64-bit checkpointed XER for 32-bit threads. If this changes in the future, the target description feature requirement can be relaxed to allow for a 64-bit checkpointed XER. Access to the checkpointed CR (condition register) can be confusing. The architecture only specifies that CR fields 1 to 7 (the 24 least significant bits) are checkpointed, but the kernel provides all 8 fields (32 bits). The value of field 0 is not masked by ptrace, so it will sometimes show the result of some kernel operation, probably treclaim., which sets this field. The checkpointed registers are marked not to be saved and restored. Inferior function calls during an active transaction don't work well, and it's unclear what should be done in this case. TEXASR and TFIAR can be altered asynchronously, during transaction failure recording, so they are also not saved and restored. For consistency neither is TFHAR. Record and replay also doesn't work well when transactions are involved. This patch doesn't address this, so the values of the HTM SPRs will sometimes be innacurate when the record/relay target is enabled. For instance, executing a "tbegin." alters TFHAR and TEXASR, but these changes are not currently recorded. Because the checkpointed registers are only available when a transaction is active (or suspended), ptrace can return ENODATA when gdb tries to read these registers and the inferior is not in a transactional state. The registers are set to the unavailable state when this happens. When gbd tries to write to one of these registers, and it is unavailable, an error is raised. The "fill" functions for checkpointed register sets in the server stub are not implemented for the same reason as for the EBB register set, since ptrace can also return ENODATA for checkpointed regsets. The same issues with 'G' packets apply here. Just like for the EBB registers, tracepoints will not mark the checkpointed registers as unavailable if the inferior was not in a transaction, so their content will also show 0 instead of <unavailable> when inspecting trace data. The new tests record the values of the regular registers before stepping the inferior through a "tbegin." instruction to start a transaction, then the checkpointed registers are checked against the recorded pre-transactional values. New values are written to the checkpointed registers and recorded, the inferior continues until the transaction aborts (which is usually immediately when it is resumed), and the regular registers are checked against the recorded values, because the abort should have reverted the registers to these values. Like for the EBB registers, target_store_registers will ignore the checkpointed registers when called with -1 as the regno argument (store all registers in one go). gdb/ChangeLog: 2018-10-26 Edjunior Barbosa Machado <emachado@linux.vnet.ibm.com> Pedro Franco de Carvalho <pedromfc@linux.ibm.com> * arch/ppc-linux-tdesc.h (tdesc_powerpc_isa207_htm_vsx32l) (tdesc_powerpc_isa207_htm_vsx64l): Declare. * arch/ppc-linux-common.h (PPC_LINUX_SIZEOF_TM_SPRREGSET) (PPC32_LINUX_SIZEOF_CGPRREGSET, PPC64_LINUX_SIZEOF_CGPRREGSET) (PPC_LINUX_SIZEOF_CFPRREGSET, PPC_LINUX_SIZEOF_CVMXREGSET) (PPC_LINUX_SIZEOF_CVSXREGSET, PPC_LINUX_SIZEOF_CPPRREGSET) (PPC_LINUX_SIZEOF_CDSCRREGSET, PPC_LINUX_SIZEOF_CTARREGSET): Define. (struct ppc_linux_features) <htm>: New field. (ppc_linux_no_features): Add initializer for htm field. * arch/ppc-linux-common.c (ppc_linux_match_description): Return new tdescs. * nat/ppc-linux.h (PPC_FEATURE2_HTM, NT_PPC_TM_CGPR) (NT_PPC_TM_CFPR, NT_PPC_TM_CVMX, NT_PPC_TM_CVSX) (NT_PPC_TM_SPR, NT_PPC_TM_CTAR, NT_PPC_TM_CPPR, NT_PPC_TM_CDSCR): Define if not already defined. * features/Makefile (WHICH): Add rs6000/powerpc-isa207-htm-vsx32l and rs6000/powerpc-isa207-htm-vsx64l. (XMLTOC): Add rs6000/powerpc-isa207-htm-vsx32l.xml and rs6000/powerpc-isa207-htm-vsx64l.xml. * features/rs6000/power-htm-spr.xml: New file. * features/rs6000/power-htm-core.xml: New file. * features/rs6000/power64-htm-core.xml: New file. * features/rs6000/power-htm-fpu.xml: New file. * features/rs6000/power-htm-altivec.xml: New file. * features/rs6000/power-htm-vsx.xml: New file. * features/rs6000/power-htm-ppr.xml: New file. * features/rs6000/power-htm-dscr.xml: New file. * features/rs6000/power-htm-tar.xml: New file. * features/rs6000/powerpc-isa207-htm-vsx32l.xml: New file. * features/rs6000/powerpc-isa207-htm-vsx64l.xml: New file. * features/rs6000/powerpc-isa207-htm-vsx32l.c: Generate. * features/rs6000/powerpc-isa207-htm-vsx64l.c: Generate. * regformats/rs6000/powerpc-isa207-htm-vsx32l.dat: Generate. * regformats/rs6000/powerpc-isa207-htm-vsx64l.dat: Generate. * ppc-linux-nat.c (fetch_register, fetch_ppc_registers): Call fetch_regset with HTM regsets. (store_register, store_ppc_registers): Call store_regset with HTM regsets. (ppc_linux_nat_target::read_description): Set htm field in the features struct if needed. * ppc-linux-tdep.c: Include features/rs6000/powerpc-isa207-htm-vsx32l.c and features/rs6000/powerpc-isa207-htm-vsx64l.c. (ppc32_regmap_tm_spr, ppc32_regmap_cgpr, ppc64_le_regmap_cgpr) (ppc64_be_regmap_cgpr, ppc32_regmap_cfpr, ppc32_le_regmap_cvmx) (ppc32_be_regmap_cvmx, ppc32_regmap_cvsx, ppc32_regmap_cppr) (ppc32_regmap_cdscr, ppc32_regmap_ctar): New globals. (ppc32_linux_tm_sprregset, ppc32_linux_cgprregset) (ppc64_be_linux_cgprregset, ppc64_le_linux_cgprregset) (ppc32_linux_cfprregset, ppc32_le_linux_cvmxregset) (ppc32_be_linux_cvmxregset, ppc32_linux_cvsxregset) (ppc32_linux_cpprregset, ppc32_linux_cdscrregset) (ppc32_linux_ctarregset): New globals. (ppc_linux_cgprregset, ppc_linux_cvmxregset): New functions. (ppc_linux_collect_core_cpgrregset): New function. (ppc_linux_iterate_over_regset_sections): Call back with the htm regsets. (ppc_linux_core_read_description): Check if the tm spr section is present and set htm in the features struct. (_initialize_ppc_linux_tdep): Call initialize_tdesc_powerpc_isa207_htm_vsx32l and initialize_tdesc_powerpc_isa207_htm_vsx64l. * ppc-linux-tdep.h (ppc_linux_cgprregset, ppc_linux_cvmxregset): Declare. (ppc32_linux_tm_sprregset, ppc32_linux_cfprregset) (ppc32_linux_cvsxregset, ppc32_linux_cpprregset) (ppc32_linux_cdscrregset, ppc32_linux_ctarregset): Declare. * ppc-tdep.h (struct gdbarch_tdep) <have_htm_spr, have_htm_core>: New fields. <have_htm_fpu, have_htm_altivec, have_htm_vsx>: Likewise. <ppc_cppr_regnum, ppc_cdscr_regnum, ppc_ctar_regnum>: Likewise. <ppc_cdl0_regnum, ppc_cvsr0_regnum, ppc_cefpr0_regnum>: Likewise. (enum) <PPC_TFHAR_REGNUM, PPC_TEXASR_REGNUM, PPC_TFIAR_REGNUM>: New enum fields. <PPC_CR0_REGNUM, PPC_CCR_REGNUM, PPC_CXER_REGNUM>: Likewise. <PPC_CLR_REGNUM, PPC_CCTR_REGNUM, PPC_CF0_REGNUM>: Likewise. <PPC_CFPSCR_REGNUM, PPC_CVR0_REGNUM, PPC_CVSCR_REGNUM>: Likewise. <PPC_CVRSAVE_REGNUM, PPC_CVSR0_UPPER_REGNUM>: Likewise. <PPC_CPPR_REGNUM, PPC_CDSCR_REGNUM>: Likewise. <PPC_CTAR_REGNUM>: Likewise. (PPC_IS_TMSPR_REGNUM, PPC_IS_CKPTGP_REGNUM, PPC_IS_CKPTFP_REGNUM) (PPC_IS_CKPTVMX_REGNUM, PPC_IS_CKPTVSX_REGNUM): Define. * rs6000-tdep.c (IS_CDFP_PSEUDOREG, IS_CVSX_PSEUDOREG) (IS_CEFP_PSEUDOREG): Define. (rs6000_register_name): Hide the upper halves of checkpointed VSX registers. Return names for the checkpointed DFP, VSX, and EFP pseudo registers. (rs6000_pseudo_register_type): Remove initial assert and raise an internal error in the else clause instead. Return types for the checkpointed DFP, VSX, and EFP pseudo registers. (dfp_pseudo_register_read, dfp_pseudo_register_write): Handle checkpointed DFP pseudo registers. (vsx_pseudo_register_read, vsx_pseudo_register_write): Handle checkpointed VSX pseudo registers. (efp_pseudo_register_read, efp_pseudo_register_write): Rename from efpr_pseudo_register_read and efpr_pseudo_register_write. Handle checkpointed EFP pseudo registers. (rs6000_pseudo_register_read, rs6000_pseudo_register_write): Handle checkpointed DFP, VSX, and EFP registers. (dfp_ax_pseudo_register_collect, vsx_ax_pseudo_register_collect) (efp_ax_pseudo_register_collect): New functions. (rs6000_ax_pseudo_register_collect): Move DFP, VSX and EFP pseudo register logic to new functions. Handle checkpointed DFP, VSX, and EFP pseudo registers. (rs6000_gdbarch_init): Look for and validate the htm features. Include checkpointed DFP, VSX and EFP pseudo-registers. * NEWS: Mention access to PPR, DSCR, TAR, EBB/PMU registers and HTM registers. gdb/gdbserver/ChangeLog: 2018-10-26 Pedro Franco de Carvalho <pedromfc@linux.ibm.com> * configure.srv (ipa_ppc_linux_regobj): Add powerpc-isa207-htm-vsx32l-ipa.o and powerpc-isa207-htm-vsx64l-ipa.o. (powerpc*-*-linux*): Add powerpc-isa207-htm-vsx32l.o and powerpc-isa207-htm-vsx64l.o to srv_regobj. Add rs6000/power-htm-spr.xml, rs6000/power-htm-core.xml, rs6000/power64-htm-core.xml, rs6000/power-htm-fpu.xml, rs6000/power-htm-altivec.xml, rs6000/power-htm-vsx.xml, rs6000/power-htm-ppr.xml, rs6000/power-htm-dscr.xml, rs6000/power-htm-tar.xml, rs6000/powerpc-isa207-htm-vsx32l.xml, and rs6000/powerpc-isa207-htm-vsx64l.xml to srv_xmlfiles. * linux-ppc-tdesc-init.h (enum ppc_linux_tdesc) <PPC_TDESC_ISA207_HTM_VSX>: New enum value. (init_registers_powerpc_isa207_htm_vsx32l) (init_registers_powerpc_isa207_htm_vsx64l): Declare. * linux-ppc-low.c (ppc_fill_tm_sprregset, ppc_store_tm_sprregset) (ppc_store_tm_cgprregset, ppc_store_tm_cfprregset) (ppc_store_tm_cvrregset, ppc_store_tm_cvsxregset) (ppc_store_tm_cpprregset, ppc_store_tm_cdscrregset) (ppc_store_tm_ctarregset): New functions. (ppc_regsets): Add entries for HTM regsets. (ppc_arch_setup): Set htm in features struct when needed. Set sizes for the HTM regsets. (ppc_get_ipa_tdesc_idx): Return PPC_TDESC_ISA207_HTM_VSX. (initialize_low_arch): Call init_registers_powerpc_isa207_htm_vsx32l and init_registers_powerpc_isa207_htm_vsx64l. * linux-ppc-ipa.c (get_ipa_tdesc): Handle PPC_TDESC_ISA207_HTM_VSX. (initialize_low_tracepoint): Call init_registers_powerpc_isa207_htm_vsx32l and init_registers_powerpc_isa207_htm_vsx64l. gdb/testsuite/ChangeLog: 2018-10-26 Pedro Franco de Carvalho <pedromfc@linux.ibm.com> * gdb.arch/powerpc-htm-regs.c: New file. * gdb.arch/powerpc-htm-regs.exp: New file. gdb/doc/ChangeLog: 2018-10-26 Pedro Franco de Carvalho <pedromfc@linux.ibm.com> * gdb.texinfo (PowerPC Features): Describe new features "org.gnu.gdb.power.htm.spr", "org.gnu.gdb.power.htm.core", "org.gnu.gdb.power.htm.fpu", "org.gnu.gdb.power.htm.altivec", "org.gnu.gdb.power.htm.vsx", "org.gnu.gdb.power.htm.ppr", "org.gnu.gdb.power.htm.dscr", "org.gnu.gdb.power.htm.tar".
2018-10-26[PowerPC] Add support for EBB and PMU registersEdjunior Barbosa Machado6-0/+59
This patch adds support for registers of the Event Based Branching and Performance Monitoring Units for the powerpc linux native and core file targets, and for the powerpc linux server stub. All three EBB registers are accessible. Only a subset of the PMU registers can be accessed through ptrace. Because of this, the PMU registers are enumerated individually in gdbarch_tdep, as opposed to having a single "have_pmu" flag. This is intended to make it easier to add additional PMU registers in the future, since checking a "have_pmu" flag elsewhere in the code would no longer be correct. The tdesc feature is named org.gnu.gdb.power.linux.pmu because of this. It's unclear if it makes sense to save and restore these registers across function calls, since some of them can be modified asynchronously. They are also not tracked in record-replay mode. The kernel can return ENODATA when ptrace is used to get the EBB registers, unless a linux performance event that uses EBB is open in the inferior. For this reason, the "fill" functions in the server stub for the ebb register sets is not implemented. Since gdbserver writes all registers in one go before resuming the inferior, this error would not be detected at the time the user tries to write to one of the registers on the client side, and gdbserver would print out warnings every time it resumes the inferior when no ebb performance event is opened, so there is currently no straightforward way to handle this case. This means the ebb registers in the client-side regcache can become dirty when the user tries to write to them, until the inferior is resumed and stopped again. A related issue is that 'G' packets used to write to unrelated registers will include bad data for the EBB registers if they are unavailable, since no register status information is included in the 'G' packet. This data won't be written to the inferior by the gdbserver stub because the "fill" functions are not implemented, and currently the gdbserver stub doesn't change the status of the registers in its own regcache in response to 'G' packets. Another limitation for the ebb registers is that traceframes don't record if registers are available or not, so if these registers are collected when a tracepoint is hit and the inferior has no ebb event opened, the user will see zero values for all of them, instead of the usual <unavailable>. Because these registers are often unavailable, trying to store them with target_store_registers with -1 for the regno argument (all registers) would almost always fail, so they are ignored in this case. gdb/ChangeLog: 2018-10-26 Edjunior Barbosa Machado <emachado@linux.vnet.ibm.com> Pedro Franco de Carvalho <pedromfc@linux.ibm.com> * arch/ppc-linux-common.h (PPC_LINUX_SIZEOF_EBBREGSET) (PPC_LINUX_SIZEOF_PMUREGSET): Declare. * nat/ppc-linux.h (PPC_FEATURE2_EBB, NT_PPC_EBB, NT_PPC_PMU): Define if not already defined. * features/rs6000/power-ebb.xml: New file. * features/rs6000/power-linux-pmu.xml: New file. * features/rs6000/powerpc-isa207-vsx32l.xml: Include ebb and pmu features. * features/rs6000/powerpc-isa207-vsx64l.xml: Likewise. * features/rs6000/powerpc-isa207-vsx32l.c: Re-generate. * features/rs6000/powerpc-isa207-vsx64l.c: Re-generate. * regformats/rs6000/powerpc-isa207-vsx32l.dat: Re-generate. * regformats/rs6000/powerpc-isa207-vsx64l.dat: Re-generate. * ppc-linux-nat.c (fetch_register, fetch_ppc_registers): Call fetch_regset with ebb and pmu regsets. (store_register, store_ppc_registers): Call store_regset with ebb and pmu regsets. (ppc_linux_nat_target::read_description): Set isa207 field in the features struct if ebb and pmu are avaiable. * ppc-linux-tdep.c (ppc32_regmap_ebb, ppc32_regmap_pmu) (ppc32_linux_ebbregset, ppc32_linux_pmuregset): New globals. (ppc_linux_iterate_over_regset_sections): Call back with the ebb and pmu regsets. (ppc_linux_core_read_description): Check if the pmu section is present and set isa207 in the features struct. * ppc-linux-tdep.h (ppc32_linux_ebbregset) (ppc32_linux_pmuregset): Declare. * ppc-tdep.h (struct gdbarch_tdep) <ppc_mmcr0_regnum>: New field. <ppc_mmcr2_regnum, ppc_siar_regnum, ppc_sdar_regnum>: New fields. <ppc_sier_regnum>: New field. (enum): <PPC_BESCR_REGNUM, PPC_EBBHR_REGNUM, PPC_EBBRR_REGNUM>: New enum values. <PPC_MMCR0_REGNUM, PPC_MMCR2_REGNUM, PPC_SIAR_REGNUM>: New enum values. <PPC_SDAR_REGNUM, PPC_SIER_REGNUM>: New enum values. (PPC_IS_EBB_REGNUM, PPC_IS_PMU_REGNUM): Define. * rs6000-tdep.c (rs6000_gdbarch_init): Look for and validate the ebb and pmu features. gdb/gdbserver/ChangeLog: 2018-10-26 Pedro Franco de Carvalho <pedromfc@linux.ibm.com> * configure.srv (powerpc*-*-linux*): Add rs6000/power-ebb.xml and rs6000/power-linux-pmu.xml to srv_xmlfiles. * linux-ppc-low.c (ppc_store_ebbregset, ppc_fill_pmuregset) (ppc_store_pmuregset): New functions. (ppc_regsets): Add entries for ebb and pmu regsets. (ppc_arch_setup): Set isa207 in features struct if the ebb and pmu regsets are available. Set sizes for these regsets. gdb/doc/ChangeLog: 2018-10-26 Pedro Franco de Carvalho <pedromfc@linux.ibm.com> * gdb.texinfo (PowerPC Features): Describe new features "org.gnu.gdb.power.ebb" and "org.gnu.gdb.power.linux.pmu".
2018-10-26[PowerPC] Add support for TAREdjunior Barbosa Machado6-0/+459
This patch adds support for the Target Address Register for powerpc linux native and core file targets, and in the powerpc linux server stub. gdb/ChangeLog: 2018-10-26 Edjunior Barbosa Machado <emachado@linux.vnet.ibm.com> Pedro Franco de Carvalho <pedromfc@linux.ibm.com> * arch/ppc-linux-tdesc.h (tdesc_powerpc_isa207_vsx32l) (tdesc_powerpc_isa207_vsx64l): Declare. * arch/ppc-linux-common.h (PPC_LINUX_SIZEOF_TARREGSET): Define. (struct ppc_linux_features) <isa207>: New field. (ppc_linux_no_features): Add initializer for isa207 field. * arch/ppc-linux-common.c (ppc_linux_match_description): Return new tdescs. * nat/ppc-linux.h (PPC_FEATURE2_ARCH_2_07, PPC_FEATURE2_TAR) (NT_PPC_TAR): Define if not already defined. * features/Makefile (WHICH): Add rs6000/powerpc-isa207-vsx32l and rs6000/powerpc-isa207-vsx64l. (XMLTOC): Add rs6000/powerpc-isa207-vsx32l.xml and rs6000/powerpc-isa207-vsx64l.xml. * features/rs6000/power-tar.xml: New file. * features/rs6000/powerpc-isa207-vsx32l.xml: New file. * features/rs6000/powerpc-isa207-vsx64l.xml: New file. * features/rs6000/powerpc-isa207-vsx32l.c: Generate. * features/rs6000/powerpc-isa207-vsx64l.c: Generate. * regformats/rs6000/powerpc-isa207-vsx32l.dat: Generate. * regformats/rs6000/powerpc-isa207-vsx64l.dat: Generate. * ppc-linux-nat.c (fetch_register, fetch_ppc_registers): Call fetch_regset with the TAR regset. (store_register, store_ppc_registers): Call store_regset with the TAR regset. (ppc_linux_nat_target::read_description): Set isa207 field in the features struct if needed. * ppc-linux-tdep.c: Include features/rs6000/powerpc-isa207-vsx32l.c and features/rs6000/powerpc-isa207-vsx64l.c. (ppc32_regmap_tar, ppc32_linux_tarregset): New globals. (ppc_linux_iterate_over_regset_sections): Call back with the tar regset. (ppc_linux_core_read_description): Check if the tar section is present and set isa207 in the features struct. (_initialize_ppc_linux_tdep): Call initialize_tdesc_powerpc_isa207_vsx32l and initialize_tdesc_powerpc_isa207_vsx64l. * ppc-linux-tdep.h (ppc32_linux_tarregset): Declare. * ppc-tdep.h (gdbarch_tdep) <ppc_tar_regnum>: New field. (enum) <PPC_TAR_REGNUM>: New enum value. * rs6000-tdep.c (rs6000_gdbarch_init): Look for and validate tar feature. (ppc_process_record_op31): Record changes to TAR. gdb/gdbserver/ChangeLog: 2018-10-26 Pedro Franco de Carvalho <pedromfc@linux.ibm.com> * configure.srv (ipa_ppc_linux_regobj): Add powerpc-isa207-vsx64l-ipa.o and powerpc-isa207-vsx32l-ipa.o. (powerpc*-*-linux*): Add powerpc-isa207-vsx32l.o and powerpc-isa207-vsx64l.o to srv_regobj, add rs6000/power-tar.xml, rs6000/powerpc-isa207-vsx32l.xml, and rs6000/powerpc-isa207-vsx64l.xml to srv_xmlfiles. * linux-ppc-tdesc-init.h (enum ppc_linux_tdesc) <PPC_TDESC_ISA207_VSX>: New enum value. (init_registers_powerpc_isa207_vsx32l): Declare. (init_registers_powerpc_isa207_vsx64l): Declare. * linux-ppc-low.c (ppc_fill_tarregset): New function. (ppc_store_tarregset): New function. (ppc_regsets): Add entry for the TAR regset. (ppc_arch_setup): Set isa207 in features struct when needed. Set size for the TAR regsets. (ppc_get_ipa_tdesc_idx): Return PPC_TDESC_ISA207_VSX. (initialize_low_arch): Call init_registers_powerpc_isa207_vsx32l and init_registers_powerpc_isa207_vsx64l. * linux-ppc-ipa.c (get_ipa_tdesc): Handle PPC_TDESC_ISA207_VSX. (initialize_low_tracepoint): Call init_registers_powerpc_isa207_vsx32l and init_registers_powerpc_isa207_vsx64l. gdb/testsuite/ChangeLog: 2018-10-26 Pedro Franco de Carvalho <pedromfc@linux.ibm.com> * gdb.arch/powerpc-tar.c: New file. * gdb.arch/powerpc-tar.exp: New file. gdb/doc/ChangeLog: 2018-10-26 Pedro Franco de Carvalho <pedromfc@linux.ibm.com> * gdb.texinfo (PowerPC Features): Describe new feature "org.gnu.gdb.power.tar".
2018-10-26[PowerPC] Add support for PPR and DSCREdjunior Barbosa Machado7-0/+464
This patch adds gdb support for the Program Priorty Register and the Data Stream Control Register, for the powerpc linux native and core file targets, and for the powerpc linux server stub. gdb/ChangeLog: 2018-10-26 Edjunior Barbosa Machado <emachado@linux.vnet.ibm.com> Pedro Franco de Carvalho <pedromfc@linux.ibm.com> * arch/ppc-linux-tdesc.h (tdesc_powerpc_isa205_ppr_dscr_vsx32l) (tdesc_powerpc_isa205_ppr_dscr_vsx64l): Declare. * arch/ppc-linux-common.h (PPC_LINUX_SIZEOF_PPRREGSET) (PPC_LINUX_SIZEOF_DSCRREGSET): Define. (struct ppc_linux_features) <ppr_dscr>: New field. (ppc_linux_no_features): Add initializer for ppr_dscr field. * arch/ppc-linux-common.c (ppc_linux_match_description): Return new tdescs. * nat/ppc-linux.h (PPC_FEATURE2_DSCR, NT_PPC_PPR, NT_PPC_DSCR): Define if not already defined. * features/Makefile (WHICH): Add rs6000/powerpc-isa205-ppr-dscr-vsx32l and rs6000/powerpc-isa205-ppr-dscr-vsx64l. (XMLTOC): Add rs6000/powerpc-isa205-ppr-dscr-vsx32l.xml and rs6000/powerpc-isa205-ppr-dscr-vsx64l.xml. * features/rs6000/power-dscr.xml: New file. * features/rs6000/power-ppr.xml: New file. * features/rs6000/powerpc-isa205-ppr-dscr-vsx32l.xml: New file. * features/rs6000/powerpc-isa205-ppr-dscr-vsx64l.xml: New file. * features/rs6000/powerpc-isa205-ppr-dscr-vsx32l.c: Generate. * features/rs6000/powerpc-isa205-ppr-dscr-vsx64l.c: Generate. * regformats/rs6000/powerpc-isa205-ppr-dscr-vsx32l.dat: Generate. * regformats/rs6000/powerpc-isa205-ppr-dscr-vsx64l.dat: Generate. * ppc-linux-nat.c: Include <sys/uio.h>. (fetch_regset, store_regset, check_regset): New functions. (fetch_register, fetch_ppc_registers): Call fetch_regset with DSCR and PPR regsets. (store_register, store_ppc_registers): Call store_regset with DSCR and PPR regsets. (ppc_linux_get_hwcap2): New function. (ppc_linux_nat_target::read_description): Call ppc_linux_get_hwcap2 and check_regset, set ppr_dscr field in the features struct if needed. * ppc-linux-tdep.c: Include features/rs6000/powerpc-isa205-ppr-dscr-vsx32l.c and features/rs6000/powerpc-isa205-ppr-dscr-vsx64l.c. (ppc32_regmap_ppr, ppc32_regmap_dscr, ppc32_linux_pprregset) (ppc32_linux_dscrregset): New globals. (ppc_linux_iterate_over_regset_sections): Call back with the ppr and dscr regsets. (ppc_linux_core_read_description): Check if the ppr and dscr sections are present and set ppr_dscr in the features struct. (_initialize_ppc_linux_tdep): Call initialize_tdesc_powerpc_isa205_ppr_dscr_vsx32l and initialize_tdesc_powerpc_isa205_ppr_dscr_vsx64l. * ppc-linux-tdep.h (ppc32_linux_pprregset) (ppc32_linux_dscrregset): Declare. * ppc-tdep.h (struct gdbarch_tdep) <ppc_ppr_regnum>: New field. <ppc_dscr_regnum>: New field. (enum) <PPC_PPR_REGNUM, PPC_DSCR_REGNUM>: New enum values. * rs6000-tdep.c (rs6000_gdbarch_init): Look for and validate ppr and dscr features. (ppc_process_record_op31): Record changes to PPR and DSCR. gdb/gdbserver/ChangeLog: 2018-10-26 Edjunior Barbosa Machado <emachado@linux.vnet.ibm.com> Pedro Franco de Carvalho <pedromfc@linux.ibm.com> * configure.srv (ipa_ppc_linux_regobj): Add powerpc-isa205-ppr-dscr-vsx32l-ipa.o and powerpc-isa205-ppr-dscr-vsx64l-ipa.o. (powerpc*-*-linux*): Add powerpc-isa205-ppr-dscr-vsx32l.o and powerpc-isa205-ppr-dscr-vsx64l.o to srv_regobj, add rs6000/power-dscr.xml, rs6000/power-ppr.xml, rs6000/powerpc-isa205-ppr-dscr-vsx32l.xml and rs6000/powerpc-isa205-ppr-dscr-vsx64l.xml to srv_xmlfiles. * linux-ppc-tdesc-init.h (enum ppc_linux_tdesc) <PPC_TDESC_ISA205_PPR_DSCR_VSX>: New enum value. (init_registers_powerpc_isa205_ppr_dscr_vsx32l) (init_registers_powerpc_isa205_ppr_dscr_vsx64l): Declare. * linux-ppc-low.c: Include "elf/common.h" and <sys/uio.h>. (ppc_hwcap): Add comment. (ppc_hwcap2): New global. (ppc_check_regset, ppc_fill_pprregset, ppc_store_pprregset) (ppc_fill_dscrregset, ppc_store_dscrregset): New functions. (ppc_regsets): Add entries for the DSCR and PPR regsets. (ppc_arch_setup): Get AT_HWCAP2. Set ppr_dscr in features struct when needed. Set sizes for the the DSCR and PPR regsets. (ppc_get_ipa_tdesc_idx): Return PPC_TDESC_ISA205_PPR_DSCR_VSX. (initialize_low_arch): Call init_registers_powerpc_isa205_ppr_dscr_vsx32l and init_registers_powerpc_isa205_ppr_dscr_vsx64l. * linux-ppc-ipa.c (get_ipa_tdesc): Handle PPC_TDESC_ISA205_PPR_DSCR_VSX. (initialize_low_tracepoint): Call init_registers_powerpc_isa205_ppr_dscr_vsx32l and init_registers_powerpc_isa205_ppr_dscr_vsx64l. gdb/testsuite/ChangeLog: 2018-10-26 Pedro Franco de Carvalho <pedromfc@linux.ibm.com> * gdb.arch/powerpc-ppr-dscr.c: New file. * gdb.arch/powerpc-ppr-dscr.exp: New file. gdb/doc/ChangeLog: 2018-10-26 Pedro Franco de Carvalho <pedromfc@linux.ibm.com> * gdb.texinfo (PowerPC Features): Describe new features "org.gnu.gdb.power.ppr" and "org.gnu.gdb.power.dscr".
2018-06-04Use uint64_t for SVE VQAlan Hayward1-1/+1
Previously VQ was of type long. Using uint64_t ensures it always matches the same type as the VG register. Note that in the Linux kernel, VQ is 16bits. We cast it up to 64bits immediately after reading to ensure we always use the same type throughout the code. gdb/ * aarch64-tdep.c (aarch64_read_description): Use uint64_t for VQ. * aarch64-tdep.h (aarch64_read_description): Likewise. * arch/aarch64.c (aarch64_create_target_description): Likewise. * arch/aarch64.h (aarch64_create_target_description): Likewise. * features/aarch64-sve.c (create_feature_aarch64_sve): Likewise. * nat/aarch64-sve-linux-ptrace.c(aarch64_sve_get_vq): Likewise. * nat/aarch64-sve-linux-ptrace.h (aarch64_sve_get_vq): Likewise.
2018-05-31Add Aarch64 SVE target descriptionAlan Hayward1-0/+158
No code uses the new descriptions yet. gdb/ * aarch64-linux-nat.c (aarch64_linux_read_description): Add parmeter zero. * aarch64-linux-tdep.c (aarch64_linux_core_read_description): Likewise. * aarch64-tdep.c (tdesc_aarch64_list): Add. (aarch64_read_description): Use VQ to index tdesc_aarch64_list. (aarch64_gdbarch_init): Add parmeter zero. * aarch64-tdep.h (aarch64_read_description): Add VQ parmeter. * arch/aarch64.c (aarch64_create_target_description): Check VQ. * arch/aarch64.h (aarch64_create_target_description): Add VQ. parmeter. * doc/gdb.texinfo: Describe SVE feature * features/aarch64-sve.c: New file. gdbserver/ * linux-aarch64-tdesc.c (aarch64_linux_read_description): Add null VQ.
2018-04-18Remove xml file references from target descriptionsAlan Hayward21-21/+21
gdb/ * common/tdesc.h (tdesc_create_feature): Remove xml filename parameter. * features/aarch64-core.c (create_feature_aarch64_core): Regenerate. * features/aarch64-fpu.c (create_feature_aarch64_fpu): Likewise. * features/i386/32bit-avx.c (create_feature_i386_32bit_avx): Likewise. * features/i386/32bit-avx512.c (create_feature_i386_32bit_avx512): Likewise. * features/i386/32bit-core.c (create_feature_i386_32bit_core): Likewise. * features/i386/32bit-linux.c (create_feature_i386_32bit_linux): Likewise. * features/i386/32bit-mpx.c (create_feature_i386_32bit_mpx): Likewise. * features/i386/32bit-pkeys.c (create_feature_i386_32bit_pkeys): Likewise. * features/i386/32bit-sse.c (create_feature_i386_32bit_sse): Likewise. * features/i386/64bit-avx.c (create_feature_i386_64bit_avx): Likewise. * features/i386/64bit-avx512.c (create_feature_i386_64bit_avx512): Likewise. * features/i386/64bit-core.c (create_feature_i386_64bit_core): Likewise. * features/i386/64bit-linux.c (create_feature_i386_64bit_linux): Likewise. * features/i386/64bit-mpx.c (create_feature_i386_64bit_mpx): Likewise. * features/i386/64bit-pkeys.c (create_feature_i386_64bit_pkeys): Likewise. * features/i386/64bit-segments.c (create_feature_i386_64bit_segments): Likewise. * features/i386/64bit-sse.c (create_feature_i386_64bit_sse): Likewise. * features/i386/x32-core.c (create_feature_i386_x32_core): Likewise. * features/tic6x-c6xp.c (create_feature_tic6x_c6xp): Likewise. * features/tic6x-core.c (create_feature_tic6x_core): Likewise. * features/tic6x-gp.c (create_feature_tic6x_gp): Likewise. * target-descriptions.c: In generated code, don't pass xml filename. gdbserver/ * tdesc.c: Remove xml parameter.
2018-04-18Add feature reference in .dat filesAlan Hayward1-0/+6
For all targets which use the newer style target descriptions, add a "feature" marker in the dat files. Update regdat.sh to parse feature, but do not use it (yet). gdb/ * features/Makefile: Add feature marker to targets with new style target descriptions. * regformats/aarch64.dat: Regenerate. * regformats/i386/amd64-avx-avx512-linux.dat: Likewise. * regformats/i386/amd64-avx-linux.dat: Likewise. * regformats/i386/amd64-avx-mpx-avx512-pku-linux.dat: Likewise. * regformats/i386/amd64-avx-mpx-linux.dat: Likewise. * regformats/i386/amd64-linux.dat: Likewise. * regformats/i386/amd64-mpx-linux.dat: Likewise. * regformats/i386/amd64.dat: Likewise. * regformats/i386/i386-avx-avx512-linux.dat: Likewise. * regformats/i386/i386-avx-linux.dat: Likewise. * regformats/i386/i386-avx-mpx-avx512-pku-linux.dat: Likewise. * regformats/i386/i386-avx-mpx-linux.dat: Likewise. * regformats/i386/i386-linux.dat: Likewise. * regformats/i386/i386-mmx-linux.dat: Likewise. * regformats/i386/i386-mpx-linux.dat: Likewise. * regformats/i386/i386.dat: Likewise. * regformats/i386/x32-avx-avx512-linux.dat: Likewise. * regformats/i386/x32-avx-linux.dat: Likewise. * regformats/i386/x32-linux.dat: Likewise. * regformats/tic6x-c62x-linux.dat: Likewise. * regformats/tic6x-c64x-linux.dat: Likewise. * regformats/tic6x-c64xp-linux.dat: Likewise. * regformats/regdat.sh: Parse feature marker.
2018-02-26Move arch/tdesc.h to common/tdesc.hAlan Hayward21-21/+21
gdb/ * arch/amd64.h: Use common/tdesc.h. * arch/i386.c: Likewise. * arch/i386.h: Likewise. * arch/tic6x.c: Likewise. * arch/tdesc.h: Move file from here... * common/tdesc.h: ...to here. * features/aarch64-core.c: Regenerate. * features/aarch64-fpu.c: Regenerate. * features/i386/32bit-avx.c: Regenerate. * features/i386/32bit-avx512.c: Regenerate. * features/i386/32bit-core.c: Regenerate. * features/i386/32bit-linux.c: Regenerate. * features/i386/32bit-mpx.c: Regenerate. * features/i386/32bit-pkeys.c: Regenerate. * features/i386/32bit-sse.c: Regenerate. * features/i386/64bit-avx.c: Regenerate. * features/i386/64bit-avx512.c: Regenerate. * features/i386/64bit-core.c: Regenerate. * features/i386/64bit-linux.c: Regenerate. * features/i386/64bit-mpx.c: Regenerate. * features/i386/64bit-pkeys.c: Regenerate. * features/i386/64bit-segments.c: Regenerate. * features/i386/64bit-sse.c: Regenerate. * features/i386/x32-core.c: Regenerate. * features/tic6x-c6xp.c: Regenerate. * features/tic6x-core.c: Regenerate. * features/tic6x-gp.c: Regenerate. * target-descriptions.c: Use common/tdesc.h. * target-descriptions.h: Likewise. gdbserver/ * tdesc.c: Use common/tdesc.h. * tdesc.h: Likewise.
2018-01-02Update copyright year range in all GDB filesJoel Brobecker184-184/+184
gdb/ChangeLog: Update copyright year range in all GDB files
2017-12-21Do not emit "field_type" var if not needed on "maint print c-tdesc"Simon Marchi35-35/+28
While fiddling a bit with -Wunused-variable, Sergio noticed that "maint print c-tdesc" was always generating code for the "tdesc_type *field_type" variable, even when it wasn't used. This is caught by GCC when using -Wunused-variable, of course. This patch changes the print_c_tdesc class to only output the field declaration when we actually need it. It shouldn't be necessary to do the same with the other variable declarations (type_with_fields and element_type), because they are always if they are declared. The C files in features/ are regenerated, some declarations of field_type are removed, as expected, while some others move to where they are used for the first time. gdb/ChangeLog: * target-descriptions.c (print_c_tdesc) <visit>: Don't output field_type declaration, use printf_field_type_assignment instead. <printf_field_type_assignment>: New method. * features/aarch64-core.c, features/aarch64-fpu.c features/arc-arcompact.c, features/arc-v2.c, features/arm/arm-with-iwmmxt.c, features/i386/32bit-core.c, features/i386/32bit-mpx.c, features/i386/32bit-sse.c, features/i386/64bit-avx512.c, features/i386/64bit-core.c, features/i386/64bit-mpx.c, features/i386/64bit-sse.c, features/i386/x32-core.c, features/or1k.c, features/rs6000/powerpc-7400.c, features/rs6000/powerpc-altivec32.c, features/rs6000/powerpc-altivec32l.c, features/rs6000/powerpc-altivec64.c, features/rs6000/powerpc-altivec64l.c, features/rs6000/powerpc-cell32l.c, features/rs6000/powerpc-cell64l.c, features/rs6000/powerpc-isa205-altivec32l.c, features/rs6000/powerpc-isa205-altivec64l.c, features/rs6000/powerpc-isa205-vsx32l.c, features/rs6000/powerpc-isa205-vsx64l.c, features/rs6000/powerpc-vsx32.c, features/rs6000/powerpc-vsx32l.c, features/rs6000/powerpc-vsx64.c, features/rs6000/powerpc-vsx64l.c, features/s390-gs-linux64.c, features/s390-tevx-linux64.c, features/s390-vx-linux64.c, features/s390x-gs-linux64.c, features/s390x-tevx-linux64.c, features/s390x-vx-linux64.c: Re-generate.
2017-12-12gdb: Add OpenRISC or1k and or1knd target supportFranck Jullien4-0/+156
This patch prepares the current GDB port of the OpenRISC processor from https://github.com/openrisc/binutils-gdb for upstream merging. Testing has been done with a cgen sim provided in a separate patch. This has been tested with 2 toolchains. GCC [1] 5.4.0 from the OpenRISC project with Newlib [2] and GCC 5.4.0 with Musl [3] 1.1.4. It supports or1knd (no delay slot target). The default target is or1k (with delay slot). You can change the target arch with: (gdb) set architecture or1knd The target architecture is assumed to be or1knd [1] https://github.com/openrisc/or1k-gcc [2] https://github.com/openrisc/newlib [3] https://github.com/openrisc/musl-cross gdb/doc/ChangeLog: 2017-12-12 Stafford Horne <shorne@gmail.com> Stefan Wallentowitz <stefan@wallentowitz.de> Franck Jullien <franck.jullien@gmail.com> Jeremy Bennett <jeremy.bennett@embecosm.com> * gdb.texinfo: Add OpenRISC documentation. gdb/ChangeLog: 2017-12-12 Stafford Horne <shorne@gmail.com> Stefan Wallentowitz <stefan@wallentowitz.de> Stefan Kristiansson <stefan.kristiansson@saunalahti.fi> Franck Jullien <franck.jullien@gmail.com> Jeremy Bennett <jeremy.bennett@embecosm.com> * configure.tgt: Add targets for or1k and or1knd. * or1k-tdep.c: New file. * or1k-tdep.h: New file. * features/Makefile: Add or1k.xml to build. * features/or1k.xml: New file. * features/or1k-core.xml: New file. * features/or1k.c: Generated.
2017-12-05Split tdesc_type into multiple classesSimon Marchi35-691/+717
This patch makes tdesc_type an abstract base class and creates three subclasses: - tdesc_type_builtin, for builtin types - tdesc_type_vector, for vector types - tdesc_type_with_fields, for struct, union, flag and enum types This allows getting rid of the union in tdesc_type and to not allow the std::vector separately. I tried to go further and create separate classes for struct, union, flag and enum, but it proved too difficult. One problem is that from the point of the of the target description code, the types tdesc_type_* are opaque (only forward-declared). Therefore, it doesn't know about inheritance relationship between those classes. This makes it impossible to make functions that accept a pointer to a base class and pass a pointer to a derived class, for example. I think this patch here is a good compromise, and if somebody wants to improve things further, the door is open. A make_gdb_type virtual pure method is added to tdesc_type, which replaces the current tdesc_gdb_type function. Calling this method on a tdesc_type returns the corresponding built gdb type. gdb/ChangeLog: * target-descriptions.c (struct tdesc_type): Use default destructor. <u>: Remove. <accept>: Remove. (struct tdesc_type_builtin): New. (struct tdesc_type_vector): New. (struct tdesc_type_with_fields): New. (tdesc_predefined_types): Change type to tdesc_type_builtin[]. (tdesc_gdb_type): Remove. (tdesc_register_type): Adjust. (tdesc_create_vector): Create tdesc_type_vector. (tdesc_create_struct): Create tdesc_type_with_fields. (tdesc_set_struct_size): Change parameter type. (tdesc_create_union): Create tdesc_type_with_fields. (tdesc_create_flags): Likewise. (tdesc_create_enum): Likewise. (tdesc_add_field): Change parameter type. (tdesc_add_typed_bitfield): Likewise. (tdesc_add_bitfield): Likewise. (tdesc_add_flag): Likewise. (tdesc_add_enum_value): Likewise. (print_c_tdesc) <visit>: Remove overload with tdesc_type parameter, add overloads for tdesc_type_builtin, tdesc_type_with_fields and tdesc_type_vector. <m_printed_type>: Remove. <m_printed_element_type, m_printed_type_with_fields>: Add. * target-descriptions.h (tdesc_create_enum): Change return type. (tdesc_add_typed_bitfield): Change parameter type. (tdesc_add_enum_value): Change parameter type. * xml-tdesc.c (struct tdesc_parsing_data) <current_type>: Change type to tdesc_type_with_fields. (tdesc_start_struct): Adjust. (tdesc_start_flags): Adjust. (tdesc_start_enum): Adjust. (tdesc_start_field): Adjust. * arch/tdesc.h (struct tdesc_type_builtin): Forward-declare. (struct tdesc_type_vector): Forward-declare. (struct tdesc_type_with_fields): Forward-declare. (tdesc_create_struct): Change return type. (tdesc_create_union): Likewise. (tdesc_create_flags): Likewise. (tdesc_add_field): Change parameter type. (tdesc_set_struct_size): Likewise. (tdesc_add_bitfield): Likewise. (tdesc_add_flag): Likewise. * features: Re-generate C files. gdb/gdbserver/ChangeLog: * tdesc.c (struct tdesc_type): Change return type. (tdesc_add_flag): Change parameter type. (tdesc_add_bitfield): Likewise. (tdesc_add_field): Likewise. (tdesc_set_struct_size): Likewise.
2017-12-05Make tdesc_reg string fields std::stringSimon Marchi2-3/+3
Make the name, group and type fields of tdesc_reg std::strings. This way, we don't have to manually free them in ~tdesc_reg. Doing so results in a small change in the generated tdesc. Instead of passing an empty string for the group parameter of tdesc_create_reg, the two modified tdesc now pass NULL. The end result should be the same. gdb/ChangeLog: * target-descriptions.c (struct tdesc_reg) <tdesc_reg>: Change type of name_ parameter, adjust to std::string change. <name, group, type>: Change type to std::string. <~tdesc_reg>: Replace with default implementation. <operator==>: Adjust. (tdesc_find_register_early): Adjust. (tdesc_register_name): Adjust. (tdesc_register_type): Adjust. (tdesc_register_in_reggroup_p): Adjust. (class print_c_tdesc) <visit>: Adjust. (class print_c_feature) <visit>: Adjust.
2017-11-24Use flexible target descriptors for aarch64Alan Hayward4-193/+201
gdb/ * aarch64-tdep.c (_initialize_aarch64_tdep): Remove init. * arch/aarch64.c (aarch64_create_target_description): Create new target description. * features/Makefile: Add new files. * features/aarch64.c: Remove file. * features/aarch64-core.c: New autogenerated file. * features/aarch64-fpu.c: New autogenerated file. * target-descriptions.c (maint_print_c_tdesc_cmd): Check for aarch64. gdbserver/ * linux-aarch64-ipa.c (initialize_low_tracepoint): Remove init. * linux-aarch64-low.c (initialize_low_arch): Remove init. * linux-aarch64-tdesc.c (aarch64_linux_read_description): Add init.
2017-11-24Change tic6x target descriptionsYao Qi4-1/+112
This patch changes tic6x target descriptions to be more flexible. Rebuild tic6x-uclinux GDBserver with my x86 g++, and the unit test passes. gdb: 2017-11-24 Yao Qi <yao.qi@linaro.org> * arch/tic6x.c: New file. * arch/tic6x.h: New file. * features/Makefile (FEATURE_XMLFILES): Add tic6x-c6xp.xml, tic6x-core.xml and tic6x-gp.xml. * features/tic6x-c6xp.c: Generated. * features/tic6x-core.c: Generated. * features/tic6x-gp.c: Generated. * target-descriptions.c (maint_print_c_tdesc_cmd): Match "tic6x-". gdb/gdbserver: 2017-11-24 Yao Qi <yao.qi@linaro.org> * configure.srv: Set $srv_regobj for tic6x-linux. * linux-tic6x-low.c: Include "arch/tic6x.h" and "tdesc.h". (tic6x_read_description): Move some code to tic6x_arch_setup. (tic6x_tdesc_test): New function. (initialize_low_arch): Call selftests::register_test.
2017-11-16Remove non-linux tic6x target descriptionsYao Qi3-39/+0
They are not used by GDB nor by GDBserver. This patch removes them. gdb: 2017-11-16 Yao Qi <yao.qi@linaro.org> * features/tic6x-c62x.xml: Remove. * features/tic6x-c64x.xml: Remove. * features/tic6x-c64xp.xml: Remove.
2017-11-15Remove features/nios2-linux.cYao Qi2-72/+0
tdesc_nios2_linux is not used at all. Remove features/nios2-linux.c, and don't generate it anymore. gdb: 2017-11-15 Yao Qi <yao.qi@linaro.org> * features/Makefile (XMLTOC): Remove nios2-linux.xml. * features/nios2-linux.c: Remove. * nios2-linux-tdep.c (_initialize_nios2_linux_tdep): Don't call initialize_tdesc_nios2_linux.
2017-10-18Remove features/tic6x-c62x-linux.cYao Qi1-56/+0
c40c7bf (Remove features/tic6x-*.c files) doesn't remove features/tic6x-c62x-linux.c. This patch removes it. gdb: 2017-10-18 Yao Qi <yao.qi@linaro.org> * features/tic6x-c62x-linux.c: Remove.
2017-10-16Remove features/tic6x-*.c filesYao Qi6-427/+1
features/*.c are generated from *.xml files, in order to get pre-defined target descriptions, (for native debugging, for example). However, these pre-generated tdesc_tic6x_* are not used in GDB at all. This patch removes features/tic6x-*.c files. gdb: 2017-10-16 Yao Qi <yao.qi@linaro.org> * features/Makefile (XMLTOC): Remove tic6x-*.xml. * features/tic6x-c62x.c: Remove. * features/tic6x-c64x-linux.c: Remove. * features/tic6x-c64x.c: Remove. * features/tic6x-c64xp-linux.c: Remove. * features/tic6x-c64xp.c: Remove. * tic6x-linux-tdep.c (_initialize_tic6x_linux_tdep): Don't call initialize_tdesc_tic6x_*_linux functions. * tic6x-tdep.c (_initialize_tic6x_tdep): Don't call initialize_tdesc_tic6x_* functions.
2017-10-16Remove regformats/tic6x-{c62x,c64x,c64xp}.datYao Qi1-1/+0
tic6x-uclinux GDBserver uses linux target descriptions, instead of these non-linux target descriptions. So we can remove these *.dat files. gdb: 2017-10-16 Yao Qi <yao.qi@linaro.org> * features/Makefile (WHICH): Remove tic6x-c64xp, tic6x-c64x tic6x-c62x. * regformats/tic6x-c62x.dat: Remove. * regformats/tic6x-c64x.dat: Remove. * regformats/tic6x-c64xp.dat: Remove.
2017-10-13Simplify tic6x and s390x expedite registersYao Qi1-13/+2
Nowadays, we have six tic6x expedite registers, which are duplicated. tic6x-c64xp-expedite = A15,PC tic6x-c64x-expedite = A15,PC tic6x-c62x-expedite = A15,PC tic6x-c64xp-linux-expedite = A15,PC tic6x-c64x-linux-expedite = A15,PC tic6x-c62x-linux-expedite = A15,PC in features/Makefile, we have echo "expedite:$(if $($*-expedite),$($*-expedite),$($(firstword $(subst -, ,$(notdir $*)))-expedite))" \ >> $(outdir)/$*.tmp which means for a given bar/foo-baz.xml, we'll look for either bar/foo-baz-expedite or foo-expedite. We can define only one generic expedite register for all different ti6cx and s390x target descriptions. Actually, we've done that for x86 target descriptions. Re-run 'make GDB=/path/build/gdb all' to regenerate regformats/*.dat files, and they are not changed. gdb: 2017-10-13 Yao Qi <yao.qi@linaro.org> * features/Makefile: Remove tic6x-*-expedite, add tic6x-expedite. Remove s390x-*-expedite, add s390x-expedite.
2017-10-13Regenerate features/s390-gs-linux64.c and features/s390x-gs-linux64.cYao Qi2-8/+8
gdb: 2017-10-13 Yao Qi <yao.qi@linaro.org> * features/s390-gs-linux64.c: Regenerated. * features/s390x-gs-linux64.c: Regenerated.
2017-09-25S390: Add guarded-storage register definitions and tdescsAndreas Arnez7-0/+466
Newer Linux kernel versions offer two new register sets in support of the z/Architecture's guarded storage facility. This patch adds XML descriptions and the respective autogenerated .c and .dat files for s390/s390x targets with this feature. gdb/ChangeLog: * features/s390-gs-linux64.xml: New file. * features/s390-gs.xml: New file. * features/s390-gsbc.xml: New file. * features/s390x-gs-linux64.xml: New file. * features/Makefile (WHICH): Add s390-gs-linux64 and s390x-gs-linux64. (s390-gs-linux64-expedite, s390x-gs-linux64-expedite): New macros. (XMLTOC): Add s390-gs-linux64.xml and s390x-linux64.xml. * features/s390-gs-linux64.c: New generated file. * features/s390x-gs-linux64.c: New file. * regformats/s390-gs-linux64.dat: New file. * regformats/s390x-gs-linux64.dat: New file.
2017-09-20[OBV] amd64-features-makefile: add missing backslash.Walfred Tedeschi1-1/+1
In an old commit the backslash of was missing in the rule for creating the i386-avx-mpx-avx512-pku.dat file. No need to regenerate the files, this was done by another commit from Yao. 2017-09-20 Walfred Tedeschi <walfred.tedeschi@intel.com> * features/Makefile (i386-avx-mpx-avx512-pku.dat): Add backslash.
2017-09-05Convert the rest x86 target descriptionsYao Qi14-2424/+0
This patch changes the rest of x86 target descriptions in GDB and GDBserver. gdb: 2017-09-05 Yao Qi <yao.qi@linaro.org> * amd64-tdep.c (amd64_target_description): Create target descriptions. (_initialize_amd64_tdep): Don't call functions initialize_tdesc_amd64_*. Add self tests. * arch/amd64.c (amd64_create_target_description): Add parameter is_linux. Call set_tdesc_osabi if is_linux is true. * arch/amd64.h (amd64_create_target_description): Update the declaration. * arch/i386.c (i386_create_target_description): Add parameter is_linux. Call set_tdesc_osabi if is_linux is true. * arch/i386.h (i386_create_target_description): Update declaration. * configure.tgt: Add i386.o to gdb_target_obs. * features/Makefile (XMLTOC): Remove i386/*.xml. * features/i386/amd64-avx-avx512.c: Remove. * features/i386/amd64-avx-mpx-avx512-pku.c: Remove. * features/i386/amd64-avx-mpx.c: Remove. * features/i386/amd64-avx.c: Remove. * features/i386/amd64-mpx.c: Remove. * features/i386/amd64.c: Remove. * features/i386/i386-avx-avx512.c: Remove. * features/i386/i386-avx-mpx-avx512-pku.c: Remove. * features/i386/i386-avx-mpx.c: Remove. * features/i386/i386-avx.c: Remove. * features/i386/i386-mmx.c: Remove. * features/i386/i386-mpx.c: Remove. * features/i386/i386.c: Remove. * i386-tdep.c: Don't include features/i386/i386*.c., include target-descriptions.h and arch/i386.h. (i386_target_description): Create target descriptions. (i386_gdbarch_init): Don't call initialize_tdesc_i386_* functions. Do self tests. gdb/gdbserver: 2017-09-05 Yao Qi <yao.qi@linaro.org> * configure.srv (srv_i386_regobj): Remove. (srv_amd64_regobj): Remove. (srv_regobj): Set it to "" for x86 non-linux targets. * linux-x86-tdesc.c (i386_linux_read_description): * lynx-i386-low.c: Include x86-xstate.h and arch/i386.h. (init_registers_i386): Remove the declaration. (tdesc_i386): Remove the declaration. (lynx_i386_arch_setup): Call i386_create_target_description. * nto-x86-low.c: Likewise. * win32-i386-low.c [__x86_64__]: include arch/amd64.h. [!__x86_64__]: include arch/i386.h. (i386_arch_setup) [__x86_64__]: Call amd64_create_target_description.