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AgeCommit message (Expand)AuthorFilesLines
2022-09-29Constify target_desc declarationsKeith Seitz2-21/+21
2022-09-23gdb/csky add cskyv2-linux.xml for cskyv2-linux.cJiangshuai Li1-1/+1
2022-09-13gdbserver/csky add csky gdbserver supportJiangshuai Li2-0/+67
2022-08-31gdb/riscv: better support for fflags and frm registersAndrew Burgess1-2/+17
2022-08-09gdb/gdbserver: LoongArch: Improve implementation of fcc registersFeiyang Chen1-3/+4
2022-07-19[AArch64] MTE corefile supportLuis Machado2-0/+66
2022-07-12gdb: LoongArch: Add floating-point supportTiezhu Yang2-1/+25
2022-07-10Fix include guard naming for arch/aarch64-mte-linux.hLuis Machado1-3/+3
2022-07-10gdbserver: LoongArch: Simplify code with register number macrosYouling Tang1-0/+16
2022-06-29gdb/arm: Only stack S16..S31 when FPU registers are secureYvan Roux1-0/+9
2022-06-14gdbserver: Add LoongArch/Linux supportYouling Tang2-1/+24
2022-05-23Tweak the std::hash<> specialization for aarch64_features.John Baldwin1-12/+15
2022-05-18Use aarch64_features to describe register features in target descriptions.John Baldwin2-17/+36
2022-05-03Add an aarch64-tls feature which includes the tpidr register.John Baldwin2-3/+12
2022-05-03Add an arm-tls feature which includes the tpidruro register from CP15.John Baldwin3-2/+8
2022-04-27gdb/arm: Define MSP and PSP registers for M-ProfileChristophe Lyon2-0/+7
2022-04-06Enable ARMv8.1-m PACBTI supportLuis Machado1-0/+13
2022-03-31gdb: Consolidate 32bit-pkeys.xml and 64bit-pkeys.xmlH.J. Lu2-5/+5
2022-02-11gdb: LoongArch: Add initial target description supportTiezhu Yang2-0/+161
2022-01-01Automatic Copyright Year update after running gdb/copyright.pyJoel Brobecker28-28/+28
2021-11-18gdbsupport: make gdb_assert_not_reached accept a format stringSimon Marchi1-2/+2
2021-11-15Extend the prologue analyzer to handle the bti instructionLuis Machado1-0/+5
2021-11-03[AArch64] Make gdbserver register set selection dynamicLuis Machado1-0/+9
2021-10-11[ARM] Add support for M-profile MVE extensionSrinath Parvathaneni2-0/+10
2021-10-11[ARM] Refactor some constantsLuis Machado1-4/+10
2021-06-21gdb/riscv: add support for vector registers in target descriptionsAndrew Burgess2-2/+16
2021-05-13[AArch64] Fix off-by-one when calculating tag granules.Luis Machado1-2/+3
2021-03-24AArch64: Report tag violation error informationLuis Machado1-0/+6
2021-03-24AArch64: Implement the memory tagging gdbarch hooksLuis Machado2-0/+56
2021-03-24AArch64: Implement memory tagging target methods for AArch64Luis Machado2-0/+57
2021-03-24AArch64: Add MTE register set support for GDB and gdbserverLuis Machado1-0/+3
2021-03-24AArch64: Add target description/feature for MTE registersLuis Machado2-3/+11
2021-03-24AArch64: Add MTE CPU feature check supportLuis Machado1-0/+28
2021-01-27GDB: aarch64: Add ability to displaced step over a BR/BLR instructionMatthew Malcomson1-0/+9
2021-01-11gdb: convert aarch64 to new-style debug macrosSimon Marchi2-6/+8
2021-01-01Update copyright year range in all GDB filesJoel Brobecker26-26/+26
2020-12-10[AArch64] SVE/FPSIMD fixup for big endianLuis Machado1-0/+2
2020-12-04Fix shifting of negative valueLuis Machado2-25/+22
2020-12-02gdb/riscv: rewrite target description validation, add rv32e supportAndrew Burgess2-4/+20
2020-11-02gdb, gdbserver, gdbsupport: fix leading space vs tabs issuesSimon Marchi2-10/+10
2020-10-09gdb: Delay releasing target_desc_up in more casesAndrew Burgess9-66/+70
2020-10-08gdb: Have allocate_target_description return a unique_ptrAndrew Burgess8-21/+22
2020-10-07arc: Rename "arc_gdbarch_features" structShahab Vahedi2-12/+12
2020-08-25arc: Add ARCv2 XML target along with refactoringShahab Vahedi2-42/+145
2020-08-08[gdb/build] Fix missing implicit constructor call with gcc 4.8Tom de Vries1-2/+3
2020-07-17gdb/riscv: delete target descriptions when gdb exitsAndrew Burgess1-3/+5
2020-03-16arc: Migrate to new target featuresAnton Kolesov2-0/+106
2020-02-19gdb/riscv: Update API for looking up target descriptionsAndrew Burgess2-31/+64
2020-02-14gnulib: import count-one-bits module and use itSimon Marchi3-18/+5
2020-02-11Add a comment for the ARM_F{0..7}_REGNUM registersChristian Biesinger1-0/+1
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