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2016-04-20Move ARM_CPSR_GREGNUM to arch/arm-linux.hYao Qi1-0/+3
This patch moves macro ARM_CPSR_GREGNUM to arch/arm-linux.h so that it can be used in GDBserver side. gdb: 2016-04-20 Yao Qi <yao.qi@linaro.org> * arm-linux-tdep.h (ARM_CPSR_GREGNUM): Move it to ... * arch/arm-linux.h: ... here. gdb/gdbserver: 2016-04-20 Yao Qi <yao.qi@linaro.org> * linux-aarch32-low.c: Include "arch/arm-linux.h". (arm_fill_gregset): Use ARM_CPSR_GREGNUM rather than magic number 16. (arm_store_gregset): Likewise.
2016-02-16Remove PC from syscall_next_pcYao Qi2-3/+3
Method syscall_next_pc of struct arm_get_next_pcs_ops has an argument PC, which is not necessary, because PC can be got from regcache in 'struct arm_get_next_pcs'. This patch removes the PC argument of syscall_next_pc. gdb: 2016-02-16 Yao Qi <yao.qi@linaro.org> * arch/arm-get-next-pcs.h (struct arm_get_next_pcs_ops) <syscall_next_pc>: Remove argument PC. Callers updated. * arm-linux-tdep.c (arm_linux_get_next_pcs_syscall_next_pc): Remove argument PC. Get pc from regcache_read_pc. * arm-tdep.c (arm_get_next_pcs_syscall_next_pc): Remove argument PC. gdb/gdbserver: 2016-02-16 Yao Qi <yao.qi@linaro.org> * linux-arm-low.c (get_next_pcs_syscall_next_pc): Remove argument PC. Get pc from regcache_read_pc.
2016-02-12[ARM] Software single step cross kernel helpersYao Qi1-4/+66
GDB step cross kernel helpers only works if the kernel helpers are tail called, which is the case how it is used in glibc. See __aeabi_read_tp in sysdeps/unix/sysv/linux/arm/aeabi_read_tp.S. In __aeabi_read_tp, branch/jump to the kernel helper is the last instruction, and the next instruction address is in LR, which is in caller function. GDB can handle this correctly. For example, glibc function __GI___ctype_init calls __aeabi_read_tp 0xb6e19b30 <__GI___ctype_init+4>: ldr r3, [pc, #80] ; 0xb6e19b34 <__GI___ctype_init+8>: bl 0xb6e0a6e0 <__aeabi_read_tp> 0xb6e19b38 <__GI___ctype_init+12>: ldr r3, [pc, r3] and __aeabi_read_tp calls kernel helper, (gdb) disassemble __aeabi_read_tp 0xb6fef5d0 <+0>: mvn r0, #61440 ; 0xf000 0xb6fef5d4 <+4>: sub pc, r0, #31 once GDB or GDBserver single step instruction on 0xb6fef5d4, LR is 0xb6e19b38, which is right address of next instruction to set breakpoint on. However, if the kernel helpers are not tail-called, the LR is still the address in the caller function of kernel helper's caller, which isn't the right address of next instruction to set breakpoint on. For example, we use kernel helper in main, (gdb) disassemble main .... 0x00008624 <+32>: mov r3, #4064 ; 0xfe0^M 0x00008628 <+36>: movt r3, #65535 ; 0xffff^M 0x0000862c <+40>: blx r3 0x00008630 <+44>: ldr r3, [r11, #-8] kernel helper is called on 0x0000862c and the expected next instruction address is 0x00008630, but the LR now is the return address of main. The problem here is LR may not have the right address because when we single step the instruction, it isn't executed yet, so the LR isn't updated. This patch fix this problem by decoding instruction, if the instruction updates LR (BL and BLX), the next instruction address is PC + INSN_SIZE, otherwise, get the address of next instruction from LR. gdb: 2016-02-12 Yao Qi <yao.qi@linaro.org> * arch/arm-linux.c (arm_linux_get_next_pcs_fixup): Calculate nextpc according to instruction. gdb/testsuite: 2016-02-12 Yao Qi <yao.qi@linaro.org> * gdb.arch/arm-single-step-kernel-helper.c: New. * gdb.arch/arm-single-step-kernel-helper.exp: New.
2016-02-12[ARM] Fixup PC in software single stepYao Qi4-0/+39
When I exercise GDBserver software single step, I see the following error, which has been already handled by GDB properly. In GDBserver log, we can see, GDBserver tries to single step instruction on 0xb6e0a6e4, and destination address is 0xffff0fe0, stop pc is 0xb6e0a6e4 Writing f001f0e7 to 0xffff0fe0 in process 7132 Failed to insert breakpoint at 0xffff0fe0 (Input/output error). Failed to insert breakpoint at 0xffff0fe0 (-1). (gdb) disassemble __aeabi_read_tp,+8 Dump of assembler code from 0xb6e0a6e0 to 0xb6e0a6e8: 0xb6e0a6e0 <__aeabi_read_tp+0>: mvn r0, #61440 ; 0xf000 0xb6e0a6e4 <__aeabi_read_tp+4>: sub pc, r0, #31 however, it fails inserting breakpoint there. This problem has already fixed by GDB, see comments in arm-linux-tdep.c:arm_linux_software_single_step /* The Linux kernel offers some user-mode helpers in a high page. We can not read this page (as of 2.6.23), and even if we could then we couldn't set breakpoints in it, and even if we could then the atomic operations would fail when interrupted. They are all called as functions and return to the address in LR, so step to there instead. */ so we need to do the same thing in GDB side as well. This patch adds a new field fixup in arm_get_next_pcs_ops, so that we can fix up PC for arm-linux target. In this way, both GDB and GDBserver can single step instructions going to kernel helpers. gdb: 2016-02-12 Yao Qi <yao.qi@linaro.org> * arch/arm-get-next-pcs.c (arm_get_next_pcs): Call self->ops->fixup if it isn't NULL. * arch/arm-get-next-pcs.h: Include gdb_vecs.h. (struct arm_get_next_pcs_ops) <fixup>: New field. * arch/arm-linux.c: Include common-regcache.h and arch/arm-get-next-pcs.h. (arm_linux_get_next_pcs_fixup): New function. * arch/arm-linux.h (arm_linux_get_next_pcs_fixup): Declare. * arm-linux-tdep.c (arm_linux_get_next_pcs_ops): Initialize it with arm_linux_get_next_pcs_fixup. (arm_linux_software_single_step): Move code to arm_linux_get_next_pcs_fixup. * arm-tdep.c (arm_get_next_pcs_ops): Initialize it. gdb/gdbserver: 2016-02-12 Yao Qi <yao.qi@linaro.org> * linux-arm-low.c (get_next_pcs_ops): Initialize it with arm_linux_get_next_pcs_fixup.
2016-01-26Remove argument pc in get_next_pcsYao Qi2-13/+14
Nowadays, get_next_pcs in linux_target_ops has two parameters PC and REGCACHE. Parameter PC looks redundant because it can be go from REGCACHE. The patch is to remove PC from the arguments for various functions. gdb: 2016-01-26 Yao Qi <yao.qi@linaro.org> * arch/arm-get-next-pcs.c (thumb_deal_with_atomic_sequence_raw): Remove argument pc. Get pc by regcache_read_pc. Callers updated. (arm_deal_with_atomic_sequence_raw): Likewise. (thumb_get_next_pcs_raw): Likewise. (arm_get_next_pcs_raw): Likewise. (arm_get_next_pcs): Remove argument pc. Callers updated. * arch/arm-get-next-pcs.h (arm_get_next_pcs): Update declaration. gdb/gdbserver: 2016-01-26 Yao Qi <yao.qi@linaro.org> * linux-arm-low.c (arm_gdbserver_get_next_pcs): Remove argument pc. * linux-low.c (install_software_single_step_breakpoints): Don't call regcache_read_pc. * linux-low.h (struct linux_target_ops) <get_next_pcs>: Remove argument pc.
2016-01-14[ARM] Make thumb2_breakpoint static againYao Qi2-6/+7
This patch makes thumb2_breakpoint static. When writing this patch, I find the only reason we keep thumb2_breakpoint extern is that it is used as an argument passed to arm_gdbserver_get_next_pcs. However, field arm_thumb2_breakpoint is only used in a null check in thumb_get_next_pcs_raw, so I wonder why do need to pass thumb2_breakpoint to arm_gdbserver_get_next_pcs. thumb2_breakpoint was added by Daniel Jacobowitz in order to support single-step IT block https://sourceware.org/ml/gdb-patches/2010-01/msg00624.html the logic there was if we have 32-bit thumb-2 breakpoint defined, we can safely single-step IT block, otherwise, we can't. Daniel didn't want to use 16-bit thumb BKPT instruction, because it triggers even on instruction which should be executed. Secondly, using 16-bit thumb illegal instruction on top of 32-bit thumb instruction may break the meaning of original IT blocks, because the other 16-bit can be regarded as an instruction. See more explanations from Daniel's kernel patch http://www.spinics.net/lists/arm-kernel/msg80476.html Let us back to this patch, GDB/GDBserver can safely single step IT block if thumb2_breakpoint is defined, but the single step logic doesn't have to know the thumb-2 breakpoint instruction. Only breakpoint insertion mechanism decides to use which breakpoint instruction. In the software single step code, instead of pass thumb2_breakpoint, we can pass a boolean variable has_thumb2_breakpoint indicate whether the target has thumb-2 breakpoint defined, which is equivalent to the original code. Regression tested on arm-linux. No regression. gdb: 2016-01-14 Yao Qi <yao.qi@linaro.org> * arch/arm-get-next-pcs.c (arm_get_next_pcs_ctor): Change argument arm_thumb2_breakpoint to has_thumb2_breakpoint. (thumb_get_next_pcs_raw): Check has_thumb2_breakpoint instead. * arch/arm-get-next-pcs.h (struct arm_get_next_pcs) <arm_thumb2_breakpoint>: Remove. <has_thumb2_breakpoint>: New field. (arm_get_next_pcs_ctor): Update declaration. * arm-linux-tdep.c (arm_linux_software_single_step): Pass 1 to arm_get_next_pcs_ctor. * arm-tdep.c (arm_software_single_step): Pass 0 to arm_get_next_pcs_ctor. gdb/gdbserver: 2016-01-14 Yao Qi <yao.qi@linaro.org> * linux-aarch32-low.c (thumb2_breakpoint): Make it static. * linux-aarch32-low.h (thumb2_breakpoint): Remove declaration. * linux-arm-low.c (arm_gdbserver_get_next_pcs): Pass 1 to arm_get_next_pcs_ctor.
2016-01-13Read instruction with byte_order_for_codeYao Qi1-1/+2
When reading instruction, we should use byte_order_for_code instead of byte_order. gdb: 2016-01-13 Yao Qi <yao.qi@linaro.org> * arch/arm-get-next-pcs.c (arm_get_next_pcs_raw): Use byte_order_for_code to read instruction.
2016-01-06Make {arm,thumb}_get_next_pcs_raw staticYao Qi2-38/+28
This patch makes arm_get_next_pcs_raw and thumb_get_next_pcs_raw static. gdb: 2016-01-06 Yao Qi <yao.qi@linaro.org> * arch/arm-get-next-pcs.c (arm_get_next_pcs): Move it to some lines below. (thumb_get_next_pcs_raw): Make it static. (arm_get_next_pcs_raw): Likewise. * arch/arm-get-next-pcs.h (thumb_get_next_pcs_raw): Remove the declaration. (arm_get_next_pcs_raw): Likewise.
2016-01-01GDB copyright headers update after running GDB's copyright.py script.Joel Brobecker9-9/+9
gdb/ChangeLog: Update year range in copyright notice of all files.
2015-12-19Fix ARI warning in gdb/arch/arm-get-next-pcs.cJoel Brobecker1-1/+1
gdb/ChangeLog: * arch/arm-get-next-pcs.c (arm_get_next_pcs_raw): Remove trailing newline at end of error message.
2015-12-18Support software single step on ARM in GDBServerAntoine Tremblay6-0/+1445
This patch teaches GDBServer how to software single step on ARM linux by sharing code with GDB. The arm_get_next_pcs function in GDB is now shared with GDBServer. So that GDBServer can use the function to return the possible addresses of the next PC. A proper shared context was also needed so that we could share the code, this context is described in the arm_get_next_pcs structure. Testing : No regressions, tested on ubuntu 14.04 ARMv7 and x86. With gdbserver-{native,extended} / { -marm -mthumb } gdb/ChangeLog: * Makefile.in (ALL_TARGET_OBS): Append arm-get-next-pcs.o, arm-linux.o. (ALLDEPFILES): Append arm-get-next-pcs.c, arm-linux.c (arm-linux.o): New rule. (arm-get-next-pcs.o): New rule. * arch/arm-get-next-pcs.c: New file. * arch/arm-get-next-pcs.h: New file. * arch/arm-linux.h: New file. * arch/arm-linux.c: New file. * arm.c: Include common-regcache.c. (thumb_advance_itstate): Moved from arm-tdep.c. (arm_instruction_changes_pc): Likewise. (thumb_instruction_changes_pc): Likewise. (thumb2_instruction_changes_pc): Likewise. (shifted_reg_val): Likewise. * arm.h (submask): Move macro from arm-tdep.h (bit): Likewise. (bits): Likewise. (sbits): Likewise. (BranchDest): Likewise. (thumb_advance_itstate): Moved declaration from arm-tdep.h (arm_instruction_changes_pc): Likewise. (thumb_instruction_changes_pc): Likewise. (thumb2_instruction_changes_pc): Likewise. (shifted_reg_val): Likewise. * arm-linux-tdep.c: Include arch/arm.h, arch/arm-get-next-pcs.h arch/arm-linux.h. (arm_linux_get_next_pcs_ops): New struct. (ARM_SIGCONTEXT_R0, ARM_UCONTEXT_SIGCONTEXT, ARM_OLD_RT_SIGFRAME_SIGINFO, ARM_OLD_RT_SIGFRAME_UCONTEXT, ARM_NEW_RT_SIGFRAME_UCONTEXT, ARM_NEW_SIGFRAME_MAGIC): Move stack layout defines to arch/arm-linux.h. (arm_linux_sigreturn_next_pc_offset): Move to arch/arm-linux.c. (arm_linux_software_single_step): Adjust for arm_get_next_pcs implementation. * arm-tdep.c: Include arch/arm-get-next-pcs.h. (arm_get_next_pcs_ops): New struct. (submask): Move macro to arm.h. (bit): Likewise. (bits): Likewise. (sbits): Likewise. (BranchDest): Likewise. (thumb_instruction_changes_pc): Move to arm.c (thumb2_instruction_changes_pc): Likewise. (arm_instruction_changes_pc): Likewise. (shifted_reg_val): Likewise. (thumb_advance_itstate): Likewise. (thumb_get_next_pc_raw): Move to arm-get-next-pcs.c. (arm_get_next_pc_raw): Likewise. (arm_get_next_pc): Likewise. (thumb_deal_with_atomic_sequence_raw): Likewise. (arm_deal_with_atomic_sequence_raw): Likewise. (arm_deal_with_atomic_sequence): Likewise. (arm_get_next_pcs_read_memory_unsigned_integer): New function. (arm_get_next_pcs_addr_bits_remove): Likewise. (arm_get_next_pcs_syscall_next_pc): Likewise. (arm_get_next_pcs_is_thumb): Likewise. (arm_software_single_step): Adjust for arm_get_next_pcs implementation. * arm-tdep.h: (arm_get_next_pc): Remove declaration. (arm_get_next_pcs_read_memory_unsigned_integer): New declaration. (arm_get_next_pcs_addr_bits_remove): Likewise. (arm_get_next_pcs_syscall_next_pc): Likewise. (arm_get_next_pcs_is_thumb): Likewise. (arm_deal_with_atomic_sequence: Remove declaration. * common/gdb_vecs.h: Add CORE_ADDR vector definition. * configure.tgt (aarch64*-*-linux): Add arm-get-next-pcs.o, arm-linux.o. (arm*-wince-pe): Add arm-get-next-pcs.o. (arm*-*-linux*): Add arm-get-next-pcs.o, arm-linux.o, arm-get-next-pcs.o (arm*-*-netbsd*,arm*-*-knetbsd*-gnu): Add arm-get-next-pcs.o. (arm*-*-openbsd*): Likewise. (arm*-*-symbianelf*): Likewise. (arm*-*-*): Likewise. * symtab.h: Move CORE_ADDR vector definition to gdb_vecs.h. gdb/gdbserver/ChangeLog: * Makefile.in (SFILES): Append arch/arm-linux.c, arch/arm-get-next-pcs.c. (arm-linux.o): New rule. (arm-get-next-pcs.o): New rule. * configure.srv (arm*-*-linux*): Add arm-get-next-pcs.o, arm-linux.o. * linux-aarch32-low.c (arm_abi_breakpoint): Remove macro. Moved to linux-aarch32-low.c. (arm_eabi_breakpoint, arm_breakpoint): Likewise. (arm_breakpoint_len, thumb_breakpoint): Likewise. (thumb_breakpoint_len, thumb2_breakpoint): Likewise. (thumb2_breakpoint_len): Likewise. (arm_is_thumb_mode): Make non-static. * linux-aarch32-low.h (arm_abi_breakpoint): New macro. Moved from linux-aarch32-low.c. (arm_eabi_breakpoint, arm_breakpoint): Likewise. (arm_breakpoint_len, thumb_breakpoint): Likewise. (thumb_breakpoint_len, thumb2_breakpoint): Likewise. (thumb2_breakpoint_len): Likewise. (arm_is_thumb_mode): New declaration. * linux-arm-low.c: Include arch/arm-linux.h aarch/arm-get-next-pcs.h, sys/syscall.h. (get_next_pcs_ops): New struct. (get_next_pcs_addr_bits_remove): New function. (get_next_pcs_is_thumb): New function. (get_next_pcs_read_memory_unsigned_integer): Likewise. (arm_sigreturn_next_pc): Likewise. (get_next_pcs_syscall_next_pc): Likewise. (arm_gdbserver_get_next_pcs): Likewise. (struct linux_target_ops) <arm_gdbserver_get_next_pcs>: Initialize. * linux-low.h: Move CORE_ADDR vector definition to gdb_vecs.h. * server.h: Include gdb_vecs.h.
2015-12-18Share some ARM target dependent code from GDB with GDBServerAntoine Tremblay2-2/+94
This patch is in preparation for software single stepping support on ARM it shares some functions and definitions that will be needed. No regressions, tested on ubuntu 14.04 ARMv7 and x86. With gdbserver-{native,extended} / { -marm -mthumb } Not tested: wince/bsd build. gdb/ChangeLog: * arch/arm.c (bitcount): Move from arm-tdep.c. (condition_true): Likewise. * arch/arm.h (Instruction Definitions): Move form arm-tdep.h. (condition_true): Move defenition from arm-tdep.h. (bitcount): Likewise. * arm-tdep.c (condition_true): Move to arch/arm.c. (bitcount): Likewise. * arm-tdep.h (Instruction Definitions): Move to arch/arm.h. * arm-wince-tdep.c: Include arch/arm.h. * armnbsd-tdep.c: Likewise.
2015-10-21Implement breakpoint_kind_from_pc and sw_breakpoint_from_kind for ARM in ↵Antoine Tremblay2-1/+44
GDBServer. ARM can have multiple breakpoint types based on the instruction set it's currently in: arm, thumb or thumb2. GDBServer needs to know what breakpoint is to be inserted at location when inserting a breakpoint. This is handled by the breakpoint_kind_from_pc and sw_breakpoint_from_kind target ops introduced in a previous patch, this patch adds the arm_breakpoint_kind_from_pc and arm_sw_breakpoint_from_kind implementation so that the proper breakpoint type is returned based on the pc. Also in order to share some code with GDB a new file called arm.c have been introduced in arch/. While this file does not contain much yet future patches will add more to it thus the inclusion at this stage. No regressions on Ubuntu 14.04 on ARMv7 and x86. With gdbserver-{native,extended} / { -marm -mthumb } gdb/ChangeLog: * Makefile.in: Add arm.c/o. * arch/arm.c: New file. * arch/arm.h: (IS_THUMB_ADDR): Move macro from arm-tdep.c. (MAKE_THUMB_ADDR): Likewise. (UNMAKE_THUMB_ADDR): Likewise. * arm-tdep.c (int thumb_insn_size): Move to arm.c. (IS_THUMB_ADDR): Move to arm.h. (MAKE_THUMB_ADDR): Likewise. (UNMAKE_THUMB_ADDR): Likewise. * configure.tgt: Add arm.o to all ARM configs. gdb/gdbserver/ChangeLog: * Makefile.in: Add arm.c/o. * configure.srv: Likewise. * linux-arm-low.c (arm_breakpoint_kinds): New enum. (arm_breakpoint_kind_from_pc): New function. (arm_sw_breakpoint_from_kind): Return proper kind. (struct linux_target_ops) <breakpoint_kind_from_pc>: Initialize.
2015-10-14Define enum out of structYao Qi1-6/+9
This patch moves the definition of enum out of the scope of struct aarch64_memory_operand, otherwise it breaks GDB build in c++ mode. gdb: 2015-10-14 Yao Qi <yao.qi@linaro.org> * arch/aarch64-insn.h (struct aarch64_memory_operand): Move enum out of it. (enum aarch64_memory_operand_type): New.
2015-10-12Rename emit_load_store to aarch64_emit_load_storeYao Qi2-12/+12
Likewise, this patch renames emit_load_store to aarch64_emit_load_store. gdb: 2015-10-12 Yao Qi <yao.qi@linaro.org> * arch/aarch64-insn.c (emit_load_store): Rename to ... (aarch64_emit_load_store): ... it. All callers updated. gdb/gdbserver: 2015-10-12 Yao Qi <yao.qi@linaro.org> * linux-aarch64-low.c: Update all callers as emit_load_store is renamed to aarch64_emit_load_store.
2015-10-12Rename emit_insn to aarch64_emit_insnYao Qi2-32/+33
As emit_insn becomes extern, the prefix "aarch64_" is needed. This patch renames emit_insn to aarch64_emit_insn. gdb: 2015-10-12 Yao Qi <yao.qi@linaro.org> * arch/aarch64-insn.c (emit_insn): Rename to ... (aarch64_emit_insn): ... it. All callers updated. gdb/gdbserver: 2015-10-12 Yao Qi <yao.qi@linaro.org> * linux-aarch64-low.c: Update all callers of function renaming from emit_insn to aarch64_emit_insn.
2015-10-12Support displaced stepping in aarch64-linuxYao Qi2-0/+290
This patch is to support displaced stepping in aarch64-linux. A visitor is implemented for displaced stepping, and used to record information to fixup pc after displaced stepping if needed. Some emit_* functions are converted to macros, and moved to arch/aarch64-insn.{c,h} so that they can be shared. gdb: 2015-10-12 Yao Qi <yao.qi@linaro.org> * aarch64-linux-tdep.c: Include arch-utils.h. (aarch64_linux_init_abi): Call set_gdbarch_max_insn_length, set_gdbarch_displaced_step_copy_insn, set_gdbarch_displaced_step_fixup, set_gdbarch_displaced_step_free_closure, set_gdbarch_displaced_step_location, and set_gdbarch_displaced_step_hw_singlestep. * aarch64-tdep.c (struct displaced_step_closure): New. (struct aarch64_displaced_step_data): New. (aarch64_displaced_step_b): New function. (aarch64_displaced_step_b_cond): Likewise. (aarch64_register): Likewise. (aarch64_displaced_step_cb): Likewise. (aarch64_displaced_step_tb): Likewise. (aarch64_displaced_step_adr): Likewise. (aarch64_displaced_step_ldr_literal): Likewise. (aarch64_displaced_step_others): Likewise. (aarch64_displaced_step_copy_insn): Likewise. (aarch64_displaced_step_fixup): Likewise. (aarch64_displaced_step_hw_singlestep): Likewise. * aarch64-tdep.h (DISPLACED_MODIFIED_INSNS): New macro. (aarch64_displaced_step_copy_insn): Declare. (aarch64_displaced_step_fixup): Declare. (aarch64_displaced_step_hw_singlestep): Declare. * arch/aarch64-insn.c (emit_insn): Moved from gdbserver/linux-aarch64-low.c. (emit_load_store): Likewise. * arch/aarch64-insn.h (enum aarch64_opcodes): Moved from gdbserver/linux-aarch64-low.c. (struct aarch64_register): Likewise. (struct aarch64_memory_operand): Likewise. (ENCODE): Likewise. (can_encode_int32): New macro. (emit_b, emit_bcond, emit_cb, emit_ldr, emit_ldrsw): Likewise. (emit_tb, emit_nop): Likewise. (emit_insn): Declare. (emit_load_store): Declare. gdb/gdbserver: 2015-10-12 Yao Qi <yao.qi@linaro.org> * linux-aarch64-low.c (enum aarch64_opcodes): Move to arch/aarch64-insn.h. (struct aarch64_memory_operand): Likewise. (ENCODE): Likewise. (emit_insn): Move to arch/aarch64-insn.c. (emit_b, emit_bcond, emit_cb, emit_tb): Remove. (emit_load_store): Move to arch/aarch64-insn.c. (emit_ldr, emit_ldrb, emit_ldrsw, emit_nop): Remove. (can_encode_int32): Remove.
2015-10-12Move aarch64_relocate_instruction to arch/aarch64-insn.cYao Qi2-0/+143
This patch moves aarch64_relocate_instruction and visitor class to arch/aarch64-insn.c, so that both GDB and GDBserver can use it. gdb: 2015-10-12 Yao Qi <yao.qi@linaro.org> * arch/aarch64-insn.c (aarch64_decode_ldr_literal): Moved from gdbserver/linux-aarch64-low.c. (aarch64_relocate_instruction): Likewise. * arch/aarch64-insn.h (aarch64_decode_ldr_literal): Declare. (struct aarch64_insn_data): Moved from gdbserver/linux-aarch64-low.c. (struct aarch64_insn_visitor): Likewise. (aarch64_relocate_instruction): Declare. gdb/gdbserver: 2015-10-12 Yao Qi <yao.qi@linaro.org> * linux-aarch64-low.c (extract_signed_bitfield): Remove. (aarch64_decode_ldr_literal): Move to gdb/arch/aarch64-insn.c. (aarch64_relocate_instruction): Likewise. (struct aarch64_insn_data): Move to gdb/arch/aarch64-insn.h. (struct aarch64_insn_visitor): Likewise.
2015-09-21Make aarch64_decode_adrp handle both ADR and ADRP instructionsPierre Langlois2-6/+26
We will need to decode both ADR and ADRP instructions in GDBserver. This patch makes common code handle both cases, even if GDB only needs to decode the ADRP instruction. gdb/ChangeLog: * aarch64-tdep.c (aarch64_analyze_prologue): New is_adrp variable. Call aarch64_decode_adr instead of aarch64_decode_adrp. * arch/aarch64-insn.h (aarch64_decode_adrp): Delete. (aarch64_decode_adr): New function declaration. * arch/aarch64-insn.c (aarch64_decode_adrp): Delete. (aarch64_decode_adr): New function, factored out from aarch64_decode_adrp to decode both adr and adrp instructions.
2015-09-21Move instruction decoding into new arch/ directoryPierre Langlois2-0/+256
This patch moves the following functions into the arch/ common directory, in new files arch/aarch64-insn.{h,c}. They are prefixed with 'aarch64_': - aarch64_decode_adrp - aarch64_decode_b - aarch64_decode_cb - aarch64_decode_tb We will need them to implement fast tracepoints in GDBserver. For consistency, this patch also adds the 'aarch64_' prefix to static decoding functions that do not need to be shared right now. V2: make sure the formatting issues propagated fix `gdbserver/configure.srv'. gdb/ChangeLog: * Makefile.in (ALL_64_TARGET_OBS): Add aarch64-insn.o. (HFILES_NO_SRCDIR): Add arch/aarch64-insn.h. (aarch64-insn.o): New rule. * configure.tgt (aarch64*-*-elf): Add aarch64-insn.o. (aarch64*-*-linux*): Likewise. * arch/aarch64-insn.c: New file. * arch/aarch64-insn.h: New file. * aarch64-tdep.c: Include arch/aarch64-insn.h. (aarch64_debug): Move to arch/aarch64-insn.c. Declare in arch/aarch64-insn.h. (decode_add_sub_imm): Rename to ... (aarch64_decode_add_sub_imm): ... this. (decode_adrp): Rename to ... (aarch64_decode_adrp): ... this. Move to arch/aarch64-insn.c. Declare in arch/aarch64-insn.h. (decode_b): Rename to ... (aarch64_decode_b): ... this. Move to arch/aarch64-insn.c. Declare in arch/aarch64-insn.h. (decode_bcond): Rename to ... (aarch64_decode_bcond): ... this. Move to arch/aarch64-insn.c. Declare in arch/aarch64-insn.h. (decode_br): Rename to ... (aarch64_decode_br): ... this. (decode_cb): Rename to ... (aarch64_decode_cb): ... this. Move to arch/aarch64-insn.c. Declare in arch/aarch64-insn.h. (decode_eret): Rename to ... (aarch64_decode_eret): ... this. (decode_movz): Rename to ... (aarch64_decode_movz): ... this. (decode_orr_shifted_register_x): Rename to ... (aarch64_decode_orr_shifted_register_x): ... this. (decode_ret): Rename to ... (aarch64_decode_ret): ... this. (decode_stp_offset): Rename to ... (aarch64_decode_stp_offset): ... this. (decode_stp_offset_wb): Rename to ... (aarch64_decode_stp_offset_wb): ... this. (decode_stur): Rename to ... (aarch64_decode_stur): ... this. (decode_tb): Rename to ... (aarch64_decode_tb): ... this. Move to arch/aarch64-insn.c. Declare in arch/aarch64-insn.h. (aarch64_analyze_prologue): Adjust calls to renamed functions. gdb/gdbserver/ChangeLog: * Makefile.in (aarch64-insn.o): New rule. * configure.srv (aarch64*-*-linux*): Add aarch64-insn.o.
2015-08-21xtensa: implement NPTL helpersMax Filippov1-0/+46
These changes allow debugging multithreaded NPTL xtensa applications. 2015-08-20 Max Filippov <jcmvbkbc@gmail.com> gdb/gdbserver/ * configure.srv (xtensa*-*-linux*): Add srv_linux_thread_db=yes. * linux-xtensa-low.c (arch/xtensa.h gdb_proc_service.h): New #includes. (ps_get_thread_area): New function. 2015-08-20 Max Filippov <jcmvbkbc@gmail.com> gdb/ * arch/xtensa.h: New file. * xtensa-linux-nat.c (gdb_proc_service.h): New #include. (ps_get_thread_area): New function. * xtensa-linux-tdep.c (xtensa_linux_init_abi): Add call to set_gdbarch_fetch_tls_load_module_address to enable TLS support. * xtensa-tdep.c (osabi.h): New #include. (xtensa_gdbarch_init): Call gdbarch_init_osabi to register xtensa-specific hooks. * xtensa-tdep.h (struct xtensa_elf_gregset_t): Add threadptr member and move the structure to arch/xtensa.h.
2015-07-30Move ARM register numbers enum to arch/arm.hYao Qi1-0/+61
This patch moves ARM register numbers enum to arch/arm.h, so that it can used by GDBserver too. This patch also creates a new directory gdb/arch in which arch-specific or target-specific files are placed. gdb: 2015-07-30 Yao Qi <yao.qi@linaro.org> * arm-tdep.h (enum gdb_regnum): Move it to ... * arch/arm.h: ... here. New file. * Makefile.in (HFILES_NO_SRCDIR): Add arch/arm.h.
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