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2018-09-14x86: Support VEX/EVEX WIG encodingH.J. Lu2-17/+21
2018-09-14x86: Handle unsupported static rounding in vcvt[u]si2sd in 32-bit modeH.J. Lu2-2/+7
2018-09-14x86: Properly decode EVEX.W in vcvt[u]si2s[sd] in 32-bit modeH.J. Lu4-0/+35
2018-09-14csky: Support PC relative diff relocationLifang Xia3-0/+18
2018-09-14x86: fold CRC32 templatesJan Beulich2-11/+12
2018-09-13x86: Swap destination/source to encode VEX only if possibleH.J. Lu2-3/+9
2018-09-13x86: also allow D on 3-operand insnsJan Beulich2-19/+29
2018-09-13x86: use D attribute also for SIMD templatesJan Beulich6-9/+126
2018-09-13x86: fold ILP32 output of "opts" testsJan Beulich5-1296/+12
2018-09-13x86: improve operand reversalJan Beulich6-11/+970
2018-09-13x86: add code comment on deprecated status of pseudo-suffixesJan Beulich2-1/+7
2018-09-13x86-64: bndmk, bndldx, and bndstx don't allow RIP-relative addressingJan Beulich3-0/+14
2018-09-13Fix the use by the RL78 assembler of an uninitialised field in the expresion ...Nick Clifton2-0/+22
2018-09-06PR23570, AVR .noinit section defaults to PROGBITSAlan Modra2-19/+5
2018-09-04gas, sparc: Allow non-fpop2 instructions before floating point branchesDaniel Cederman5-5/+44
2018-09-03Change the .section directive for the AVR assembler so that the .noinit secti...Nick Clifton2-0/+26
2018-08-31RISC-V: Correct the requirement of compressed floating point instructionsJim Wilson4-0/+15
2018-08-31gas/elf/section14.d: Change skip to xfailH.J. Lu3-1/+16
2018-08-31PowerPC64 higher REL16 relocationsAlan Modra3-13/+51
2018-08-31gas: Pass -mx86-used-note=no to assemblerH.J. Lu2-1/+10
2018-08-31x86: pass -mx86-used-note=no to assemblerH.J. Lu2-0/+6
2018-08-31x86: Add explicit -mx86-used-note=[yes|no] to testsH.J. Lu19-1/+39
2018-08-31x86: Extend assembler to generate GNU property notesH.J. Lu8-14/+385
2018-08-30sparc: gas: leon.d: disassemble assuming v8 also in sparc64 targets.Jose E. Marchesi2-1/+6
2018-08-30RISC-V: Allow instruction require more than one extensionJim Wilson2-11/+32
2018-08-30Skip elf/section14 test for h8300 targetsH.J. Lu2-0/+7
2018-08-30Treat SHT_FINI_ARRAY and SHT_PREINIT_ARRAY as relocatable sectionsH.J. Lu4-0/+35
2018-08-29sparc/leon: add support for partial write psr instructionMartin Aberg4-0/+26
2018-08-29[MIPS] Add Loongson 2K1000 proccessor support.Chenghua Xu3-1/+11
2018-08-29[MIPS] Add Loongson 3A2000/3A3000 proccessor support.Chenghua Xu3-1/+11
2018-08-29[MIPS] Add Loongson 3A1000 proccessor support.Chenghua Xu5-6/+19
2018-08-29[MIPS/GAS] Add Loongson EXT2 Instructions support.Chenghua Xu8-1/+96
2018-08-29[MIPS/GAS] Split Loongson EXT Instructions from loongson3a.Chenghua Xu6-2/+58
2018-08-29[MIPS/GAS] Split Loongson CAM Instructions from loongson3aChenghua Xu11-11/+102
2018-08-27x86: Don't mask out the GNU_PROPERTY_X86_UINT32_VALID bitH.J. Lu5-0/+57
2018-08-23RISC-V: Reject empty rouding mode and fence operand.Jim Wilson8-0/+34
2018-08-23Prune BFD warnings for unknown GNU propertiesH.J. Lu3-2/+21
2018-08-22Fix typo in changelog entry for handling of undocumnented Z80 SLI instruction.Nick Clifton1-1/+1
2018-08-22Re: Pack reloc_howto_structAlan Modra2-2/+6
2018-08-21Fix handling of undocumented SLL instruction for the Z80 target.Arnold Metselaar2-13/+40
2018-08-21Fix invalid strcpy on unterminated bufferAndreas Schwab2-1/+7
2018-08-21Use operand->extract to provide defaults for optional PowerPC operandsAlan Modra2-78/+81
2018-08-21Fix s12z test regexpsAlan Modra2-6/+10
2018-08-20Tidy bit twiddlingAlan Modra1-3/+3
2018-08-18Opcodes: (BRCLR / BRSET) Disassemble reserved codes instead of aborting.John Darrington4-0/+37
2018-08-18S12Z: Move opcode header to public include directory.John Darrington1-1/+1
2018-08-14x86-64: Display eiz for address with the addr32 prefixH.J. Lu7-14/+34
2018-08-14When the assembler reports that the input and output are the same, report the...Robert Yang2-7/+24
2018-08-11x86: Add CpuCMOV and CpuFXSRH.J. Lu3-3/+20
2018-08-10x86: Don't display --32/--64/--x32 without BFD64H.J. Lu3-3/+17
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