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2013-04-29 * elflink.c (_bfd_elf_gc_mark_extra_sections): Remove mark fromNick Clifton8-24/+94
fragmented .debug_line sections associated with unmarked code sections. * dwarf.c (read_debug_line_header): New function. Reads in a header in a .debug_line section. (display_debug_lines_raw): Use new function. Handle fragmentary .debug_line sections. (display_debug_lines_decoded): Likewise. * readelf.c (process_section_headers): Handle fragmenatry .debug_line sections. (display_debug_section): Likewise. * as.c (Options): Add -gdwarf-sections. (parse_args): Likewise. * as.h (flag_dwarf_sections): Declare. * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes. (process_entries): When -gdwarf-sections is enabled generate fragmentary .debug_line sections. (out_debug_line): Set the section for the .debug_line section end symbol. * doc/as.texinfo: Document -gdwarf-sections. * NEWS: Mention -gdwarf-sections. * gas/elf/dwarf2-3.d: Fix expected readelf output. * scripttempl/DWARF.sc: Add support for .debug_line.* and .debug_line_end.
2013-04-26fix changelog entry: we still have 2013, not 2014Christian Groessler1-1/+1
2013-04-26 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdlineChristian Groessler2-7/+15
according to the target parameter. Don't call s_segm since s_segm calls bfd_set_arch_mach using stdoutput, but stdoutput isn't initialized yet. (md_begin): Call s_segm according to target parameter from command line.
2013-04-26Add missing test files from 2013-03-21 commit.Will Newton3-0/+22
2013-04-25bfd/Alan Modra3-12/+5
* config.bfd: Add powerpc64le-linux. gas/ * configure.in: Allow little-endian linux. * configure: Regenerate. gold/ * configure.tgt: Add powerpcle and powerpc64le. ld/ * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32lppclinux.c. (eelf32lppclinux.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Merge powerpc-linux and other powerpc-elf targets with corresponding little-endian targets. * emulparams/elf32lppc.sh: Update comment. * emulparams/elf32lppclinux.sh: New.
2013-04-242013-04-24 Sandra Loosemore <sandra@codesourcery.com>Sandra Loosemore2-1/+6
gas/ * config/tc-nios2.c (nios2_control_register_arg_p): Rename "fstatus" control register to "eccinj". opcodes/ * nios2-opc.c (nios2_builtin_reg): Rename "fstatus" control register to "eccinj".
2013-04-24Enable x32 for x86_64-*-elf*H.J. Lu3-0/+7
This patch enables x32 for x86_64-*-elf* for embedded target and disables rex tests since it uses '/' as prefix separator which is `\' for x86_64-*-elf*. bfd/ * config.bfd (targ_selvecs): Add bfd_elf32_x86_64_vec for x86_64-*-elf*. gas/testsuite/ * gas/i386/rex.d: Skip x86_64-*-elf*. * gas/i386/ilp32/rex.d: Likewise. ld/ * configure.tgt (targ_extra_emuls): Adds elf32_x86_64 for x86_64-*-elf*. (targ_extra_libpath): Likewise. (tdir_elf_i386): Replace x86_64 with i386 for x86_64-*-elf*.
2013-04-19 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.Kai Tietz2-1/+9
2013-04-15 gas/Julian Brown16-75/+91
* expr.c (add_to_result, subtract_from_result): Make global. * expr.h (add_to_result, subtract_from_result): Add prototypes. * config/tc-sh.c (sh_optimize_expr): Use add_to_result, subtract_from_result to handle extra bit of precision for .sleb128 directive operands. gas/testsuite/ * gas/all/gas.exp (sleb128-7): Don't run for tic4x, tic54x. * gas/all/sleb128-2.s: Reformat, use _ at start of labels, remove cruft. * gas/all/sleb128-3.s: Likewise. * gas/all/sleb128-4.s: Likewise. * gas/all/sleb128-5.s: Likewise. * gas/all/sleb128-7.s: Likewise. * gas/all/sleb128-2.d: Handle data sections named $DATA$. * gas/all/sleb128-3.d: Likewise. * gas/all/sleb128-4.d: Likewise. * gas/all/sleb128-5.d: Likewise. * gas/all/sleb128-7.d: Likewise.
2013-04-11 gas/Julian Brown16-17/+202
* read.c (convert_to_bignum): Add sign parameter. Use it instead of X_unsigned to determine sign of resulting bignum. (emit_expr): Pass extra argument to convert_to_bignum. (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass X_extrabit to convert_to_bignum. (parse_bitfield_cons): Set X_extrabit. * expr.c (make_expr_symbol, expr_build_uconstant, operand): Initialise X_extrabit field as appropriate. (add_to_result): New. (subtract_from_result): New. (expr): Use above. * expr.h (expressionS): Add X_extrabit field. gas/testsuite/ * gas/all/sleb128-2.s: New test. * gas/all/sleb128-3.s: Likewise. * gas/all/sleb128-4.s: Likewise. * gas/all/sleb128-5.s: Likewise. * gas/all/sleb128-7.s: Likewise. * gas/all/sleb128-2.d: New. * gas/all/sleb128-3.d: New. * gas/all/sleb123-4.d: New. * gas/all/sleb123-5.d: New. * gas/all/sleb123-7.d: New. * gas/all/gas.exp (sleb128-2, sleb128-3, sleb128-4, sleb128-5) (sleb128-7): Run new tests.
2013-04-10gas/Jan Beulich6-20/+52
2013-04-10 Jan Beulich <jbeulich@suse.com> * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base register being PC when is_t or writeback, and use distinct diagnostic for the latter case. gas/testsuite/ 2013-04-10 Jan Beulich <jbeulich@suse.com> * gas/testsuite/gas/arm/ldst-pc.s: Add index, non-writeback forms of various loads and stores with PC as base. * gas/testsuite/gas/arm/ldst-pc.d: Update accordingly.
2013-04-10gas/Jan Beulich11-139/+48
2013-04-10 Jan Beulich <jbeulich@suse.com> * gas/config/tc-arm.c (parse_operands): Re-write po_barrier_or_imm(). (do_barrier): Remove bogus constraint(). (do_t_barrier): Remove. gas/testsuite/ 2013-04-10 Jan Beulich <jbeulich@suse.com> * gas/arm/barrier-bad.d: Change title. * gas/arm/barrier-bad.s: Add immediate form of ISB and DSB as well as one symbolic form of DSB. * gas/arm/barrier-bad.l: Update accordingly. * gas/arm/barrier-bad-thumb.d: Adjust title. Use barrier-bad.s as source. Pass -mthumb to gas. * gas/arm/barrier-bad-thumb.l: Remove. * gas/arm/barrier-bad-thumb.s: Remove. * gas/arm/barrier-thumb.d: Adjust title. Use barrier.s as source. Pass -mthumb to gas. * gas/arm/barrier-thumb.s: Remove.
2013-04-09 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,Nick Clifton3-17/+34
ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2, ATmega2564RFR2 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
2013-04-09gas/Jan Beulich5-34/+40
2013-04-09 Jan Beulich <jbeulich@suse.com> * gas/config/tc-arm.c (do_vmrs): Accept all control registers. Use local variable Rt in more places. (do_vmsr): Accept all control registers. gas/testsuite/ 2013-04-09 Jan Beulich <jbeulich@suse.com> * gas/arm/vfp1xD.s: Add VMRS/VMSR tests with FPINST, FPINST2, and C15. * gas/arm/vfp1xD.d: Update accordingly.
2013-04-09gas/Jan Beulich5-0/+38
2013-04-09 Jan Beulich <jbeulich@suse.com> * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix if there was none specified for moves between scalar and core register. gas/testsuite/ 2013-04-09 Jan Beulich <jbeulich@suse.com> * gas/arm/neon-omit.s: Add tests for suffix less VMOV. * gas/arm/neon-omit.d: Update accordingly.
2013-04-09gas/Jan Beulich5-9/+33
2013-04-09 Jan Beulich <jbeulich@suse.com> * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the NEON_ALL_LANES case. gas/testsuite/ 2013-04-09 Jan Beulich <jbeulich@suse.com> * gas/arm/neon-addressing-bad.s: Add test for further invalid VST operands. * gas/arm/neon-addressing-bad.l: Update accordingly.
2013-04-08gas/testsuite/Jan Beulich4-7/+24
2013-04-08 Jan Beulich <jbeulich@suse.com> * gas/i386/x86-64-opcode.s: Flesh out LOOP and J*CXZ sections. Correct comments in Jcc section. * gas/i386/x86-64-opcode.d: Refresh. * gas/i386/ilp32/x86-64-opcode.d: Refresh. opcodes/ 2013-04-08 Jan Beulich <jbeulich@suse.com> * i386-opc.tbl: Fold 64-bit and non-64-bit jecxz entries. * i386-tbl.h: Re-generate.
2013-04-08gas/Jan Beulich2-3/+8
2013-04-08 Jan Beulich <jbeulich@suse.com> * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for PC-relative VSTR.
2013-04-08gas/Jan Beulich2-1/+6
2013-04-08 Jan Beulich <jbeulich@suse.com> * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq entry to sp_fiq.
2013-04-06Increase the accuracy of sparc instruction aliases.David S. Miller15-103/+274
Make current with UA2011 specification. Add an F_PREFERRED opcode flag that indicates a preferred alias when multiple aliases for the same opcode exists. For 'lzd': Add 'lzcnt' as primary instruction, and make 'lzd' an alias. Add 'ldtw', 'ldtwa', 'sttw', 'sttwa': The modern opcode for for 'ldd', 'ldda', 'std', and 'stda' on integer registers. Mark the latter now as aliases. For 'flush': Support "[address]" syntax as well as plain "address". Rework 'mov' aliases for 'wr': Eliminate bogus three operand moves, and encode the instructions properly for the "mov REG, %ASR" cases, specifically we should encode the register in rs2 not rs1 as per The SPARC V8 Architecture Manual. Add missing cbcond aliases: c{w,x}bz, c{w,x}blu, c{w,x}bnz, c{w,x}bgeu Add 'd' suffix VIS logical ops: The primary opcode for 'fzero' is now 'fzerod' (compare with 'fzeros'), for example. And thus 'fzero' is now an alias. Add modern opcodes for condition code setting edge instructions: They are now edgeN{,l}cc instead of plain edgeN{,l}. Add modern opcodes for VIS comparisons: All VIS comparisons now start with prefix "fp", retain the older variants as aliases. The signed variants for equal and not-equal have "u" aliases to show that these comparisons are equally suited for unsigned compares. Update existing test cases as needed, and add several new ones. include/opcode/ * sparc.h (F_PREFERRED): Define. (F_PREF_ALIAS): Define. opcodes/ * sparc-dis.c (compare_opcodes): When encountering multiple aliases of an opcode, prefer the one with F_PREFERRED set. * sparc-opc.c (sparc_opcodes): Add ldtw, ldtwa, sttw, sttwa, lzcnt, flush with '[address]' syntax, and missing cbcond pseudo ops. Make 64-bit VIS logical ops have "d" suffix in their names, mark existing mnenomics as aliases. Add "cc" suffix to edge instructions generating condition codes, mark existing mnenomics as aliases. Add "fp" prefix to VIS compare instructions, mark existing mnenomics as aliases. gas/testsuite/ * gas/sparc/cbcond.s: Add tests for new opcode aliases. * gas/sparc/cbcond.d: Updated. * gas/sparc/hpcvis3.s: Add tests for new opcode aliases. * gas/sparc/hpcvis3.d: Updated. * gas/sparc/v8-movwr-imm.d: Fix expected disassembly. * gas/sparc/edge.s: New test. * gas/sparc/edge.d: Expected disassembly. * gas/sparc/flush.s: New test. * gas/sparc/flush.d: Expected disassembly. * gas/sparc/ldd_std.s: New test. * gas/sparc/ldd_std.d: Expected disassembly. * gas/sparc/ldtw_sttw.s: New test. * gas/sparc/ldtw_sttw.d: Expected disassembly. * gas/sparc/sparc.exp: Run new tests.
2013-04-04oops - omitted from previous deltaNick Clifton1-0/+5
2013-04-03 * doc/as.texinfo: Add support to generate man options for h8300.Alan Modra3-1/+27
* doc/c-h8300.texi: Likewise.
2013-03-28Add support for Cortex-A53 and Cortex-A57.Ramana Radhakrishnan2-0/+9
2013-03-28 PR binutils/15068Nick Clifton3-22/+29
* tic6x-opcode-table.h: Fix patterns for add, ldnw and xor. * gas/tic6x/insns16-lsd-unit.s: Correct bit patterns for mvk, add and xor. * gas/tic6x/insns16-lsd-unit.d: Update expected output.
2013-03-27Properly check address mode for SIBH.J. Lu3-0/+7
gas/testsuite/ * gas/i386/addr32.s: Add an SIB test. * gas/i386/addr32.d: Updated. opcodes/ * i386-dis.c (get_sib): Add the sizeflag argument. Properly check address mode. (print_insn): Pass sizeflag to get_sib.
2013-03-27 PR binutils/15068Nick Clifton23-24/+2827
* tic6x-dis.c: Add support for displaying 16-bit insns. * tic6xc-insn-formats.h (FLD): Add use of bitfield array. Add 16-bit opcodes. * tic6xc-opcode-table.h: Add 16-bit insns. * tic6x.h: Add support for 16-bit insns. * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array. * gas/tic6x/insns16-d-unit.s: New test. * gas/tic6x/insns16-d-unit.d: Expected disassembly. * gas/tic6x/insns16-ddec.s: New test. * gas/tic6x/insns16-ddec.d: Expected disassembly. * gas/tic6x/insns16-dinc.s: New test. * gas/tic6x/insns16-dinc.d: Expected disassembly. * gas/tic6x/insns16-dind.s: New test. * gas/tic6x/insns16-dind.d: Expected disassembly. * gas/tic6x/insns16-doff4.s: New test. * gas/tic6x/insns16-doff4.d: Expected disassembly. * gas/tic6x/insns16-l-unit.s: New test. * gas/tic6x/insns16-l-unit.d: Expected disassembly. * gas/tic6x/insns16-lsd-unit.s: New test. * gas/tic6x/insns16-lsd-unit.d: Expected disassembly. * gas/tic6x/insns16-m-unit.s: New test. * gas/tic6x/insns16-m-unit.d: Expected disassembly. * gas/tic6x/insns16-s-unit-pcrel.s: New test. * gas/tic6x/insns16-s-unit-pcrel.d: Expected disassembly. * gas/tic6x/insns16-s-unit: New test. * gas/tic6x/insns16-s-unit.d: Expected disassembly.
2013-03-26 PR gas/15295Nick Clifton2-25/+65
* listing.c (rebuffer_line): Rewrite to avoid seeking back to the start of the file each time.
2013-03-26 PR gas/15178Nick Clifton2-1/+7
* config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for FreeBSD targets.
2013-03-26Fix typo in added CL entry.Tristan Gingold1-1/+1
2013-03-26gas/Tristan Gingold7-14/+43
2013-03-26 Douglas B Rupp <rupp@gnat.com> * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment after fixup. gas/testsuite/ 2013-03-26 Douglas B Rupp <rupp@adacore.com * gas/ia64/ia64.exp: Add new test reloc-mlx * gas/ia64/reloc-mlx.[sd]: New test for X-unit reloc. * gas/ia64/pcrel.d: Fix output for X-unit reloc.
2013-03-21gas/ChangeLog:Will Newton8-96/+53
2013-03-21 Will Newton <will.newton@linaro.org> * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all pc-relative str instructions in Thumb mode. gas/testsuite/ChangeLog: 2013-03-21 Will Newton <will.newton@linaro.org> * gas/arm/thumb2_relax.d: Strip out invalid pc-relative strs. * gas/arm/thumb2_relax.s: Likewise. * gas/arm/thumb32.d: Likewise. * gas/arm/thumb32.l: Likewise. * gas/arm/thumb32.s: Likewise. * gas/arm/thumb2_str-bad.d: New file. * gas/arm/thumb2_str-bad.l: Likewise. * gas/arm/thumb2_str-bad.s: Likewise.
2013-03-21 * elf32-h8300 (h8_relax_section): Add new relaxation of movNick Clifton3-14/+32
@(disp:32,ERx) to mov @(disp:16,ERx). (R_H8_DISP32A16): New reloc. Comments added and corrected. * reloc.c (BFD_RELOC_H8_DISP32A16): New reloc. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. * ld.texinfo (H8/300): Add description of relaxation of mov @(disp:32,ERx) to mov @(disp:16,ERx). * ld-h8300/h8300.exp: Add new relax-7 test on ELF. * ld-h8300/relax-2.s: Add other direction and .w/.l variants of mov insns. * ld-h8300/relax-2.d: Update expected disassembly. * ld-h8300/relax-7a.s: New: tests for mov @(disp:32,ERx) -> mov @(disp:16,ERx). * ld-h8300/relax-7b.s: New: Likewise. * ld-h8300/relax-7.d: New: expected disassembly. * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc R_H8_DISP32A16. * config/tc-h8300.h: Remove duplicated defines.
2013-03-21 PR gas/15282Nick Clifton2-3/+19
* tc-avr.c (mcu_has_3_byte_pc): New function. (tc_cfi_frame_initial_instructions): Call it to find return address size.
2013-03-20 PR gas/15082Nick Clifton5-2/+13
* tic6x-opcode-table.h: Rename mpydp's specific operand type macro from ORREGD1324 to ORXREGD1324 and make it cross-path-able through tic6x_operand_xregpair operand coding type. Make mpydp instruction cross-path-able, ie: remove the FIXed 'x' opcode field, usu ORXREGD1324 for the src2 operand and remove the TIC6X_FLAG_NO_CROSS. * gas/tic6x/insns-bad-1.s: Remove test-case for mpydp with cross-path. * gas/tic6x/insns-bad-1.l: Update expected output. * gas/tic6x/insns-c674x.s: Add a test-case for mpydp with cross-path. * gas/tic6x/insns-c674x.d: Update expected output.
2013-03-20* include/opcode/tic6x.h: add tic6x_coding_dreg_(msb|lsb) field coding type inNick Clifton5-8/+69
order to encode separately the msb and lsb of a register pair ; this will be needed to encode the opcodes the same way as Ti assembler does. * gas/config/tc-tic6x.c: handle tic6x_coding_dreg_(msb|lsb) field coding types and use it to encode register pair numbers when required. * opcodes/tic6x-dis.c: decodes opcodes that have individual msb and lsb halves in src1 & src2 fields ; discard the src1 (lsb) value and only use src2 (msb), discarding bit 0, to follow what Ti SDK does in that case as any value in the src1 field yields the same output with SDK disassembler. * include/opcode/tic6x-opcode-table.h: modify absdp, dpint, dpsp, dptrunc, rcpdp and rsqrdp opcodes to use the new field coding types. * gas/testsuite/gas/tic6x/insns-c674x.d, gas/testsuite/gas/tic6x/insns-c674x.s : add test case for the newly generated opcode but keep the old ones as they seem legit as per Ti disassembler output.
2013-03-15gas/testsuite/ChangeLog:Will Newton105-104/+211
2013-03-15 Will Newton <will.newton@linaro.org> * gas/arm/any-idiv.d: Expand *-*eabi test to cover *-*eabi*. * gas/arm/arch4t-eabi.d: Likewise. * gas/arm/arch4t.d: Likewise. * gas/arm/attr-any-armv4t.d: Likewise. * gas/arm/attr-any-thumbv6.d: Likewise. * gas/arm/attr-cpu-directive.d: Likewise. * gas/arm/attr-default.d: Likewise. * gas/arm/attr-march-all.d: Likewise. * gas/arm/attr-march-armv1.d: Likewise. * gas/arm/attr-march-armv2.d: Likewise. * gas/arm/attr-march-armv2a.d: Likewise. * gas/arm/attr-march-armv2s.d: Likewise. * gas/arm/attr-march-armv3.d: Likewise. * gas/arm/attr-march-armv3m.d: Likewise. * gas/arm/attr-march-armv4.d: Likewise. * gas/arm/attr-march-armv4t.d: Likewise. * gas/arm/attr-march-armv4txm.d: Likewise. * gas/arm/attr-march-armv4xm.d: Likewise. * gas/arm/attr-march-armv5.d: Likewise. * gas/arm/attr-march-armv5t.d: Likewise. * gas/arm/attr-march-armv5te.d: Likewise. * gas/arm/attr-march-armv5tej.d: Likewise. * gas/arm/attr-march-armv5texp.d: Likewise. * gas/arm/attr-march-armv5txm.d: Likewise. * gas/arm/attr-march-armv6-m+os.d: Likewise. * gas/arm/attr-march-armv6-m.d: Likewise. * gas/arm/attr-march-armv6.d: Likewise. * gas/arm/attr-march-armv6j.d: Likewise. * gas/arm/attr-march-armv6k+sec.d: Likewise. * gas/arm/attr-march-armv6k.d: Likewise. * gas/arm/attr-march-armv6kt2.d: Likewise. * gas/arm/attr-march-armv6s-m.d: Likewise. * gas/arm/attr-march-armv6t2.d: Likewise. * gas/arm/attr-march-armv6z.d: Likewise. * gas/arm/attr-march-armv6zk.d: Likewise. * gas/arm/attr-march-armv6zkt2.d: Likewise. * gas/arm/attr-march-armv6zt2.d: Likewise. * gas/arm/attr-march-armv7-a+idiv.d: Likewise. * gas/arm/attr-march-armv7-a+mp.d: Likewise. * gas/arm/attr-march-armv7-a+sec+virt.d: Likewise. * gas/arm/attr-march-armv7-a+sec.d: Likewise. * gas/arm/attr-march-armv7-a+virt.d: Likewise. * gas/arm/attr-march-armv7-a.d: Likewise. * gas/arm/attr-march-armv7-m.d: Likewise. * gas/arm/attr-march-armv7-r+mp.d: Likewise. * gas/arm/attr-march-armv7-r.d: Likewise. * gas/arm/attr-march-armv7.d: Likewise. * gas/arm/attr-march-armv7a.d: Likewise. * gas/arm/attr-march-armv7em.d: Likewise. * gas/arm/attr-march-armv7m.d: Likewise. * gas/arm/attr-march-armv7r.d: Likewise. * gas/arm/attr-march-armv8-a+crypto.d: Likewise. * gas/arm/attr-march-armv8-a+fp.d: Likewise. * gas/arm/attr-march-armv8-a+simd.d: Likewise. * gas/arm/attr-march-armv8-a.d: Likewise. * gas/arm/attr-march-iwmmxt.d: Likewise. * gas/arm/attr-march-iwmmxt2.d: Likewise. * gas/arm/attr-march-xscale.d: Likewise. * gas/arm/attr-mcpu.d: Likewise. * gas/arm/attr-mfpu-arm1020e.d: Likewise. * gas/arm/attr-mfpu-arm1020t.d: Likewise. * gas/arm/attr-mfpu-arm1136jf-s.d: Likewise. * gas/arm/attr-mfpu-arm1136jfs.d: Likewise. * gas/arm/attr-mfpu-arm7500fe.d: Likewise. * gas/arm/attr-mfpu-fpa.d: Likewise. * gas/arm/attr-mfpu-fpa10.d: Likewise. * gas/arm/attr-mfpu-fpa11.d: Likewise. * gas/arm/attr-mfpu-fpe.d: Likewise. * gas/arm/attr-mfpu-fpe2.d: Likewise. * gas/arm/attr-mfpu-fpe3.d: Likewise. * gas/arm/attr-mfpu-maverick.d: Likewise. * gas/arm/attr-mfpu-neon-fp16.d: Likewise. * gas/arm/attr-mfpu-neon.d: Likewise. * gas/arm/attr-mfpu-softfpa.d: Likewise. * gas/arm/attr-mfpu-softvfp+vfp.d: Likewise. * gas/arm/attr-mfpu-softvfp.d: Likewise. * gas/arm/attr-mfpu-vfp.d: Likewise. * gas/arm/attr-mfpu-vfp10-r0.d: Likewise. * gas/arm/attr-mfpu-vfp10.d: Likewise. * gas/arm/attr-mfpu-vfp3.d: Likewise. * gas/arm/attr-mfpu-vfp9.d: Likewise. * gas/arm/attr-mfpu-vfpv2.d: Likewise. * gas/arm/attr-mfpu-vfpv3-d16.d: Likewise. * gas/arm/attr-mfpu-vfpv3.d: Likewise. * gas/arm/attr-mfpu-vfpv4-d16.d: Likewise. * gas/arm/attr-mfpu-vfpv4.d: Likewise. * gas/arm/attr-mfpu-vfpxd.d: Likewise. * gas/arm/attr-names.d: Likewise. * gas/arm/attr-order.d: Likewise. * gas/arm/attr-override-cpu-directive.d: Likewise. * gas/arm/attr-override-mcpu.d: Likewise. * gas/arm/got_prel.d: Likewise. * gas/arm/mapdir.d: Likewise. * gas/arm/mapmisc.d: Likewise. * gas/arm/mapsecs.d: Likewise. * gas/arm/mapshort-eabi.d: Likewise. * gas/arm/mapshort-elf.d: Likewise. * gas/arm/mov-highregs-any.d: Likewise. * gas/arm/mov-lowregs-any.d: Likewise. * gas/arm/pr12198-1.d: Likewise. * gas/arm/pr12198-2.d: Likewise. * gas/arm/thumb-eabi.d: Likewise. * gas/arm/thumb.d: Likewise. * gas/arm/thumbrel.d: Likewise. ld/testsuite/ChangeLog: 2013-03-15 Will Newton <will.newton@linaro.org> * ld-arm/arm-elf.exp: Expand *-*eabi test to cover *-*eabi*. * ld-arm/gc-hidden-1.d: Likewise. * ld-elfvsb/elfvsb.exp: Likewise. * ld-shared/shared.exp: Likewise.
2013-03-15 * gas/arm/arch7.d: Skip for non-ELF ARM targets.Nick Clifton6-0/+13
* gas/arm/arch7a-mp.d: Likewise. * gas/arm/arch7em.d: Likewise. * gas/arm/crc32-bad.d: Likewise. * gas/arm/crc32.d: Likewise.
2013-03-15gas/ChangeLog:Will Newton4-2/+11
2013-03-12 Will Newton <will.newton@linaro.org> * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register in vstr in Thumb mode for pre-ARMv7 cores. gas/testsuite/ChangeLog: 2013-03-12 Will Newton <will.newton@linaro.org> * gas/arm/vstr-thumb-bad.d: Assemble with -mcpu=arm1156t2f-s.
2013-03-14* doc/c-arc.texi (ARC Directives): Revert last change and useAndreas Schwab3-12/+18
@itemize instead of @table. * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
2013-03-14 PR gas/15273Nick Clifton2-1/+7
* config/tc-arm.c (do_co_reg): Do not call check_obsolete with a NULL message, instead just check ARM_CPU_IS_ANY directly.
2013-03-14 PR gas/15212Nick Clifton5-59/+78
* doc/c-arc.texi (ARC Directives): Use @code instead of @bullte for table format. * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text to the @item directives. (ARM-Neon-Alignment): Move to correct place in the document. * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table formatting. * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of @smallexample.
2013-03-122013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>Sandra Loosemore42-1031/+951
gas/testsuite/ * gas/nios2/nios2.exp: Use run_dump_tests. * gas/nios2/mov.d: Delete file. * gas/nios2/mov.s: Likewise. * gas/nios2/rol.d: Likewise. * gas/nios2/rol.s: Likewise. * gas/nios2/add.d: Check instruction values. * gas/nios2/align_fill.d: Likewise. * gas/nios2/and.d: Likewise. * gas/nios2/branch.d: Likewise. * gas/nios2/bret.d: Likewise. * gas/nios2/cache.d: Likewise. * gas/nios2/call.d: Likewise. * gas/nios2/call26.d: Likewise. * gas/nios2/cmp.d: Likewise. * gas/nios2/comments.d: Likewise. * gas/nios2/complex.d: Likewise. * gas/nios2/ctl.d: Likewise. * gas/nios2/custom.d: Likewise. * gas/nios2/etbt.d: Likewise. * gas/nios2/flushda.d: Likewise. * gas/nios2/jmp.d: Likewise. * gas/nios2/ldb.d: Likewise. * gas/nios2/ldh.d: Likewise. * gas/nios2/ldw.d: Likewise. * gas/nios2/lineseparator.d: Likewise. * gas/nios2/movi.d: Likewise. * gas/nios2/movia.d: Likewise. * gas/nios2/mul.d: Likewise. * gas/nios2/nor.d: Likewise. * gas/nios2/or.d: Likewise. * gas/nios2/registers.d: Likewise. * gas/nios2/ret.d: Likewise. * gas/nios2/rotate.d: Likewise. * gas/nios2/stb.d: Likewise. * gas/nios2/sth.d: Likewise. * gas/nios2/stw.d: Likewise. * gas/nios2/sub.d: Likewise. * gas/nios2/sync.d: Likewise. * gas/nios2/trap.d: Likewise. * gas/nios2/tret.d: Likewise. * gas/nios2/xor.d: Likewise.
2013-03-122013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>gdb_7_6-branchpointSandra Loosemore4-6/+17
include/ * opcode/nios2.h: Edit comment. gas/ * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o' case. Add default BAD_CASE to switch. gas/testsuite/ * gas/nios2/break.d: Check instruction values.
2013-03-122013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>Sandra Loosemore6-0/+71
include/ * opcode/nios2.h (OPX_WRPRS): New define. (OP_MATCH_WRPRS): Likewise. opcodes/ * nios2-opc.c (nios2_builtin_opcodes): Add entry for wrprs. gas/ * config/tc-nios2.c (nios2_assemble_args_ds): New function. (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries. gas/testsuite/ * gas/nios2/nios2.exp: Run wrprs. * gas/nios2/wrprs.d: New file. * gas/nios2/wrprs.s: Likewise.
2013-03-122013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>Sandra Loosemore4-0/+74
include/ * opcode/nios2.h (OP_RDPRS): New define. (OP_MATCH_RDPRS): Likewise. opcodes/ * nios2-opc.c (nios2_builtin_opcodes): Add entry for rdprs. gas/testsuite/ * gas/nios2/nios2.exp: Run rdprs. * gas/nios2/rdprs.d: New file. * gas/nios2/rdprs.s: Likewise.
2013-03-122013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>Sandra Loosemore4-0/+109
opcodes/ * nios2-opc.c (nios2_builtin_regs): Add sstatus alias for ba register. gas/testsuite/ * gas/nios2/nios2.exp: Run registers. * gas/nios2/registers.d: New file. * gas/nios2/registers.s: Likewise.
2013-03-11Add support for AArch32 CRC instruction in ARMv8.Kyrylo Tkachov8-0/+187
gas/ChangeLog 2013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com> * config/tc-arm.c (crc_ext_armv8): New feature set. (UNPRED_REG): New macro. (do_crc32_1): New function. (do_crc32b, do_crc32h, do_crc32w, do_crc32cb, do_crc32ch, do_crc32cw): Likewise. (TUEc): New macro. (insns): Add entries for crc32 mnemonics. (arm_extensions): Add entry for crc. include/opcode/ChangeLog 2013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com> * arm.h (CRC_EXT_ARMV8): New constant. (ARCH_CRC_ARMV8): New macro. opcodes/ChangeLog 2013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com> * arm-dis.c (arm_opcodes): Add entries for CRC instructions. (thumb32_opcodes): Likewise. (print_insn_thumb32): Handle 'S' control char. gas/testsuite/ChangeLog 2013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com> * gas/arm/crc32-bad.d: New file. * gas/arm/crc32-bad.l: Likewise. * gas/arm/crc32-bad.s: Likewise. * gas/arm/crc32.d: Likewise. * gas/arm/crc32.s: Likewise.
2013-03-082013-03-08 Chung-Lin Tang <cltang@codesourcery.com>Chung-Lin Tang5-4/+25
* write.h (struct fix): Add fx_dot_frag field. (dot_frag): Declare. * write.c (dot_frag): New variable. (fix_new_internal): Set fx_dot_frag field with dot_frag. (fixup_segment): Base calculation of fx_offset with fx_dot_frag. * expr.c (expr): Save value of frag_now in dot_frag when setting dot_value. * read.c (emit_expr): Likewise. Delete comments.
2013-03-07Rewrote i386_index_checkH.J. Lu2-121/+111
* config/tc-i386.c (flag_code_names): Removed. (i386_index_check): Rewrote.
2013-03-05Add to the AArch64 GAS the missing support for hexadecimal-formatYufeng Zhang9-31/+188
floating-point literal in the FMOV instruction. gas/ * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern'; add comment. (aarch64_double_precision_fmovable): New function. (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new function; handle hexadecimal representation of IEEE754 encoding. (parse_operands): Update the call to parse_aarch64_imm_float. gas/testsuite/ * gas/aarch64/diagnostic.s: Add test. * gas/aarch64/diagnostic.l: Update. * gas/aarch64/illegal.s: Add test. * gas/aarch64/illegal.l: Update. * gas/aarch64/fpmov.s: New file. * gas/aarch64/fpmov.d: New file.
generated by cgit v1.1 at 2024-09-30 07:40:31 +0000