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2008-08-05 PR gas/6656Alan Modra2-1/+13
* dwarf2dbg.c (dwarf2_directive_file): Disable gas generated debug info if we see compiler generated debug info. (dwarf2_directive_loc): Likewise. Remove redundant debug_type test.
2008-08-04 * dwarf2dbg.c: Remove superfluous forward function declarations.Alan Modra4-129/+87
(DWARF2_FORMAT): Add section arg. (out_header): New function, split out from.. (out_debug_line): ..here. (out_debug_aranges): Use out_header. (out_debug_abbrev): Add info_seg and line_seg args. Use DW_FORM_data8 (for DW_AT_stmt_list) if line_seg is 64-bit. (out_debug_info): Use out_header. Output 8 byte DW_AT_stmt_list if line_seg is 64-bit. (dwarf2_finish): Adjust out_debug_abbrev call. * config/tc-mips.h (DWARF2_FORMAT, mips_dwarf2_format): Add sec arg. * config/tc-mips.c (mips_dwarf2_format): Likewise.
2008-08-04Set LC_ALL=C rather than unsetting LC_COLLATE for sort.Alan Modra4-8/+14
2008-08-02gas/Peter Bergner8-6/+159
* config/tc-ppc.c (parse_cpu): Rename altivec_or_spe to retain_flags. Handle -mvsx and -mpower7. (md_show_usage): Document -mpower7 and -mvsx. * doc/as.texinfo (Target PowerPC): Document -mvsx. * doc/c-ppc.texi (PowerPC-Opts): Document -mvsx and -mpower7. gas/testsuite/ * gas/ppc/power7.d: New. * gas/ppc/power7.s: Likewise. * gas/ppc/ppc.exp: Run power7 test. include/opcode/ * ppc.h (PPC_OPCODE_VSX, PPC_OPERAND_VSR): New. opcodes/ * ppc-dis.c (powerpc_init_dialect): Handle power7 and vsx options. (print_insn_powerpc): Prepend 'vs' when printing VSX registers. (print_ppc_disassembler_options): Document -Mpower7 and -Mvsx. * ppc-opc.c (insert_xt6): New static function. (extract_xt6): Likewise. (insert_xa6): Likewise. (extract_xa6: Likewise. (insert_xb6): Likewise. (extract_xb6): Likewise. (insert_xb6s): Likewise. (extract_xb6s): Likewise. (XS6, XT6, XA6, XB6, XB6S, DM, XX3, XX3DM, XX1_MASK, XX3_MASK, XX3DM_MASK, PPCVSX): New. (powerpc_opcodes): Add opcodes "lxvd2x", "lxvd2ux", "stxvd2x", "stxvd2ux", "xxmrghd", "xxmrgld", "xxpermdi", "xvmovdp", "xvcpsgndp".
2008-08-01binutils/H.J. Lu5-78/+10
2008-08-01 H.J. Lu <hongjiu.lu@intel.com> * dwarf.c (dwarf_regnames_i386): Remove AVX registers. (dwarf_regnames_x86_64): Likewise. gas/testsuite/ 2008-08-01 H.J. Lu <hongjiu.lu@intel.com> * gas/cfi/cfi-i386.s: Remove tests for AVX register maps. * gas/cfi/cfi-x86_64.s: Likewise. * gas/cfi/cfi-i386.d: Updated. * gas/cfi/cfi-x86_64.d: Likewise. opcodes/ 2008-08-01 H.J. Lu <hongjiu.lu@intel.com> * i386-reg.tbl: Use Dw2Inval on AVX registers. * i386-tbl.h: Regenerated.
2008-08-01gas/Peter Bergner8-5/+90
* config/tc-ppc.c (parse_cpu) <power6>: Accept Altivec instructions. <cell>: Likewise. gas/testsuite/ * gas/ppc/cell.s: Add altivec instructions. * gas/ppc/cell.d: Update expected output. * gas/ppc/power6.d: New. * gas/ppc/power6.s: Likewise. * gas/ppc/ppc.exp (powerpc64*-*-*): Move cell from here to... (powerpc*-*-*): Here. Run power6 test.
2008-07-30include/opcode/Alan Modra2-4/+11
* ppc.h (PPC_OPCODE_405): Define. (PPC_OPERAND_FSL, PPC_OPERAND_FCR, PPC_OPERAND_UDI): Define. gas/ * config/tc-ppc.c (parse_cpu): Separate handling of -m403/405. (md_show_usage): Likewise. opcodes/ * ppc-dis.c (print_insn_powerpc): Disassemble FSL/FCR/UDI fields. * ppc-opc.c (powerpc_operands): Add Xilinx APU related operands. (insert_sprg, PPC405): Use PPC_OPCODE_405. (powerpc_opcodes): Add Xilinx APU related opcodes.
2008-07-30Silence gcc printf warningsAlan Modra4-11/+16
2008-07-28warning fixAlan Modra2-1/+7
2008-07-26Support PowerPC single-precision float.Alan Modra2-1/+7
2008-07-242008-07-24 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu8-0/+18
* gas/i386/nops-1.d: Add -mtune=generic32. * gas/i386/nops-2.d: Likewise. * gas/i386/nops-3.d: Likewise. * gas/i386/x86-64-nops-1.d: Add -mtune=generic64. * gas/i386/x86-64-nops-2.d: Likewise. * gas/i386/x86-64-nops-3.d: Likewise. * gas/i386/x86-64-nops-4.d: Likewise.
2008-07-24 * config/bfin-parse.y (asm_1): Error if plain symbol is usedJie Zhang2-0/+10
as load/store offset.
2008-07-22 * config/tc-mips.c (mips_ip): Reset s to argsStart.Nick Clifton5-7/+16
* gas/mips/tls-ill.l: Update error message. * gas/mips/octeon-ill.l: Likewise.
2008-07-22 * config/tc-bfin.c (bfin_gen_loop): Remove loop symbol.Jie Zhang2-0/+7
2008-07-21* config/tc-h8300.c (fix_operand_size): Use the default sizeDJ Delorie2-1/+11
specified by the .lbranch/.sbranch pseudos.
2008-07-18* config/tc-m32c.h (H_TICK_HEX): Define.DJ Delorie7-1/+87
* config/tc-m32c.c (OPTION_H_TICK_HEX): Define. (md_longopts): Add support for it. (md_parse_option): Likewise. * doc/as.texinfo (Overview): Add new m32c options. * doc/c-m32c.texi (M32C-Modifiers): Likewise * as.h: (enable_h_tick_hex): New. * app.c (enable_h_tick_hex): New. (LEX_IS_H): New. (do_scrub_begin): Mark 'H' and 'h' as special if enable_h_tick_hex. (do_scrub_chars): If enable_h_tick_hex and 'h', check for H'00 style hex constants and convert the input stream to 0x00 style. (do_scrub_chars): If a 'X style character constant is found after a symbol character (like you're or X'00), warn the user.
2008-07-14 * gas/bfin/{bit2.s, cache2.s, control_code2.s, event2.s,Jie Zhang14-2075/+2082
logical2.s, move2.s, parallel.s, parallel2.s, parallel3.s, parallel4.s, shift2.s, stack2.s, video2.s}: Remove DOS line endings.
2008-07-10include/elf/Richard Sandiford6-3/+26
* mips.h (ELF_ST_IS_MIPS16, ELF_ST_SET_MIPS16): New macros. bfd/ * elfxx-mips.c (mips_elf_check_mips16_stubs): Use ELF_ST_IS_MIPS16. (mips_elf_calculate_relocation): Likewise. (_bfd_mips_elf_add_symbol_hook): Likewise. (_bfd_mips_elf_finish_dynamic_symbol): Likewise. (_bfd_mips_vxworks_finish_dynamic_symbol): Likewise. opcodes/ * mips-dis.c (_print_insn_mips): Use ELF_ST_IS_MIPS16. gas/ * config/tc-mips.c (mips16_mark_labels): Use ELF_ST_SET_MIPS16. (mips_fix_adjustable): Likewise. (mips_frob_file_after_relocs): Likewise. gas/testsuite/ * gas/mips/mips16-vis-1.d, gas/mips/mips16-vis-1.s: New tests. * gas/mips/mips.exp: Run them.
2008-07-092008-07-09 Kai Tietz <kai.tietz@onevision.com>Kai Tietz3-4/+41
* gas/i386/i386.exp (x86-64-pcrel): Disable for w64. (x86-64-sse5): Likewise. (x86-64-opcode-inval): Likewise. (x86-64-opcode-inval-intel): Likewise. (x86-64-w64-pcrel): New. * gas/i386/x86-64-w64-pcrel.d: New.
2008-07-08 * config/tc-m68k.c (m68k_set_cpu, m68k_set_arch): Don't complainNathan Sidwell2-17/+7
about overriding an earlier setting.
2008-07-07 * gas/mips/mips32.s: Move out coprocessor2 insns from here ...Adam Nemet18-127/+286
* gas/mips/mips32-cp2.s: ... to here. * gas/mips/mips32.d: Update. * gas/mips/mips32-cp2.d: New file. * gas/mips/mips32r2.s: Move out coprocessor2 insns from here ... * gas/mips/mips32r2-cp2.s: ... to here. * gas/mips/mips32r2.d: Update. * gas/mips/mips32r2-cp2.d: New file. * gas/mips/mips64.s: Move out coprocessor2 insns from here ... * gas/mips/mips64-cp2.s: ... to here. * gas/mips/mips64.d: Update. * gas/mips/mips64-cp2.d: New file. * gas/mips/mips.exp: Run mips32-cp2, mips32r2-cp2 and mips64-cp except for Octeon. * gas/mips/octeon.s: Add supported coprocessor insns. Move pop down to keep alphabetical order. * gas/mips/octeon.d: Update. * gas/mips/octeon-ill.s: Add unsupported coprocessor insns. * gas/mips/octeon-ill.l: Update.
2008-07-07 * config/tc-mips.c (NO_ISA_COP): New macro.Adam Nemet2-1/+48
(COP_INSN): New macro. (is_opcode_valid): Use them. (macro) <ld_st>: Use them. Don't accept coprocessor load store insns based on the ISA if CPU is NO_ISA_COP. <copz>: Likewise for coprocessor operations.
2008-07-07gas/Carlos O'Donell5-0/+50
2008-07-07 Paul Brook <paul@codesourcery.com> * config/tc-arm.c (arm_fix_adjustable): Don't adjust MOVW/MOVT relocations. gas/testsuite/ 2008-07-07 Paul Brook <paul@codesourcery.com> * gas/arm/movw-local.d: New test. * gas/arm/movw-local.s: New test.
2008-07-07 * configure.tgt: Add bfin-*-rtems*.Nick Clifton2-0/+5
2008-07-04 * config/tc-spu.c (md_apply_fix): Handle fully resolvedAlan Modra2-0/+14
BFD_RELOC_32_PCREL, BFD_RELOC_SPU_HI16 and BFD_RELOC_SPU_LO16.
2008-06-27* gas/mips/odd-float.d: Replace ... with #pass.Chao-ying Fu5-3/+11
* gas/mips/ldstla-32-shared.d: Add -march=mips1 for as. * gas/mips/ldstla-32.d: Likewise. * gas/mips/mips16-hilo-match.d: Add -mabi=32 -march=mips1 for as.
2008-06-25gas/Peter Bergner2-1/+8
* config/tc-ppc.c (parse_cpu): Handle -m464. (md_show_usage): Likewise. opcodes/ * ppc-dis.c (powerpc_init_dialect): Handle -M464. (print_ppc_disassembler_options): Likewise. * ppc-opc.c (PPC464): Define. (powerpc_opcodes): Add mfdcrux and mtdcrux.
2008-06-25/gas:Eric B. Weddington3-1/+8
2008-06-24 Eric B. Weddington <eric.weddington@atmel.com> Add support for ATtiny13A. * config/tc-avr.c (mcu_types): Add attiny13a. * doc/c-avr.texi: Likewise.
2008-06-24 * write.c (relax_segment <rs_org>): Include current stretchAlan Modra2-7/+9
value when calculating whether .org is backwards.
2008-06-20* gas/mips/e32-rel2.d: Add -march=mips1 for as.Chao-ying Fu2-1/+5
2008-06-17 * configure: Regenerate.Ralf Wildenhues2-26/+50
config/ * override.m4: Use m4_version_prereq throughout. (_AC_ARG_VAR_VALIDATE, AC_MSG_FAILURE): Backport from git Autoconf: output pwd along with fatal errors, so the right config.log file is hinted at more prominently. (PARSE_ARGS): Push setting of ac_pwd in this diversion. (_GCC_AUTOCONF_VERSION): New, define to 2.59 if not defined. (_GCC_AUTOCONF_VERSION_CHECK): New macro, require use of Autoconf version _GCC_AUTOCONF_VERSION throughout the tree. (m4_wrap): New override, fix for Posix semantics of m4wrap. binutils/ * configure: Regenerate. opcodes/ * configure: Regenerate. bfd/ * configure: Regenerate. gas/ * configure: Regenerate. gprof/ * configure: Regenerate. ld/ * config.in: Regenerate. * configure: Regenerate.
2008-06-17 * app.c (do_scrub_chars): Do not UNGET an EOF value.Nick Clifton2-4/+9
* ti.h (GET_SCNHDR_NLNNO): Provide an alternative version of this macro which does not trigger an array bounds warning in gcc. (PUT_SCNHDR_NLNNO): Likewise. (GET_SCNHDR_FLAGS): Likewise. (PUT_SCNHDR_FLAGS): Likewise. (GET_SCNHDR_PAGE): Likewise. (PUT_SCNHDR_PAGE): Likewise.
2008-06-16 PR gas/6607Hans-Peter Nilsson7-0/+49
* gas/mmix/err-loc-10.s, gas/mmix/err-loc-9.s, gas/mmix/loc-6.d, gas/mmix/loc-6.s, gas/mmix/loc-7.d, gas/mmix/loc-7.s: New tests.
2008-06-16 PR gas/6607Hans-Peter Nilsson2-4/+14
* config/tc-mmix.c (s_loc): Assume "negative" addresses belong to text_section. Do the "stepping backwards" test for text_section using unsigned operands.
2008-06-13include/opcode/Peter Bergner3-7/+18
* ppc.h (ppc_cpu_t): New typedef. (struct powerpc_opcode <flags>): Use it. (struct powerpc_operand <insert, extract>): Likewise. (struct powerpc_macro <flags>): Likewise. gas/ * config/tc-ppc.c (ppc_cpu): Use ppc_cpu_t typedef. (ppc_insert_operand): Likewise. (ppc_machine): Likewise. * config/tc-ppc.h: #include "opcode/ppc.h" (struct _ppc_fix_extra <ppc_cpu>): Use ppc_cpu_t typedef. (ppc_cpu): Update extern decl. opcodes/ * ppc-dis.c (print_insn_powerpc): Update prototye to use new ppc_cpu_t typedef. (struct dis_private): New. (POWERPC_DIALECT): New define. (powerpc_dialect): Renamed to... (powerpc_init_dialect): This. Update to use ppc_cpu_t and struct dis_private. (print_insn_big_powerpc): Update for using structure in info->private_data. (print_insn_little_powerpc): Likewise. (operand_value_powerpc): Change type of dialect param to ppc_cpu_t. (skip_optional_operands): Likewise. (print_insn_powerpc): Likewise. Remove initialization of dialect. * ppc-opc.c (extract_bat, extract_bba, extract_bdm, extract_bdp, extract_bo, extract_boe, extract_fxm, extract_mb6, extract_mbe, extract_nb, extract_nsi, extract_rbs, extract_sh6, extract_spr, extract_sprg, extract_tbr insert_bat, insert_bba, insert_bdm, insert_bdp, insert_bo, insert_boe, insert_fxm, insert_mb6, insert_mbe, insert_nsi, insert_ral, insert_ram, insert_raq, insert_ras, insert_rbs, insert_sh6, insert_spr, insert_sprg, insert_tbr): Change the dialect param to be of type ppc_cpu_t. Update prototype.
2008-06-12 * mips.h: Document new field descriptors +Q.Nick Clifton7-0/+130
(OP_SH_SEQI, OP_MASK_SEQI): New bit mask and shift count for SEQI. opcodes/ * mips-dis.c (print_insn_args): Handle field descriptor +Q. * mips-opc.c (mips_builtin_opcodes): Add Octeon instructions seq, seqi, sne and snei. gas/ * config/tc-mips.c (validate_mips_insn): Handle field descriptor +Q. (mips_ip): Likewise. (macro_build): Likewise. (CPU_HAS_SEQ): New macro. (macro2) <M_SEQ_I, M_SNE_I>: Use it. Emit seq/sne and seqi/snei. gas/testsuite/ * gas/mips/octeon.s, gas/mips/octeon.d: Add tests for seq* and sne*. * gas/mips/octeon-ill.s, gas/mips/octeon-ill.s: Add tests for seqi and snei.
2008-06-12include/opcode/Nick Clifton8-3/+268
* mips.h: Document new field descriptors +x, +X, +p, +P, +s, +S. Update comment before MIPS16 field descriptors to mention MIPS16. (OP_SH_BBITIND, OP_MASK_BBITIND): New bit mask and shift count for BBIT. (OP_SH_CINSPOS, OP_MASK_CINSPOS, OP_SH_CINSLM1, OP_MASK_CINSLM1): New bit masks and shift counts for cins and exts. gas/ * config/tc-mips.c (validate_mips_insn): Handle field descriptors +x, +X, +p, +P, +s, +S. (mips_ip): Likewise. opcodes/ * mips-dis.c (print_insn_args): Handle field descriptors +x, +p, +s, +S. * mips-opc.c (mips_builtin_opcodes): Add Octeon instructions baddu, bbit*, cins*, dmul, pop, dpop, exts*, mtm*, mtp*, syncs, syncw, syncws, vm3mulu, vm0 and vmulu. gas/testsuite/ * gas/mips/octeon.s, gas/mips/octeon.d: Add tests for baddu, bbit*, cins*, dmul, pop, dpop, exts*, mtm*, mtp*, syncs, syncw, syncws, vm3mulu, vm0 and vmulu. * gas/mips/octeon-ill.s, gas/mips/octeon-ill.s: New test. * gas/mips/mips.exp: Run it. Run octeon test with run_dump_test_arches.
2008-06-09/gas:Eric B. Weddington3-2/+6
2008-06-09 Eric B. Weddington <eric.weddington@atmel.com> * config/tc-avr.c (mcu_types): Remove support for ATmega32HVB device. * doc/c-avr.texi: Likewise.
2008-06-04 * app.c (do_scrub_chars): Do not UNGET an EOF value.Nick Clifton2-2/+8
2008-06-03gas/H.J. Lu7-0/+98
2008-06-03 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (set_sse_check): New. (md_pseudo_table): Add "sse_check". gas/testsuite/ 2008-06-03 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/i386.exp: Run sse-check-none and x86-64-sse-check-none. * gas/i386/sse-check-none.d: New. * gas/i386/sse-check-none.s: Likewise. * gas/i386/x86-64-sse-check-none.d: Likewise.
2008-06-032008-06-03 Paul Brook <paul@codesourcery.com>Paul Brook4-2/+11
gas/ * config/tc-arm.c (do_t_rbit): Populate both rm fields. gas/testsuite/ * gas/arm/thumb32.d: Update expected output.
2008-05-30gas/testsuite/H.J. Lu6-76/+109
2008-05-30 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/x86-64-avx.s: Add tests for vmovd on 64bit operands. * gas/i386/x86-64-sse2avx.s: Add tests for movd on 64bit operands. * gas/testsuite/gas/i386/x86-64-avx.d: Updated. * gas/testsuite/gas/i386/x86-64-avx-intel.d: Likewise. * gas/testsuite/gas/i386/x86-64-sse2avx.d: Likewise. opcodes/ 2008-05-30 H.J. Lu <hongjiu.lu@intel.com> * i386-opc.tbl: Add vmovd with 64bit operand. * i386-tbl.h: Regenerated.
2008-05-30 PR 5523Nick Clifton2-1/+9
* config/tc-avr.c (avr_ldi_expression): Do not warn about unknown relocs here.
2008-05-29 * config/tc-mips.c (mips_cpu_info_table): Move records forAdam Nemet2-4/+8
ST Loongson-2E/2F processors to a better place.
2008-05-272008-05-27 Martin Schwidefsky <schwidefsky@de.ibm.com>Martin Schwidefsky3-2/+6
* s390-opc.c (INSTR_RRF_R0RR): Fix RRF_R0RR operand format. 2008-05-27 Martin Schwidefsky <schwidefsky@de.ibm.com> * gas/s390/zarch-z990.d (idte): Fix operand format.
2008-05-232008-05-23 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu2-2/+13
PR gas/6518 * config/tc-i386.c (match_template): Report ambiguous operand size, not invalid suffix when there is no match in Intel syntax.
2008-05-23gas/testsuite/H.J. Lu5-0/+21
2008-05-22 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/sse-noavx.s: Add tests for cvtpd2pi, cvtpi2pd and cvttpd2pi. * gas/i386/x86-64-sse-noavx.s: Likewise. * gas/i386/sse-noavx.d: Updated. * gas/i386/x86-64-sse-noavx.d: Likewise. opcodes/ 2008-05-22 H.J. Lu <hongjiu.lu@intel.com> * i386-opc.tbl: Add NoAVX to cvtpd2pi, cvtpi2pd and cvttpd2pi. * i386-tbl.h: Regenerated.
2008-05-22gas/testsuite/H.J. Lu11-46/+3673
2008-05-22 H.J. Lu <hongjiu.lu@intel.com> PR gas/6517 * gas/i386/avx.s: Add tests for unspecified memory operand size in Intel syntax. * gas/i386/x86-64-avx.s: Likewise. * gas/i386/simd.s: Add tests for cvtsi2ss and cvtsi2sd with unspecified memory operand size in Intel syntax. * gas/i386/avx.d: Updated. * gas/i386/avx-intel.d: Likewise. * gas/i386/simd.d: Likewise. * gas/i386/simd-intel.d: Likewise. * gas/i386/simd-suffix.d: Likewise. * gas/i386/x86-64-avx.d: Likewise. * gas/i386/x86-64-avx-intel.d: Likewise. opcodes/ 2008-05-22 H.J. Lu <hongjiu.lu@intel.com> PR gas/6517 * i386-opc.tbl: Break cvtsi2ss/cvtsi2sd/vcvtsi2sd/vcvtsi2ss into 32bit and 64bit. Remove Reg64|Qword and add IgnoreSize|No_qSuf on 32bit version. * i386-tbl.h: Regenerated.
2008-05-222008-05-22 Paul Brook <paul@codesourcery.com>Paul Brook2-5/+18
gas/ * config/tc-arm.c (parse_cond): Covert to lowercase before matching.
2008-05-21gas/testsuite/H.J. Lu5-0/+16
2008-05-21 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/sse-noavx.s: Add tests for movdq2q and movq2dq. * gas/i386/x86-64-sse-noavx.s: Likewise. * gas/i386/sse-noavx.d: Updated. * gas/i386/x86-64-sse-noavx.d: Likewise. opcodes/ 2008-05-21 H.J. Lu <hongjiu.lu@intel.com> * i386-opc.tbl: Add NoAVX to movdq2q and movq2dq. * i386-tbl.h: Regenerated.
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