Age | Commit message (Collapse) | Author | Files | Lines |
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prefix `+'.
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flags requires SP.
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(elf64_alpha_relocate_section): Translate local_got_entries
for STT_SECTION symbol to SHF_MERGE section the first time
we see it.
* elfxx-ia64.c (struct elfNN_ia64_local_hash_entry): Add
sec_merge_done.
(get_local_sym_hash): New, extracted from get_dyn_sym_info.
(get_dyn_sym_info): Use it.
(elfNN_ia64_relocate_section): Translate local dyn entries
for STT_SECTION symbol to SHF_MERGE section the first time
we see it.
* write.c (adjust_reloc_syms): Mark SEC_MERGE symbols as used
in reloc if it has non-zero addend.
* config/tc-alpha.c (tc_gen_reloc): Reinstall SEC_MERGE check.
* config/tc-sparc.c (md_apply_fix3): Likewise.
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* config/tc-ia64.h (md_after_parse_args): Define.
* config/tc-ia64.c (ia64_after_parse_args): Reject --gstabs.
* doc/internals.texi (CPU backend): Document md_after_parse_args.
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* elflink.h (elf_link_input_bfd): Don't consider empty
merged sections as removed in relocation tests.
* elf-bfd.h (_bfd_elf_rela_local_sym): Add prototype.
* elf32-i386.c (elf_i386_relocate_section): Handle relocs
against STT_SECTION symbol of SHF_MERGE section.
* elf32-arm.h (elf32_arm_relocate_section): Likewise.
* elf32-avr.c (elf32_avr_relocate_section): Call
_bfd_elf_rela_local_sym.
* elf32-cris.c (cris_elf_relocate_section): Likewise.
* elf32-d10v.c (elf32_d10v_relocate_section): Likewise.
* elf32-fr30.c (fr30_final_link_relocate): Likewise.
* elf32-h8300.c (elf32_h8_relocate_section): Likewise.
* elf32-hppa.c (elf32_hppa_relocate_section): Likewise.
* elf32-i370.c (i370_elf_relocate_section): Likewise.
* elf32-i860.c (elf32_i860_relocate_section): Likewise.
* elf32-m32r.c (m32r_elf_relocate_section): Likewise.
* elf32-m68k.c (elf_m68k_relocate_section): Likewise.
* elf32-mcore.c (mcore_elf_relocate_section): Likewise.
* elf32-openrisc.c (openrisc_elf_relocate_section): Likewise.
* elf32-ppc.c (ppc_elf_relocate_section): Likewise.
* elf32-s390.c (elf_s390_relocate_section): Likewise.
* elf32-sparc.c (elf32_sparc_relocate_section): Likewise.
* elf32-v850.c (v850_elf_relocate_section): Likewise.
* elf64-alpha.c (elf64_alpha_relocate_section): Likewise.
* elf64-mmix.c (mmix_elf_relocate_section): Likewise.
* elf64-ppc.c (ppc64_elf_relocate_section): Likewise.
* elf64-s390.c (elf_s390_relocate_section): Likewise.
* elf64-sparc.c (sparc64_elf_relocate_section): Likewise.
* elf64-x86-64.c (elf64_x86_64_relocate_section): Likewise.
* elf-hppa.h (elf_hppa_relocate_section): Likewise.
* elf-m10200.c (mn10200_elf_relocate_section): Likewise.
* elf-m10300.c (mn10300_elf_relocate_section): Likewise.
* elfxx-ia64.c (elfNN_ia64_relocate_section): Likewise.
* elf32-sh.c (sh_elf_relocate_section): Likewise for
!partial_inplace relocs. Handle relocs against STT_SECTION
symbol of SHF_MERGE for partial_inplace relocs.
* config/tc-alpha.c (tc_gen_reloc): Remove SEC_MERGE test.
* write.c (adjust_reloc_syms): Don't handle relocs against
SEC_MERGE section symbols specially.
(fixup_segment): Likewise.
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(md_apply_fix3): ...here. Don't prevent the symbol value being
subtracted twice from GPREL addends.
(tc_gen_reloc): Add the symbol value to a GPREL addend if it was
subtracted by the previous function.
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* config/tc-m88k.c (md_apply_fix3): Match local variable `val' to
usage after md_apply_fix3 cleanups.
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(MMIX-mmixal): Fix typo.
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val assignment.
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* gas/mips/elf-rel5.s, gas/mips/elf-rel5.s: New test
to test symbol plus offset relocations in various ways.
* gas/mips/mips.exp: Run new test.
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* config/tc-hppa.c (md_apply_fix3): Fix a typo.
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* config/tc-alpha.c (md_apply_fix3): Fix a typo.
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(i386_elf_emit_arch_note): Declare.
(CpuUnknown): Delete.
* config/tc-i386.c (default_arch): Constify.
(smallest_imm_type): Remove CpuUnknown test.
(md_assemble): Don't bother checking cpu_arch_flags non-zero.
(i386_elf_emit_arch_note): New function.
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* dwarf2dbg.c (get_frag_fix): Align last frag size.
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* doc/binutils.texi (objdump): Document ppc -M options.
gas/ChangeLog
* config/tc-ppc.c (ppc_insert_operand): Pass (ppc_cpu | ppc_size)
to operand->insert.
(md_assemble): Likewise.
gas/testsuite/ChangeLog
* gas/ppc/booke.d: Modify reloc and target matches for powerpc64.
include/opcode/ChangeLog
* ppc.h (struct powerpc_operand <insert, extract>): Add dialect param.
opcodes/ChangeLog
* ppc-opc.c (PPC64): Revert 2001-10-12. Do include PPC_OPCODE_PPC.
(insert_bat, extract_bat, insert_bba, extract_bba,
insert_bd, extract_bd, insert_bdm, extract_bdm,
insert_bdp, extract_bdp, valid_bo,
insert_bo, extract_bo, insert_boe, extract_boe,
insert_ds, extract_ds, insert_de, extract_de,
insert_des, extract_des, insert_li, extract_li,
insert_mbe, extract_mbe, insert_mb6, extract_mb6,
insert_nb, extract_nb, insert_nsi, extract_nsi,
insert_ral, insert_ram, insert_ras,
insert_rbs, extract_rbs, insert_sh6, extract_sh6,
insert_spr, extract_spr, insert_tbr, extract_tbr): Add dialect param.
(extract_bd, extract_bdm, extract_bdp,
extract_ds, extract_des,
extract_li, extract_nsi): Implement sign extension without conditional.
(insert_bdm, extract_bdm,
insert_bdp, extract_bdp, valid_bo): Handle 64 bit branch hints.
(extract_bdm, extract_bdp): Correct 32 bit validation.
(AT1_MASK, AT2_MASK): Define.
(BBOAT_MASK): Define.
(BBOATCB_MASK, BBOAT2CB_MASK, BBOATBI_MASK): Define.
(BOFM64, BOFP64, BOTM64, BOTP64): Define.
(BODNZM64, BODNZP64, BODZM64, BODZP64): Define.
(PPCCOM32, PPCCOM64): Define.
(powerpc_opcodes): Modify existing 32 bit insns with branch hints
and add new patterns to implement 64 bit branches with hints. Move
booke instructions so they match before ppc64.
* ppc-dis.c (powerpc_dialect): Set PPC_OPCODE_64 in dialect for
64 bit default targets, and parse "32" and "64" in options.
Formatting fixes.
(print_insn_powerpc): Pass dialect to operand->extract.
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symbols in SEC_MERGE sections - it was not added in, in the first place.
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put in note section. Use sizeof instead of hard-coded constants.
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(md_longopts): Allow OPTION_MABI for ELF compilation only. RE-allow
OPTION_GP32, OPTION_GP64, OPTION_FP32 for non-ELF compilation.
Sort options a bit more logical.
(md_parse_option): Allow OPTION_32, OPTION_N32, OPTION_N64,
OPTION_MABI only for elf targets.
* gas/mips/mips.exp: Change naming of some conditionals to reflect
the object format they actually mean. Don't try mips-abi32 and
mips-abi32-pic tests for ecoff.
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(load_register): Likewise.
(macro): Likewise. Some code reformatting.
(macro2): Add cast needed for varargs.
(mips16_macro): Likewise.
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(append_insn): Likewise.
(mips16_macro_build): Likewise.
(macro): Likewise.
(mips16_ip): Likewise.
(s_cpload): Likewise.
(mips_relax_frag): Likewise.
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mips_set_options.
(mips_set_options): Add members gp32, fp32, abi.
(file_mips_gp32): New flag.
(file_mips_fp32): New flag.
(mips_opts): Initialize the new members.
(mips_gp32): Remove.
(mips_fp32): Remove.
(HAVE_32BIT_GPRS): Use the new values from mips_opts.
(HAVE_32BIT_FPRS): Likewise.
(HAVE_NEWABI): Likewise.
(HAVE_64BIT_OBJECTS): Likewise.
(md_begin): Likewise. Save default (file) values.
(md_parse_option): Use the new values from mips_opts.
(s_mipsset): Likewise. Fix logic to keep the ABI selection if
possible. Let .set mipsN work together with .set push/pop.
Enhance error messages.
(mips_elf_final_processing): Use file_mips_* for header processing.
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Prune and generalize, adjusting to generic ELF file layout changes.
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the page man title.
* doc/Makefile.in: Rebuild.
* doc/as.texinfo: Do not put man SEEALSO in document;
Use @command for commands, @option for options; Reorganize usage
to clearly identify target specific options.
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* config/tc-mips.c (my_getSmallParser): Fix small parser bug.
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2001-11-04 Chris Demetriou <cgd@broadcom.com>
* configure.in (mips-*-netbsd*): Add support for target.
* configure: Regenerate.
[ gas/testsuite/ChangeLog ]
2001-11-04 Chris Demetriou <cgd@broadcom.com>
* gas/mips/mips.exp (svr4pic): Set if target is *-*-netbsd*.
(aout): Don't set if *-*-netbsd*.
[ ld/ChangeLog ]
2001-11-04 Chris Demetriou <cgd@broadcom.com>
* configure.tgt (mips*el-*-netbsd*, mips*-*-netbsd*):
Add support for targets.
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(insns): Re-arrange instructions by archtitecture. Pld instruction
is part of ARMv5E.
(tinsns): blx and bkpt are part of ARMv5T.
(do_fp_{ctrl,ldst,ldstm,dyadic,monadic,cmp,from_reg,to_reg}): Rename
to do_fpa_*. All callers changed.
* tc-arm.c (insns): Add two temporary instructions to handle
ldrd/strd.
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for bra/bsr and use frag_variant(), this ensure that the possible
16-bit BFD_RELOC_16 will be in the same frag.
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instruction.
* gas/m68hc11/opers12.d: Likewise.
* gas/m68hc11/opers12-dwarf2.d: Likewise.
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2001-10-31 Chris Demetriou <cgd@demetriou.com>
* elf32-mips.c (_bfd_mips_elf_hi16_reloc): Handle PC-relative
relocations properly.
[ gas/ChangeLog ]
2001-10-31 Chris Demetriou <cgd@broadcom.com>
* config/tc-mips.c (HAVE_32BIT_ADDRESSES): If compiling embedded
PIC code, assume pointers the same size as GPRs.
(macro): In M_LA_AB handling for embedded PIC code, support
"la $treg,foo-bar($breg)". In load/store handling
(label ld_st) support "<op> $treg,<sym>-<local_sym>($breg)"
which is used by the compiler for switch statements.
In load/store double multi-instruction macro handling
(label ldd_std) add a comment that no special handling
is currently done for embedded PIC.
(mips_ip): In 'o' (16-bit offset) case, only accept 16
bit offsets.
[ gas/testsuite/ChangeLog ]
2001-10-31 Chris Demetriou <cgd@broadcom.com>
* gas/mips/empic.s: Undo damage inflicted on 2000-12-02.
* gas/mips/empic.d: Likewise.
* gas/mips/elempic.d: Likewise (it was copied into other files).
* gas/mips/telempic.d: Likewise.
* gas/mips/tempic.d: Likewise.
* gas/mips/empic2.s: New test to check new 'la' and 'lw' (and
related ops) syntax, test loads with large offsets.
* gas/mips/emcic2.d: Likewise.
* gas/mips/mips.exp: Run the new test on ELF platforms.
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* tc-arm.c (ARM_EXT_LONGMUL, ARM_EXT_HALFWORD, ARM_EXT_THUMB): Delete.
(ARM_2UP, ARM_ALL, ARM_3UP, ARM_6UP): Delete.
(FPU_CORE, FPU_FPA10, FPA_FPA11, FPU_ALL, FPA_MEMMULTI): Delete.
(ARM_EXT_V{1,2,2S,3,3M,4,4T,5T,5ExP}): New defines.
(ARM_EXT_V{5,5E}): Synchronize with above.
(ARM_ARCH_V*): Define a complete set in terms of above features.
(ARM_{1,2,3,250,6,7,8,9,STRONG}): Define in terms of architecture.
(FPU_FPA_EXT_V[12]): Define.
(FPU_ARCH_FPE, FPU_ARCH_FPA): Define in terms of above.
(FPU_ANY): Define.
(FPU_DEFAULT): Default to FPA.
(CPU_DEFAULT): For XScale, this is now just ARM_ARCH_XSCALE; for
Thumb, this is now ARM_ARCH_V5T.
(insns): Rework for new feature defines.
(tinsns): Likewise.
(opcode_select, do_ldst, md_begin, md_parse_option): Likewise.
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