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2011-02-25Update ChangeLog entry.H.J. Lu1-2/+2
2011-02-25Don't sign-checking 4-byte relocations for x32.H.J. Lu7-17/+102
gas/ 2011-02-25 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (reloc): Don't sign-checking 4-byte relocations if 64bit relocations aren't allowed. gas/testsuite/ 2011-02-25 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/ilp32/ilp32.exp: Run reloc64. * gas/i386/ilp32/reloc64.s: Allow TLS relocations with 32bit register destinations. * gas/i386/ilp32/reloc64.d: Updated. * gas/i386/ilp32/reloc64.l: New.
2011-02-25Add a testcase for PR gas/12519.H.J. Lu5-0/+20
2011-02-25 H.J. Lu <hongjiu.lu@intel.com> PR gas/12519 * gas/elf/bad-size.d: New. * gas/elf/bad-size.err: Likewise. * gas/elf/bad-size.s: Likewise. * gas/elf/elf.exp: Run bad-size.
2011-02-25 PR gas/12519Alan Modra2-18/+11
* config/obj-elf.c (elf_frob_symbol): Properly handle size expression. * ld-mn10300/i135409-3.s: Correct .size label reference. * ld-sh/sh64/stolib.s: Likewise.
2011-02-21 * config/tc-mips.c (mips_ip) <'o'>: Remove duplicateMaciej W. Rozycki2-3/+5
initialization of offset_reloc.
2011-02-16Fix comment typo.Richard Henderson1-1/+1
2011-02-15 * dw2gencfi.c (dot_cfi_dummy): New.Richard Henderson3-2/+44
(cfi_pseudo_table) [!TARGET_USE_CFIPOP]: New. * read.c (pobegin): Unconditionally call cfi_pop_insert.
2011-02-13Remove freebsd1 from libtool.m4 macros and config.rpath.Ralf Wildenhues2-10/+6
/: Import from Libtool and gnulib: 2011-01-27 Gerald Pfeifer <gerald@pfeifer.com> Prepare for supporting FreeBSD 10. * config.rpath: Remove handling of freebsd1* which soon would match FreeBSD 10.0. 2011-01-20 Gerald Pfeifer <gerald@pfeifer.com> (tiny change) Remove support for FreeBSD 1.x. * libtool.m4 (_LT_LINKER_SHLIBS) (_LT_SYS_DYNAMIC_LINKER): Remove handling of freebsd1* which soon would incorrectly match FreeBSD 10.0. bfd/: * configure: Regenerate. gas/: * configure: Regenerate. ld/: * configure: Regenerate. opcodes/: * configure: Regenerate. binutils/: * configure: Regenerate. gprof/: * configure: Regenerate.
2011-02-13opcodes: blackfin: fix decoding of ABSMike Frysinger3-2/+6
The single cycle dual mac ABS insn was incorrectly decoding the mac1 part of the insn. Once we fix the decode, update the gas tests to have the correct output. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-02-13opcodes: blackfin: fix decoding of dsp mult insnsMike Frysinger6-23/+28
When assigning to a register half, the mac0 part of the mult insn was not decoding properly. It would always show a full dreg instead of the dreg low half. Once we fix the disassembler, we have to update a few of the gas tests as their previous expected output was incorrect. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-02-13gas/opcodes: blackfin: punt BYTEOP2M insn supportMike Frysinger8-110/+12
The BYTEOP2M insn was part of the initial Blackfin designs, but never made it into any actual silicon. So punt support for it. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-02-12gas/opcodes: blackfin: move dsp mac func defines to common headerMike Frysinger2-12/+8
The mmod field is decoded in a few places (gas/opcodes/sim), so move it to a common place to avoid duplication. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-02-11gas: blackfin: docs: typo fixes and fill out directive infoMike Frysinger2-8/+26
A bunch of Blackfin-specific directives were lacking info on what they actually do, so fill in the blanks. Further, the byte2/byte4 descriptions were swapped. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-02-11gas: blackfin: reject FP/SP with TESTSETMike Frysinger2-0/+7
The TESTSET insn does not work with the FP/SP Pregs, so reject them. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-02-10 * doc/c-ppc.texi (PowerPC-Opts <-nops>): Clarify.Alan Modra2-1/+6
2011-02-102011-02-10 Kai Tietz <kai.tietz@onevision.com>Kai Tietz2-4/+8
* gas/cfi/cfi-x86_64.d: Adjust for x64 PE+.
2011-02-10 * doc/as.texinfo (Overview): Add missing markup around BlackfinAlan Modra2-0/+9
and PowerPC options.
2011-02-10 * config/tc-ppc.c (md_show_usage): Remove -l and -b. Add -K PIC.Alan Modra4-14/+70
* doc/as.texinfo: Refer to and include c-ppc.texi for PowerPC options. (Overview <Target PowerPC options>): Add a number of missing options. * doc/c-ppc.texi: Likewise. Add markup for use in manpage generation.
2011-02-10 * gas/m68k/cpu32.d: Set explicit architecture for objdump.Alan Modra4-3/+9
* gas/m68k/mcf-coproc.d: Likewise. * gas/m68k/mcf-wdebug.d: Likewise.
2011-02-10 * gas/elf/dwarf2-4.s: Don't use @.Alan Modra2-3/+7
2011-02-08Use f32_patt in i386_align_code when tuning for i686.H.J. Lu6-48/+437
gas/ 2011-02-08 H.J. Lu <hongjiu.lu@intel.com> PR gas/6957 * config/tc-i386.c (i386_align_code): Use f32_patt when tuning for i686. gas/testsuite/ 2011-02-08 H.J. Lu <hongjiu.lu@intel.com> PR gas/6957 * gas/i386/nops-1-i686.d: Updated. * gas/i386/nops-3-i686.d: Likewise. * gas/i386/nops-4-i686.d: Likewise.
2011-02-08Also update cpu_arch_isa_flags for ISA extensions.H.J. Lu7-0/+255
gas/ 2011-02-08 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (set_cpu_arch): Also update cpu_arch_isa_flags for ISA extensions. (md_parse_option): Likewise. gas/testsuite/ 2011-02-08 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/i386.exp: Run nops-4a-i686 and nops-6. * gas/i386/nops-4a-i686.d: New. * gas/i386/nops-6.d: Likewise. * gas/i386/nops-6.s: Likewise.
2011-02-07 PR gas/3041Alan Modra4-1/+75
* gas/m68k/p3041pcrel.s, * gas/m68k/p3041pcrel.d: New test. * gas/m68k/all.exp: Add "p3041pcrel" and enable p3041 tests for all m68k-aout targets.
2011-02-03 gas/Bernd Schmidt11-120/+34
* doc/as.texinfo (Target TIC6X options): Don't mention "-matomic". * doc/c-tic6x.texi (TIC6X Directives): Don't mention ".atomic". (TIC6X Options): Don't mention "-matomic". * config/tc-tic6x.c (OPTION_MATOMIC, OPTION_MNO_ATOMIC): Delete. (md_longopts): Remove corresponding entries. (md_parse_option): Don't handle them. (md_show_usage): Don't document them. (tic6x_atomic): Delete variable. (tic6x_update_features): Always copy tic6x_arch_enable to tic6x_features. (tic6x_arch_enable): Remove references to TIC6X_INSN_ATOMIC. (s_tic6x_atomic, s_tic6x_noatomic): Remove functions. (md_pseudo_table): Remove ".atomic" and ".noatomic". gas/testsuite/ * gas/tic6x/dir-junk.l: Remove tests for .atomic and .noatomic. * gas/tic6x/dir-junk.s: Likewise. * gas/tic6x/insns-c674x-bad.d: Remove test. * gas/tic6x/insns-c674x-bad.l: Likewise. * gas/tic6x/insns-atomic.d: Remove "-matomic" switch. include/opcode/ * tic6x-opcode-table.h (cmtl, ll, sl): Available on C64XP. * tic6x.h (TIC6X_INSN_ATOMIC): Remove.
2011-01-31 * write.c (write_contents): Include output file name and bfd errorNick Clifton21-53/+102
value when reporting the inability to write to the output file. * config/tc-rx.c (rx_handle_align): Do not insert NOPs into align frag that has a non-zero fill value. * gas/all/align.d: Skip for the RX. * gas/elf/group1a.d: Likewise. * gas/elf/groupautoa.d: Likewise. * gas/elf/elf.exp: Do not run section5 test for the RX port. * gas/elf/section4.d: Likewise. * gas/elf/section7.d: Likewise. * gas/macros/semi.s: Fill with a non-zero pattern. * gas/macros/semi.d: Expect non-zero fill value. * gas/rx/bcnd.d: Update expected disassembly. * gas/rx/bra.d: Likewise. * gas/rx/macros.inc: Add reg1 macro. * gas/rx/max.sm: Use reg1 macro to avoid generating illegal NOP instruction. * gas/rx/mov.sm: Likewise. * gas/rx/max.d: Update expected disassembly. * gas/rx/mov.d: Likewise. * gas/rx/rx-asm-good.s: Use Renesas section names. * gas/rx/rx-asm-good.d: Update expected disassembly.
2011-01-27* config/tc-rx.c (md_convert_frag): If we can't compute the targetDJ Delorie2-6/+21
address, zero out the values stored in the object file to make objdump's output consistent.
2011-01-262011-01-26 Kai Tietz <kai.tietz@onevision.com>Kai Tietz2-0/+10
* config/tc-i386.c (md_begin): Set for x64 windows COFF target x86_dwarf2_return_column to 32.
2011-01-20 PR gas/12384Nick Clifton2-1/+7
* config/tc-h8300.c (constant_fits_width_p): Use correct type for comparison.
2011-01-19Don't compress debug sections smaller than 32 bytes.H.J. Lu2-1/+6
2011-01-18 H.J. Lu <hongjiu.lu@intel.com> * write.c (compress_debug): Return if section size is small than 32 byte.
2011-01-18Don't compress empty debug sections.H.J. Lu6-0/+39
gas/ 2011-01-18 H.J. Lu <hongjiu.lu@intel.com> PR gas/12409 * write.c (compress_debug): Return if section size is 0. gas/testsuite/ 2011-01-18 H.J. Lu <hongjiu.lu@intel.com> PR gas/12409 * gas/elf/dwarf2-4.d: New. * gas/elf/dwarf2-4.s: Likewise.
2011-01-18Properly sign-extend byte.H.J. Lu5-20/+27
gas/testsuite/ 2011-01-18 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/intel.d: Updated. * gas/i386/opcode-intel.d: Likewise. * gas/i386/opcode-suffix.d: Likewise. * gas/i386/opcode.d: Likewise. opcodes/ 2011-01-18 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (sIbT): New. (b_T_mode): Likewise. (dis386): Replace sIb with sIbT on "pushT". (x86_64_table): Replace sIb with Ib on "aam" and "aad". (OP_sI): Handle b_T_mode. Properly sign-extend byte.
2011-01-18Add tbm flag and TBM instruction pattern.H.J. Lu2-1/+7
2011-01-18 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/ilp32/x86-64-arch-2.d: Add tbm flag and TBM instruction pattern.
2011-01-18 * config/tc-arm.c (arm_cpus): Add Faraday ARMv5TE compatibleNick Clifton3-2/+15
cores: fa606te, fa616te, fmp626. Modify the VFP of fa626te. * doc/c-arm.texi (ARM Options): Add -mcpu={fa606te, fa616te, fmp626} options.
2011-01-18 PR gas/12390Nick Clifton44-195/+795
* doc/all.texi: Add NS32K * doc/as.texinfo: Remove target specific details of which characters act as comment initiators and statement separators into individual target specific files. * doc/c-alpha.texi (Alpha-Chars): Document special behaviour of the hash character at the start of a line. * doc/c-arm.texi (ARM-Chars): Likewise. * doc/c-avr.texi (AVR-Chars): Likewise. * doc/c-d10v.texi (D10V-Chars): Likewise. * doc/c-d30v.texi (D30V-Chars): Likewise. * doc/c-mmix.texi (MMIX-Chars): Likewise. * doc/c-s390.texi (s390 characters): Likewise. * doc/c-sh.texi (SH-Chars): Likewise. * doc/c-sh64.texi (SH64-Chars): Likewise. * doc/c-sparc.texi (SPARC-Chars): Likewise. * doc/c-tic6x.texi (TIC6X Syntax): Likewise. * doc/c-xtensa.texi (Xtensa Syntax): Likewise. * doc/c-z80.texi (Z80-Chars): Likewise. * doc/c-z8k.texi (Z8000-Chars): Likewise. * doc/c-pdp11.texi (PDP11-Syntax): Document line separator character. * doc/c-arc.texi (ARC-Chars): Fill in this subsection. * doc/c-bfin.texi (Blackfin Syntax): Document line comment and line separator characters. * doc/c-cr16.texi (CR16 Syntax): Likewise. * doc/c-i386.texi (i386-Chars): Likewise. * doc/c-i860.texi (i860-Chars): Likewise. * doc/c-i960.texi (i960-Chars): Likewise. * doc/c-ip2k.texi (IP2K-Chars): Likewise. * doc/c-lm32.texi (LM32-Chars): likewise. * doc/c-m32c.texi (M32C-Chars): Likewise. * doc/c-m68hc11.texi (M68HC11-syntax): Likewise. * doc/c-m68k.texi (M68K-Chars): Likewise. * doc/c-microblaze.texi (MicroBlaze-Chars): Likewise. * doc/c-msp430.texi (MSP430-Chars): Likewise. * doc/c-mt.texi (MT-Chars): Likewise. * doc/c-ns32k.texi (NS32K-Chars): Likewise. * doc/c-pj.texi (PJ-Chars): Likewise. * doc/c-ppc.texi (PowerPC-Chars): Likewise. * doc/c-rx.texi (RX-Chars): Likewise. * doc/c-score.texi (SCORE-Chars): Likewise. * doc/c-tic54x.texi (TIC54X-Chars): Likewise. * doc/c-v850.texi (V850-Chars): Likewise. * doc/c-vax.texi (VAX-Chars): Likewise. * doc/c-xc16x.texi (xc16x-Chars): Likewise.
2011-01-17Add TBM testsuite files missing from last commit.Quentin Neill6-0/+1489
2011-01-17Add support for TBM instructions.Quentin Neill13-2/+65
gas/ 2011-01-17 Quentin Neill <quentin.neill@amd.com> * config/tc-i386.c (cpu_arch): Add CPU_TBM_FLAGS. * doc/c-i386.texi (i386-TBM): New section. opcodes/ 2011-01-17 Quentin Neill <quentin.neill@amd.com> * i386-dis.c (REG_XOP_TBM_01): New. (REG_XOP_TBM_02): New. (reg_table): Add REG_XOP_TBM_01 and REG_XOP_TBM_02 tables. (xop_table): Redirect to REG_XOP_TBM_01 and REG_XOP_TBM_02 entries, and add bextr instruction. * i386-gen.c (cpu_flag_init): Add CPU_TBM_FLAGS, CpuTBM. (cpu_flags): Add CpuTBM. * i386-opc.h (CpuTBM) New. (i386_cpu_flags): Add bit cputbm. * i386-opc.tbl: Add bextr, blcfill, blci, blcic, blcmsk, blcs, blsfill, blsic, t1mskc, and tzmsk. * i386-init.h: Regenerated. * i386-tbl.h: Regenerated gas/testsuite 2011-01-17 Quentin Neill <quentin.neill@amd.com> * gas/i386/tbm.s: New. * gas/i386/tbm.d: New. * gas/i386/tbm-intel.d: New. * gas/i386/x86-64-tbm.s: New. * gas/i386/x86-64-tbm.d: New. * gas/i386/x86-64-tbm-intel.d: New. * gas/i386/arch-10.d: Add tbm flag and TBM instruction pattern. * gas/i386/arch-10.s: Add a TBM instruction. * gas/i386/arch-10-1.l: Add TBM instruction pattern. * gas/i386/arch-10-2.l: Likewise. * gas/i386/arch-10-3.l: Likewise. * gas/i386/arch-10-4.l: Likewise. * gas/i386/x86-64-arch-2.s: Likewise. * gas/i386/x86-64-arch-2.d: Likewise.
2011-01-16Disallow 64bit relocations in x32 mode.H.J. Lu11-43/+315
gas/ 2011-01-16 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (disallow_64bit_disp): Renamed to ... (disallow_64bit_reloc): This. (md_assemble): Don't check movabs for x32 mode here. (i386_target_format): Updated. (tc_gen_reloc): Check if 64bit relocations are allowed. gas/testsuite/ 2011-01-16 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/ilp32/immed64.s: New. * gas/i386/ilp32/reloc64.s: Likewise. * gas/i386/ilp32/x86-64-pcrel.s: Likewise. * gas/i386/ilp32/inval.s: Add more tests. * gas/i386/ilp32/immed64.d: Updated. * gas/i386/ilp32/inval.l: Likewise. * gas/i386/ilp32/reloc64.d: Likewise. * gas/i386/ilp32/x86-64-pcrel.d: Likewise.
2011-01-15Update ChangeLog.H.J. Lu1-1/+1
2011-01-15Don't allow movabs with relocation in x32 mode.H.J. Lu8-22/+383
gas/ 2011-01-15 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (disallow_64bit_disp): New. (x86_elf_abi): Replace X86_64_LP64_ABI/X86_64_ILP32_ABI with X86_64_ABI/X86_64_X32_ABI. (md_assemble): Don't allow movabs with relocation in x32 mode. (i386_target_format): Updated. gas/testsuite/ 2011-01-15 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/ilp32/ilp32.exp: Run inval. * gas/i386/ilp32/inval.l: New. * gas/i386/ilp32/inval.s: Likewise. * gas/i386/ilp32/x86-64.s: Likewise. * gas/i386/ilp32/x86-64.d: Don't use ../x86_64.s. Updated.
2011-01-14Rename --n32 to --x32.H.J. Lu8-12/+29
gas/ 2011-01-14 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (OPTION_N32): Renamed to ... (OPTION_X32): This. (md_longopts): Replace n32 with x32. (md_parse_option): Updated. (md_show_usage): Likewise. * doc/c-i386.texi: Replace n32 with x32. gas/testsuite/ 2011-01-14 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/ilp32/cfi/ilp32.exp: Replace --n32 with --x32. * gas/i386/ilp32/elf/ilp32.exp: Likewise. * gas/i386/ilp32/ilp32.exp: Likewise. * gas/i386/ilp32/lns/ilp32.exp: Likewise. ld/testsuite/ 2011-01-14 H.J. Lu <hongjiu.lu@intel.com> * ld-x86-64/ilp32-1.d: Replace --n32 with --x32. * ld-x86-64/ilp32-2.d: Likewise. * ld-x86-64/ilp32-3.d: Likewise. * ld-x86-64/ilp32-4.d: Likewise. * ld-x86-64/ilp32-5.d: Likewise. * ld-x86-64/x86-64.exp: Likewise.
2011-01-11Take unadjusted offset for loongson3a specific instructions.Mingjie Xing5-12/+31
2011-01-10* config/tc-i386.c (x86_elf_abi): Only define for targets that useNick Clifton2-0/+10
it.
2011-01-10 * config/tc-arm.c (s_arm_tls_desceq): Move code into ELF-onlyNick Clifton2-1/+6
part of the file.
2011-01-10 bfd/Nathan Sidwell6-29/+169
* reloc.c (BFD_RELOC_ARM_TLS_GOTDESC, BFD_RELOC_ARM_TLS_CALL, BFD_RELOC_ARM_THM_TLS_CALL, BFD_RELOC_ARM_TLS_DESCSEQ, BFD_RELOC_ARM_THM_TLS_DESCSEQ, BFD_RELOC_ARM_TLS_DESC): New relocations. * libbfd.h: Rebuilt. * bfd-in2.h: Rebuilt. * elf32-arm.c (elf32_arm_howto_table_1): Add new relocations. (elf32_arm_reloc_map): Likewise. (tls_trampoline, dl_tlsdesc_lazy_trampoline): New PLT templates. (elf32_arm_stub_long_branch_any_tls_pic, elf32_arm_stub_long_branch_v4t_thumb_tls_pic): New stub templates. (DEF_STUBS): Add new stubs. (struct_elf_arm_obj_data): Add local_tlsdesc_gotent field. (elf32_arm_local_tlsdesc_gotent): New. (GOT_TLS_GDESC): New mask. (GOT_TLS_GD_ANY): Define. (struct elf32_arm_link_hash_entry): Add tlsdesc_got field. (elf32_arm_compute_jump_table_size): New. (struct elf32_arm_link_hash_table): Add next_tls_desc_index, num_tls_desc, dt_tlsdesc_plt, dt_tlsdesc_got, tls_trampoline, sgotplt_jump_table_size fields. (elf32_arm_link_hash_newfunc): Initialize tlsdesc_got field. (elf32_arm_link_hash_table_create): Initialize new fields. (arm_type_of_stub): Check TLS desc relocs too. (elf32_arm_stub_name): TLS desc relocs can be shared. (elf32_arm_tls_transition): Determine relaxation. (arm_stub_required_alignment): Add tls stubs. (elf32_arm_size_stubs): Likewise. (elf32_arm_tls_relax): Perform TLS relaxing. (elf32_arm_final_link_relocate): Process TLS DESC relocations. (IS_ARM_TLS_GNU_RELOC): New. (IS_ARM_TLS_RELOC): Use it. (elf32_arm_relocate_section): Perform TLS relaxing. (elf32_arm_check_relocs): Anticipate TLS relaxing, process tls desc relocations. (allocate_dynrelocs): Allocate tls desc relcoations. (elf32_arm_output_arch_local_syms): Emit tls trampoline mapping symbols. (elf32_arm_size_dynamic_sections): Allocate tls trampolines and got slots. (elf32_arm_always_size_sections): New. Create _TLS_MODULE_BASE symbol. (elf32_arm_finish_dynamic_symbol): Adjust. (arm_put_trampoline): New. (elf32_arm_finish_dynamic_sections): Emit new dynamic tags and tls trampolines. (elf_backend_always_size_sections): Define. include/elf/ * arm.h (R_ARM_TLS_DESC, R_ARM_TLS_GOTDESC, R_ARM_TLS_CALL, R_ARM_TLS_DESCSEQ, T_ARM_THM_TLS_CALL, R_ARM_THM_TLS_DESCSEQ): New relocations. gas/ * doc/c-arm.texi: Document TLSDESC and TLSCALL relocations, and .tlsdescseq directive. * config/tc-arm.c (arm_typed_reg_parse): Check for potential reloc following a symbol. (s_arm_tls_descseq): New directive. (md_pseudo_table): Add it. (encode_branch): Allow TLS_CALL relocs too. (do_t_blx, do_t_branch23): Use encode_branch. (reloc_names): Add tlsdesc and tlscall. (md_apply_fix): Process tls desc relocations. (tc_gen_reloc): Likewise. (arm_fix_adjustable): Likewise. gas/testsuite/ * gas/arm/tls.s: Add tlsdesc tests. * gas/arm/tls.d: Adjust. ld/testsuite/ * ld-arm/arm-elf.exp: Added tests for new TLS handling relocations. * ld-arm/tls-descrelax-be32.d: New. * ld-arm/tls-descrelax-be32.s: New. * ld-arm/tls-descrelax-be8.d: New. * ld-arm/tls-descrelax-be8.s: New. * ld-arm/tls-descrelax-v7.d: New. * ld-arm/tls-descrelax-v7.s: New. * ld-arm/tls-descrelax.d: New. * ld-arm/tls-descrelax.s: New. * ld-arm/tls-descseq.d: New. * ld-arm/tls-descseq.r: New. * ld-arm/tls-descseq.s: New. * ld-arm/tls-gdesc-got.d: New. * ld-arm/tls-gdesc-got.s: New. * ld-arm/tls-gdesc-nlazy.g: New. * ld-arm/tls-gdesc-nlazy.s: New. * ld-arm/tls-gdesc.d: New. * ld-arm/tls-gdesc.r: New. * ld-arm/tls-gdesc.s: New. * ld-arm/tls-gdierelax.d: New. * ld-arm/tls-gdierelax.s: New. * ld-arm/tls-gdierelax2.d: New. * ld-arm/tls-gdierelax2.s: New. * ld-arm/tls-gdlerelax.d: New. * ld-arm/tls-gdlerelax.s: New. * ld-arm/tls-lib-loc.d: New. * ld-arm/tls-lib-loc.r: New. * ld-arm/tls-lib-loc.s: New. * ld-arm/tls-longplt-lib.d: New. * ld-arm/tls-longplt-lib.s: New. * ld-arm/tls-longplt.d: New. * ld-arm/tls-longplt.s: New. * ld-arm/tls-mixed.r: New. * ld-arm/tls-mixed.s: New. * ld-arm/tls-thumb1.d: New. * ld-arm/tls-thumb1.s: New. * ld-arm/arm-elf.exp: New.
2011-01-07Update gas/i386/ilp32/x86-64-arch-2.d.H.J. Lu2-1/+7
2011-01-07 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/ilp32/x86-64-arch-2.d: Add bmi flag and BMI instruction pattern.
2011-01-07Add docs and arch tests to BMI.Quentin Neill12-2/+55
gas/ 2011-01-07 Quentin Neill <quentin.neill@amd.com> * config/tc-i386.c (cpu_arch): Add CPU_BMI_FLAGS. * doc/c-i386.texi (i386-BMI): New section. gas/testsuite/ 2011-01-07 Quentin Neill <quentin.neill@amd.com> * gas/i386/arch-10.s: Add a BMI instruction. * gas/i386/x86-64-arch-2.s: Likewise. * gas/i386/arch-10.d: Add bmi flag and BMI instruction pattern. * gas/i386/x86-64-arch-2.d: Likewise. * gas/i386/arch-10-1.l: Add BMI instruction pattern. * gas/i386/arch-10-2.l: Likewise. * gas/i386/arch-10-3.l: Likewise. * gas/i386/arch-10-4.l: Likewise.
2011-01-07* gas/pdp11/pdp11.exp: Add run of absreloc.Paul Koning2-0/+5
2011-01-06* config/tc-pdp11.c (parse_op_no_deferred): Allow PC-relativePaul Koning5-7/+51
references to absolute addresses.
2011-01-06* gas/pdp11/opcode.d: Fix expected output for sec instruction.Paul Koning2-1/+5
2011-01-06 gas/testsuite/Nathan Sidwell3-0/+42
* gas/arm/blx-bad.s: New. * gas/arm/blx-bad.d: New. opcodes/ * arm-dis.c (thumb32_opcodes): BLX must have bit zero clear.
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