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2018-06-07Fix AArch64 unintialized variable which can cause diagnostic failures.Tamar Christina2-0/+8
2018-06-06Update the AArch64 assembler to note that the Qualcomm Saphira cpu supports A...Sameera Deshpande2-1/+6
2018-06-05Another s12z regenAlan Modra2-1/+5
2018-06-04xtensa: add separate property sections optionMax Filippov2-1/+32
2018-06-01Bump version number to 2.30.52H.J. Lu2-10/+14
2018-06-01Drop view when consuming line infoAlexandre Oliva2-0/+5
2018-06-01x86: don't emit REX.W for SLDT and STRJan Beulich3-4/+9
2018-06-01x86: relax redundant REX prefix checkJan Beulich5-2/+37
2018-06-01x86: simplify control register checkJan Beulich2-5/+7
2018-06-01x86: tighten condition for emitting LOCK on control register accessesJan Beulich2-4/+9
2018-06-01x86/Intel: accept "oword ptr" for INVPCIDJan Beulich7-0/+16
2018-05-30Add znver2 support.Amit Pawar12-36/+154
2018-05-25s12z regenAlan Modra2-0/+6
2018-05-24RISC-V: Fix .align handling when .option norelax.Jim Wilson7-10/+75
2018-05-21Remove fake operand handling for extended mnemonics.Peter Bergner6-455/+470
2018-05-18RISC-V: Add RV32E support.Jim Wilson3-11/+73
2018-05-18Add support for the Freescale s12z processor.John Darrington213-0/+8009
2018-05-16NDS32/GAS: Correct an `expr' global shadowing error for pre-4.8 GCCMaciej W. Rozycki2-2/+7
2018-05-15Implement Read/Write constraints on system registers on AArch64Tamar Christina7-5/+35
2018-05-15Allow non-fatal errors to be emitted and for disassembly notes be placed on A...Tamar Christina2-51/+89
2018-05-15Modify AArch64 Assembly and disassembly functions to be able to fail and repo...Tamar Christina2-10/+25
2018-05-14Stop generating GNU build notes for linkonce sections.Nick Clifton2-48/+49
2018-05-14Fix a problem in the assembler when checking for overlapping input and output...Nick Clifton2-1/+7
2018-05-12score gcc-8 warning fixesAlan Modra2-70/+72
2018-05-10Allow integer immediates for AArch64 fmov instructions.Tamar Christina8-43/+37
2018-05-10Allow integer immediate for VFP vmov instructions.Tamar Christina4-0/+34
2018-05-09gas: xtensa: fix literal movementMax Filippov9-21/+116
2018-05-09Fix binary compatibility between GCC and the TI compiler for the PRU target.Dimitar Dimitrov6-9/+37
2018-05-08RISC-V: Add missing hint instructions from RV128I.Jim Wilson5-2/+26
2018-05-07Enable Intel MOVDIRI, MOVDIR64B instructionsH.J. Lu14-0/+199
2018-05-07x86: Replace AddrPrefixOp0 with AddrPrefixOpRegH.J. Lu2-3/+12
2018-05-07Cleanup ppc code dealing with opcode dumps.Peter Bergner2-38/+34
2018-05-06gas/i386/xmmhi32.d: Also allow dir32 relocationH.J. Lu2-42/+46
2018-05-06i386: Append ".p2align 4,0" to gas testsH.J. Lu9-0/+23
2018-05-04-Wstringop-truncation warningsAlan Modra3-9/+18
2018-05-01Updated Spanish translation for the gas sub-directory.Nick Clifton2-1394/+909
2018-04-27testsuite: Support filtering targets by TCL procedure in `run_dump_test'Maciej W. Rozycki2-16/+26
2018-04-27Revert "Enable Intel MOVDIRI, MOVDIR64B instructions."Igor Tsimbalist14-197/+0
2018-04-26Enable Intel MOVDIRI, MOVDIR64B instructions.Igor Tsimbalist14-0/+197
2018-04-26Extend the assembler so that it can automatically generate GNU Build attribut...Nick Clifton10-20/+314
2018-04-26x86: fold various non-memory operand AVX512VL templatesJan Beulich2-17/+61
2018-04-26x86: also optimize zeroing-masking variants of insnsJan Beulich8-73/+84
2018-04-26x86: properly force / avoid forcing EVEX encodingJan Beulich7-7/+76
2018-04-26x86: CpuXSAVE is a prereq for various other featuresJan Beulich4-0/+56
2018-04-26x86: drop CpuRegMMX, CpuReg[XYZ]MM, and CpuRegMaskJan Beulich7-11/+110
2018-04-26x86: don't recognize bnd<N> as registers without CpuMPXJan Beulich5-0/+29
2018-04-26x86: x87-related adjustmentsJan Beulich7-6/+55
2018-04-26x86: fix indentation in build_modrm_byte()Jan Beulich2-39/+43
2018-04-26x86: move and fold common code in build_modrm_byte()Jan Beulich2-29/+18
2018-04-26x86: drop VexImmExtJan Beulich2-7/+8
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