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2015-09-25Correct the generation of OR1K pc-relative relocations.Peter Zotov3-18/+55
2015-09-25POSIX shell compatibility of gas/configure.acRyo ONODERA3-10/+16
2015-09-23Fix compile time warnings generated when compiling with clang.Nick Clifton2-1/+5
2015-09-22Change 7-byte NOP instruction for RX target, so that it only takes 1 cycle to...Nick Clifton2-2/+6
2015-09-10S/390: Fix instruction format of crj*, clrj*, and clgrj*.Andreas Krebbel1-39/+39
2015-09-10S/390: Fix MASK_RIE_R0PI and MASK_RIE_R0PU.Andreas Krebbel1-52/+52
2015-09-09S/390: Fix opcode of ppno.Andreas Krebbel1-1/+1
2015-09-08config/tc-avr.c (md_section_align): Append UL for -1 to avoid the latest gcc'...Chen Gang2-1/+6
2015-08-27More fallout from "Allow symbol and label names to be enclosed in double quotes"Alan Modra18-92/+134
2015-08-26Fallout from "Allow symbol and label names to be enclosed in double quotes"Alan Modra4-4/+13
2015-08-26Add asprintf to the list of functions whose decls are checked at configure time.Nick Clifton4-1/+22
2015-08-25Update MIPS tests for test failures on some configurations.Simon Dardis4-14/+20
2015-08-25Support for the sparc %pmcdper privileged register.Jose E. Marchesi7-0/+19
2015-08-24Fix the partial disassembly of a broken three byte instruction at the end of ...Jan Stancek3-0/+21
2015-08-21Allow symbol and label names to be enclosed in double quotes.Nick Clifton59-911/+900
2015-08-21PR binutils/18257: Properly decode x86/Intel mask instructions.Alexander Fomin5-2/+1002
2015-08-19[AArch64][5/6] GAS support TLSLD load/store relocation typesJiong Wang19-10/+222
2015-08-19[AArch64][3/6] GAS support TLSLD move/add relocation typesJiong Wang23-0/+247
2015-08-19[AArch64][1/6] GAS support BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NCJiong Wang7-0/+53
2015-08-17Rationalize ARM .alignAlan Modra4-48/+14
2015-08-13Fixes for unpredictable nops and 26-bit versions of teq,tst,cmn,cmp.Andre Vieira4-16/+39
2015-08-13gas 0f handlingAlan Modra2-38/+30
2015-08-13gas 0b vs 0b0 vs 00bAlan Modra2-21/+32
2015-08-13Correct local label docAlan Modra2-5/+10
2015-08-12xtensa: add --auto-litpools optionMax Filippov9-7/+523
2015-08-12[MIPS] Map 'move' to 'or'.Simon Dardis38-179/+239
2015-08-12Remove trailing spaces in gasH.J. Lu81-812/+812
2015-08-11[AArch64][7/8] GAS support BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12Jiong Wang7-0/+54
2015-08-11[AArch64][5/8] GAS support BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NCJiong Wang7-0/+55
2015-08-11[AArch64][2/8] GAS support BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21Jiong Wang7-1/+50
2015-08-11Fix compile time warning messages about constant expressions where a value is...Nick Clifton2-5/+13
2015-08-11Convert 'A && (!A || B)' to 'A || B' in various places.Nick Clifton2-10/+15
2015-08-11Fix typo checking MMIX operands.Nick Clifton2-2/+6
2015-08-11Fix typo checking number of operands.Nick Clifton2-1/+4
2015-08-11Fix a typo where the same name was checked twice.Nick Clifton2-1/+6
2015-08-10Add SIGRIE instruction for MIPS R6Robert Suchanek5-0/+16
2015-08-08tc-arm.c: Append ULL to 0xFFFFFFFFFFFFF to avoid errors on 32-bit hosts.Hans-Peter Nilsson2-2/+7
2015-08-042015-08-04 Thomas Preud'homme <thomas.preudhomme@arm.com>Thomas Preud'homme2-0/+8
2015-08-03Fix thinkos in the description of the --hash-size command line option for GAS.Nick Clifton2-5/+13
2015-07-30Properly disassemble movnti in Intel modeH.J. Lu4-0/+334
2015-07-28Add cores for M5100 seriesRobert Suchanek3-0/+10
2015-07-28Add -march=interaptivRobert Suchanek3-0/+8
2015-07-27Regenerate configure filesH.J. Lu2-2/+6
2015-07-24Fix the evaluation of RL78 complex relocs, by making immediate values be comp...Nick Clifton7-2/+42
2015-07-24Remove leading/trailing white spaces in ChangeLogH.J. Lu2-5/+5
2015-07-22Fix memory operand size for vcvtt?ps2u?qq instructionsH.J. Lu13-240/+331
2015-07-22gas line buffer handlingAlan Modra2-55/+54
2015-07-21[ARM] Support correctly spelled ARMv6KZ architecture namesMatthew Wahab7-5/+55
2015-07-20Make binutils abort message GDB friendlyH.J. Lu1-4/+4
2015-07-16Updates the ARM disassembler's output of floating point constants to include ...Alessandro Marzocchi1-2/+2
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