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2017-05-10[ARC] Object attributes.Claudiu Zissulescu46-69/+762
2017-05-03MIPS16/GAS: Relax 32-bit non-PIC PC-relative synthetic instructionsMaciej W. Rozycki106-109/+2349
2017-05-03Prevent a seg-fault in the assembler when provided with a bogus input source ...Nick Clifton2-3/+23
2017-05-03MIPS16/GAS: Fix absolute references with PC-relative synthetic instructionsMaciej W. Rozycki18-1/+193
2017-04-27MIPS16/GAS: Factor out duplicate symbol value conversion codeMaciej W. Rozycki2-92/+94
2017-04-27MIPS16/GAS: Rename the LONG_BRANCH relaxation flagMaciej W. Rozycki2-6/+16
2017-04-27Tidy S_FORCE_RELOCAlan Modra2-6/+14
2017-04-27MIPS/GAS: Fix `.option picX' handling with relaxationMaciej W. Rozycki20-52/+375
2017-04-25[ARC] Enhance enter/leave mnemonics.Claudiu Zissulescu3-16/+41
2017-04-25[ARC] Prefer NOP instead of MOV 0,0Claudiu Zissulescu3-5/+10
2017-04-25MIPS/GAS: Correct BFD_RELOC_MIPS16_16_PCREL_S1 fixup sizeMaciej W. Rozycki8-5/+108
2017-04-25gas: sparc: fix relaxation of CALL instruction into branches in a.out targetsJose E. Marchesi6-2/+69
2017-04-24[GAS/ARM] Fix expansion of ldr pseudo instructionThomas Preud'homme4-24/+40
2017-04-22PowerPC VLE insn set additionsAlan Modra3-127/+140
2017-04-21Fix detection of illegal AArch64 opcodes that resemble LD1R, LD2R, LD3R and L...Nick Clifton3-0/+29
2017-04-11Bye bye PPC_OPCODE_HTM and -mhtmAlan Modra3-3/+7
2017-04-10gas: xtensa: fix incorrect code generated with auto litpoolsMax Filippov8-32/+95
2017-04-07Remove E6500 insns from PPC_OPCODE_ALTIVEC2Alan Modra3-163/+72
2017-04-07MBIND gas test tweakAlan Modra2-2/+7
2017-04-06Add support for disassembling WebAssembly opcodes.Pip Cet9-38/+78
2017-04-04Support ELF SHF_GNU_MBIND and PT_GNU_MBIND_XXXH.J. Lu21-25/+222
2017-04-03RISC-V: Avoid a const warningPalmer Dabbelt2-1/+6
2017-04-03 IA16 supportAndrew Jenner1-0/+3
2017-03-31RISC-V: Allow ISA subsets to be disabledPalmer Dabbelt2-0/+21
2017-03-31Reduce the size of s390 symbol tables by allowing relocations in mergeable st...Nick Clifton2-2/+10
2017-03-30Add support for the WebAssembly file format and the wasm32 ELF conversion to ...Pip Cet64-1662/+3502
2017-03-29PowerPC -Mraw disassemblyAlan Modra2-1/+6
2017-03-27PR21303, objdump doesn't show e200z4 insnsAlan Modra4-0/+25
2017-03-27Implement ARC NPS-400 Ultra Ip and Miscellaneous instructions.Rinat Zelig3-0/+135
2017-03-24[GAS/ARM] Fix selected_cpu with default CPU and -mcpuThomas Preud'homme2-2/+7
2017-03-22Sanitize RISC-V GAS help text, documentationPalmer Dabbelt3-7/+17
2017-03-22gas: xtensa: make trampolines relaxation work with jumps in slots other than 0Max Filippov2-4/+25
2017-03-21S/390: Remove vx2 facility flagAndreas Krebbel2-4/+7
2017-03-21arc/nps400: Add cp16/cp32 instructions to opcodes libraryRinat Zelig3-0/+616
2017-03-20Update descriptions of the .2byte, .4byte and .8byte directives.Nick Clifton2-14/+28
2017-03-20[arm] Document missing -mfpu entries.Richard Earnshaw3-4/+13
2017-03-20[arm] Add neon-vfp3 as an alias for neon to -mfpu.Richard Earnshaw2-0/+5
2017-03-16gas/arc: Limit special handling of t/nt flag to ARCv2Rinat Zelig2-5/+18
2017-03-15RISC-V: Fix assembler for c.li, c.andi and c.addiwKito Cheng2-0/+14
2017-03-15Fix building riscv targets with gcc v6.3.1Nick Clifton2-1/+6
2017-03-14RISC-V: Define DWARF2_USE_FIXED_ADVANCE_PC.Kuan-Lin Chen2-0/+7
2017-03-14RISC-V: Fix DW_CFA_advance_loc relocation.Kuan-Lin Chen2-0/+7
2017-03-14RISC-V: Fix the offset of CFA relocation.Kuan-Lin Chen2-10/+15
2017-03-13Rename R_AARCH64_TLSDESC_LD64_LO12_NC to R_AARCH64_TLSDESC_LD64_LO12 and R_AA...Nick Clifton3-8/+20
2017-03-10Document that the .2byte and .4byte directives warn about overlarge values.Nick Clifton2-10/+22
2017-03-09X86: Add pseudo prefixes to control encodingH.J. Lu8-48/+418
2017-03-08Update -maltivec and -mvsx options to only enable their oldest instructions.Peter Bergner2-2/+7
2017-03-08Add support for the new 'lnia' extended mnemonic.Peter Bergner3-2/+9
2017-03-07Correct @section placement for makeinfo 4.13Alan Modra2-3/+7
2017-03-07Document .Nbyte assembler directivesAlan Modra3-0/+46
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