riscv-gnu-toolchain/gdb.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2017-11-07	ngettext support	Alan Modra	2	-2/+13
2017-11-03	Add option for Qualcomm Saphira part	Siddhesh Poyarekar	3	-0/+10
2017-11-02	[ARM] Help wince objdump on coproc tests	Thomas Preud'homme	3	-2/+8
2017-11-01	FT32B is a new FT32 family member. It has a code compression scheme, which re...	James Bowman	21	-375/+2909
2017-11-01	[ARM] Fix Coprocessor instructions availability	Thomas Preud'homme	26	-35/+328
2017-10-26	x86: Check invalid XMM register in AVX512 gathers	H.J. Lu	14	-1/+41
2017-10-26	testsuite/gas/all/fill-1.s: Use L2 rather than .L2.	Hans-Peter Nilsson	2	-2/+6
2017-10-25	PR22348, conflicting global vars in crx and cr16	Alan Modra	2	-10/+18
2017-10-25	Yet another fill-1 test fix	Alan Modra	3	-11/+17
2017-10-24	RISC-V: Fix disassembly of c.addi4spn, c.addi16sp, c.lui when imm=0	Andrew Waterman	8	-0/+26
2017-10-24	RISC-V: Only relax to C.LUI when imm != 0 and rd != 0/2	Andrew Waterman	5	-0/+15
2017-10-24	Fix my previous gas/ChangeLog entry	Palmer Dabbelt	1	-2/+2
2017-10-24	i386: Support .code64 directive only with 64-bit bfd	H.J. Lu	7	-4/+54
2017-10-23	RISC-V: Don't emit 2-byte NOPs if the C extension is disabled	Palmer Dabbelt	2	-1/+6
2017-10-23	Add missing ChangeLog entries	Igor Tsimbalist	1	-0/+162
2017-10-23	MIPS: Preset EF_MIPS_ABI2 with n32 ELF objects	Maciej W. Rozycki	2	-3/+6
2017-10-23	Enable Intel AVX512_BITALG instructions.	Igor Tsimbalist	15	-0/+1046
2017-10-23	Enable Intel AVX512_VNNI instructions.	Igor Tsimbalist	15	-1/+977
2017-10-23	Enable Intel VPCLMULQDQ instruction.	Igor Tsimbalist	33	-1/+738
2017-10-23	Enable Intel VAES instructions.	Igor Tsimbalist	33	-0/+1349
2017-10-23	Enable Intel GFNI instructions.	Igor Tsimbalist	32	-1/+1865
2017-10-23	Enable Intel AVX512_VBMI2 instructions.	Igor Tsimbalist	15	-2/+3409
2017-10-22	Fix spurious left-over quotes from last edit.	Hans-Peter Nilsson	2	-3/+8
2017-10-20	Improve handling of REPT pseudo op with a negative count.	Nick Clifton	8	-9/+46
2017-10-19	RISC-V: Relax RISCV_PCREL_* to RISCV_GPREL_*	Palmer Dabbelt	2	-1/+10
2017-10-19	Fix the AVR assembler so that it will correctly issue warnings about skipped ...	Nick Clifton	6	-4/+49
2017-10-19	Fix fill-1 testcase	Andreas Krebbel	4	-6/+23
2017-10-18	RISC-V: Mark unsupported gas testcases	Palmer Dabbelt	9	-1/+38
2017-10-18	Update Cris assembler tests for checks that now pass where they used to fail.	Nick Clifton	3	-6/+9
2017-10-18	Update the Swedish translation in the GAS subdirectory.	Nick Clifton	2	-4238/+6054
2017-10-16	Fix segfault processing nios2 pseudo-instructions with too few arguments.	Sandra Loosemore	5	-30/+145
2017-10-12	FT32: support for FT32B processor - part 1	James Bowman	2	-3/+20
2017-10-11	Disable the inclusion of logical input files in the assembler listing output ...	Nick Clifton	4	-13/+38
2017-10-09	S/390: Sync with latest POP - 3 new instructions	Andreas Krebbel	4	-1/+14
2017-10-09	Add missing changelog entries	Andreas Krebbel	1	-0/+11
2017-10-09	Replace nop in fill-1.s testcase.	Andreas Krebbel	1	-1/+1
2017-10-09	Enable .fill forward labels	Andreas Krebbel	3	-1/+8
2017-10-05	Fix the MSP430 assembler so that it detects and reports extraneous text at th...	Nick Clifton	6	-27/+114
2017-10-04	Add an assembler test for PR gas/21167	H.J. Lu	4	-0/+22
2017-10-05	PR21167, relocation sections not included in groups	Alan Modra	8	-31/+62
2017-10-01	Add new mnemonics for VLE multiple load instructions	Alexander Fedotov	4	-0/+71
2017-09-27	Add support for the new names of the RISC-V fmv.x.s and fmv.s.x instructions,...	Nick Clifton	4	-0/+25
2017-09-22	readelf: Handle E_MIPS_MACH_5900	Maciej W. Rozycki	3	-0/+28
2017-09-22	PR gas/21762: MIPS: Fix .stabs directive marking labels as MIPS16	James Cowgill	7	-0/+49
2017-09-21	Reduce excessive .eh_frame alignment for powerpc	Alan Modra	2	-0/+5
2017-09-14	PR22127, as segfaults assembling invalid .reloc	Alan Modra	2	-1/+7
2017-09-09	x86: Remove restriction on NOTRACK prefix position	H.J. Lu	12	-228/+266
2017-09-07	RISC-V: Avoid emitting invalid instructions in mixed RVC/no-RVC code	Palmer Dabbelt	2	-17/+13
2017-09-05	Missing relocation R_PPC_VLE_ADDR20 and add VLE flag to details in readelf	Alexander Fedotov-B55613	4	-2/+33
2017-09-01	Enable support for the AArch64 dot-prod instruction in the Cortex A55 and A75...	Tamar Christina	2	-2/+7