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2010-10-24 * gas/mips/ld.s: Remove "l.d", "s.d" and "sd" instructions.Maciej W. Rozycki4-136/+6
* gas/mips/ld.d: Adjust accordingly. * gas/mips/ld-ilocks.d: Likewise
2010-10-24 * gas/mips/ld.s: Remove ".set mips1".Maciej W. Rozycki5-11/+15
* gas/mips/ld.d: Remove "-march=r4000" and "-mmips:4000" from gas/objdump options. * gas/mips/ld-ilocks.d: Add "-32" to gas options. * gas/mips/mips.exp: Run the two cases with run_dump_test_arches.
2010-10-24 * gas/mips/ld.s: Remove MIPS III bits.Maciej W. Rozycki6-662/+9
* gas/mips/ld.d: Adjust accordingly. * gas/mips/ld-ilocks.d: Likewise. * gas/mips/ld-ilocks-addr32.d: Remove file. * gas/mips/mips.exp: Adjust accordingly.
2010-10-24 * gas/mips/ld.d: Spell out reloc names.Maciej W. Rozycki4-750/+756
* gas/mips/ld-ilocks.d: Likewise. * gas/mips/ld-ilocks-addr32.d: Likewise.
2010-10-232010-10-23 Mark Mitchell <mark@codesourcery.com>Mark Mitchell15-37/+82
* config/obj-elf.c (elf_adjust_symtab): New. Move group section processing here from elf_frob_file. Ensure that group signature symbols have the name of the group. (elf_frob_file): Move group section processing to elf_adjust_symtab. * config/obj-elf.h (elf_adjust_symtab): Declare. (obj_adjust_symtab): Define. * config/tc-arm.c (arm_adjust_symtab): Call elf_adjust_symtab. 2010-10-23 Mark Mitchell <mark@codesourcery.com> * gas/elf/elf.exp: Add group0c test. * gas/elf/group0c.d: New. * gas/elf/group0a.d: Expect ".group" for the name of group sections. * gas/elf/group0b.d: Likewise. * gas/elf/group1a.d: Likewise. * gas/elf/group1b.d: Likewise. * gas/elf/groupautoa.d: Likewise. * gas/elf/groupautob.d: Likewise. * gas/elf/section4.d: Likewise. * gas/ia64/group-1.d: Likewise. Adjust hard-coded constants. 2010-10-22 Mark Mitchell <mark@codesourcery.com> * binutils-all/group-5.d: Expect ".group" for the name of group sections. * binutils-all/strip-2.d: Likewise. 2010-10-23 Mark Mitchell <mark@codesourcery.com> * ld-elf/group10.d: Expect ".group" for the name of group sections. * ld-elf/group2.d: Likewise. * ld-elf/group7.d: Likewise.
2010-10-22 ld:Rainer Orth2-1/+12
* emulparams/elf32_sparc_sol2.sh (OUTPUT_FORMAT): Set to elf32-sparc-sol2. * emulparams/elf64_sparc_sol2.sh (OUTPUT_FORMAT): Set to elf64-sparc-sol2. gas: * config/tc-sparc.h [TE_SOLARIS] (ELF_TARGET_FORMAT): Define as elf32-sparc-sol2. (ELF64_TARGET_FORMAT): Define as elf64-sparc-sol2. bfd: * elfxx-sparc.c (tpoff): Define bed, static_tls_size. Consider static_tls_alignment. * elf32-sparc.c (TARGET_BIG_SYM): Redefine to bfd_elf32_sparc_sol2_vec. (TARGET_BIG_NAME): Redefine to elf32-sparc-sol2. (elf32_bed): Redefine to elf32_sparc_sol2_bed. (elf_backend_static_tls_alignment): Redefine to 8. Include elf32-target.h. (elf_backend_static_tls_alignment): Undef again for VxWorks. * elf64-sparc.c (TARGET_BIG_SYM): Redefine to bfd_elf64_sparc_sol2_vec. (TARGET_BIG_NAME): Redefine to elf64-sparc-sol2. (ELF_OSABI): Undef. (elf64_bed): Redefine to elf64_sparc_sol2_bed. (elf_backend_static_tls_alignment): Redefine to 16. Include elf64-target.h. * config.bfd (sparc-*-solaris2.[0-6]): Split from sparc-*-elf*. Set targ_defvec to bfd_elf32_sparc_sol2_vec. [BFD64] (sparc-*-solaris2*): Set targ_defvec to bfd_elf32_sparc_sol2_vec. Replace bfd_elf64_sparc_vec by bfd_elf64_sparc_sol2_vec in targ_selvecs. * configure.in: Handle bfd_elf32_sparc_sol2_vec, bfd_elf64_sparc_sol2_vec. * configure: Regenerate. * targets.c (bfd_elf32_sparc_sol2_vec): Declare. (bfd_elf64_sparc_sol2_vec): Declare. (_bfd_target_vector): Add bfd_elf32_sparc_sol2_vec, bfd_elf64_sparc_sol2_vec.
2010-10-22 * gas/all/fwdexp.d: Also look for f8ffffff.Nick Clifton6-1/+16
* gas/arm/msr-reg-thumb.d: Skip for non-ELF based targets. * gas/arm/vldr.d: Likewise. * gas/arm/thumb2_ldmstm.d: Allow for extra NOPs at the end of the disassembly. * gas/cfi/cfi.exp (cfi-arm-1): Only run for ELF based ARM targets.
2010-10-21bfd:Joseph Myers21-40/+64
* elf32-tic6x.c (elf32_tic6x_merge_arch_attributes): Update for attribute renaming. (elf_backend_obj_attrs_section): Change to ".c6xabi.attributes". binutils: * readelf.c (display_tic6x_attribute): Update for attribute renaming. gas: * config/tc-tic6x.c (tic6x_arch_attribute, tic6x_arches, md_assemble, tic6x_set_attributes): Update for attribute renaming. * doc/c-tic6x.texi: Update for attribute renaming. gas/testsuite: * gas/tic6x/attr-arch-directive-1.d, gas/tic6x/attr-arch-directive-2.d, gas/tic6x/attr-arch-directive-3.d, gas/tic6x/attr-arch-directive-4.d, gas/tic6x/attr-arch-directive-4.s, gas/tic6x/attr-arch-directive-5.d, gas/tic6x/attr-arch-directive-5.s, gas/tic6x/attr-arch-opts-c62x.d, gas/tic6x/attr-arch-opts-c64x+.d, gas/tic6x/attr-arch-opts-c64x.d, gas/tic6x/attr-arch-opts-c674x.d, gas/tic6x/attr-arch-opts-c67x+.d, gas/tic6x/attr-arch-opts-c67x.d, gas/tic6x/attr-arch-opts-none-1.d, gas/tic6x/attr-arch-opts-none-2.d, gas/tic6x/attr-arch-opts-override-1.d, gas/tic6x/attr-arch-opts-override-2.d: Update for attribute renaming and renumbering. include/elf: * tic6x-attrs.h (Tag_C6XABI_Tag_CPU_arch): Change to Tag_ISA, value 4. * tic6x.h (Values for Tag_C6XABI_Tag_CPU_arch): Rename for attribute renaming. ld: * emulparams/elf32_tic6x_le.sh (ATTRS_SECTIONS): Use .c6xabi.attributes, not __TI_build_attributes. ld/testsuite: * ld-tic6x/attr-arch-c62x-c62x.d, ld-tic6x/attr-arch-c62x-c64x+.d, ld-tic6x/attr-arch-c62x-c64x.d, ld-tic6x/attr-arch-c62x-c674x.d, ld-tic6x/attr-arch-c62x-c67x+.d, ld-tic6x/attr-arch-c62x-c67x.d, ld-tic6x/attr-arch-c64x+-c62x.d, ld-tic6x/attr-arch-c64x+-c64x+.d, ld-tic6x/attr-arch-c64x+-c64x.d, ld-tic6x/attr-arch-c64x+-c674x.d, ld-tic6x/attr-arch-c64x+-c67x+.d, ld-tic6x/attr-arch-c64x+-c67x.d, ld-tic6x/attr-arch-c64x-c62x.d, ld-tic6x/attr-arch-c64x-c64x+.d, ld-tic6x/attr-arch-c64x-c64x.d, ld-tic6x/attr-arch-c64x-c674x.d, ld-tic6x/attr-arch-c64x-c67x+.d, ld-tic6x/attr-arch-c64x-c67x.d, ld-tic6x/attr-arch-c674x-c62x.d, ld-tic6x/attr-arch-c674x-c64x+.d, ld-tic6x/attr-arch-c674x-c64x.d, ld-tic6x/attr-arch-c674x-c674x.d, ld-tic6x/attr-arch-c674x-c67x+.d, ld-tic6x/attr-arch-c674x-c67x.d, ld-tic6x/attr-arch-c67x+-c62x.d, ld-tic6x/attr-arch-c67x+-c64x+.d, ld-tic6x/attr-arch-c67x+-c64x.d, ld-tic6x/attr-arch-c67x+-c674x.d, ld-tic6x/attr-arch-c67x+-c67x+.d, ld-tic6x/attr-arch-c67x+-c67x.d, ld-tic6x/attr-arch-c67x-c62x.d, ld-tic6x/attr-arch-c67x-c64x+.d, ld-tic6x/attr-arch-c67x-c64x.d, ld-tic6x/attr-arch-c67x-c674x.d, ld-tic6x/attr-arch-c67x-c67x+.d, ld-tic6x/attr-arch-c67x-c67x.d: Update for attribute renaming.
2010-10-19Add testcase for PR gas/12049.H.J. Lu6-0/+64
2010-10-19 H.J. Lu <hongjiu.lu@intel.com> PR gas/12049 * gas/i386/i386.exp: Run relax-1 and relax-2. * gas/i386/relax-1.d: New. * gas/i386/relax-1.s: Likewise. * gas/i386/relax-2.d: Likewise. * gas/i386/relax-2.s: Likewise.
2010-10-19 * write.c (relax_segment): Correct address on frag added to stopAlan Modra2-6/+10
leb128/align frags bouncing.
2010-10-19 PR gas/12049Alan Modra3-9/+33
* frags.h (struct frag): Add "region" field. * write.c (relax_frag): Don't add "stretch" to forward reference target if there is an intervening org or align. (relax_segment): Set region.
2010-10-182010-10-18 Kai Tietz <kaI.tietz@onevision.com>Kai Tietz3-2/+7
* gas/i386/disp32.d: Adjust initial symbol check. * gas/i386/x86-64-disp32.d: Likewise.
2010-10-18 * gas/mips/ld.d: Spell out section offsets and addendsMaciej W. Rozycki5-785/+801
explicitly. Clean up some regexps. * gas/mips/ld-ilocks.d: Likewise. Add missing "$" prefixes to the names of FP registers. * gas/mips/ld-ilocks-addr32.d: Likewise. * gas/mips/ld.s: Align sections to 4k, adjust padding.
2010-10-18 * gas/mips/ld.d: Use wildcard address matching.Maciej W. Rozycki4-1872/+1878
* gas/mips/ld-ilocks.d: Likewise. * gas/mips/ld-ilocks-addr32.d: Likewise.
2010-10-18 * gas/mips/mips.exp (run_dump_test_arch): Get the name of theMaciej W. Rozycki2-4/+14
architecture to check against for an architecture-specific test from the properties instead of the name passed.
2010-10-18 * config/tc-mips.c (macro)[ldd_std]: Fix the relaxation variantMaciej W. Rozycki2-20/+6
for absolute addressing.
2010-10-18 opcodes/Maciej W. Rozycki5-25/+38
* mips-opc.c (mips_builtin_opcodes): Move M_LD_OB and M_SD_OB macros before their corresponding MIPS III hardware instructions. gas/ * config/tc-mips.c (macro)[M_LD_OB, M_SD_OB]: Handle 64-bit ABIs. gas/testsuite/ * gas/mips/lineno.s: Convert to o32. * gas/mips/lineno.d: Adjust patterns accordingly. Force the o32 ABI.
2010-10-18 * config/tc-mips.c (mips_pseudo_table): Add "sbss".Maciej W. Rozycki2-0/+19
(s_change_sec): Handle it.
2010-10-16Add CpuNop to CPU_GENERIC64_FLAGS.H.J. Lu4-1/+166
gas/testsuite/ 2010-10-16 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/i386.exp: Run x86-64-nops-1-g64. * gas/i386/x86-64-nops-1.d: Remove -mtune=generic64. * gas/i386/x86-64-nops-1-g64.d: New. opcodes/ 2010-10-16 H.J. Lu <hongjiu.lu@intel.com> * i386-gen.c (cpu_flag_init): Add CpuNop to CPU_GENERIC64_FLAGS. * i386-init.h: Regenerated.
2010-10-15gas: blackfin: add tests for recent loop label fixesMike Frysinger8-0/+376
Signed-off-by: David Gibson <david.gibson@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-15gas: blackfin: add illegal insn testsMike Frysinger6-0/+11199
Make sure all illegal insns get assembled & decoded correctly. Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-15gas: blackfin: fix encoding of BYTEOP2M insnMike Frysinger7-2/+103
The BYTEOP2M parser incorrectly calls BYTEOP2P to generate the opcode. Once we've fixed that, it's easy to see that the disassembler also likes to decode this insn incorrectly. So fix that and then add some tests. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-15gas: blackfin: generalize matching in the video testsMike Frysinger3-192/+197
The exact symbol addresses are not important to these tests. We only care about the opcodes and the disassembly output. This makes adding more insns to these tests easier. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-14Add CheckRegSize to instructions which require register size check.H.J. Lu6-3/+185
gas/ 2010-10-14 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (match_template): Check checkregsize instead of w for register size check. gas/testsuite/ 2010-10-14 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/i386.exp: Run inval-reg. * gas/i386/inval-reg.l: New. * gas/i386/inval-reg.s: Likewise. opcodes/ 2010-10-14 H.J. Lu <hongjiu.lu@intel.com> * i386-gen.c (opcode_modifiers): Add CheckRegSize. * i386-opc.h (CheckRegSize): New. (i386_opcode_modifier): Add checkregsize. * i386-opc.tbl: Add CheckRegSize to instructions which require register size check. * i386-tbl.h: Regenerated.
2010-10-14Add .d32 encoding suffix.H.J. Lu9-8/+100
gas/ 2010-10-14 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (_i386_insn): Add disp32_encoding. (md_assemble): Don't call optimize_disp if disp32_encoding is set. (parse_insn): Support .d32 to force 32bit displacement. (output_branch): Use BIG if disp32_encoding is set. * doc/c-i386.texi: Document .d32 encoding suffix. gas/testsuite/ 2010-10-14 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/disp32.d: New. * gas/i386/disp32.s: Likewise. * gas/i386/x86-64-disp32.d: Likewise. * gas/i386/x86-64-disp32.s: Likewise. * gas/i386/i386.exp: Run disp32 and x86-64-disp32.
2010-10-112010-10-11 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>Andreas Krebbel3-126/+132
* s390-opc.c: Make the instruction masks for the load/store on condition instructions to cover the condition code mask as well. * s390-opc.txt: lgoc -> locg and stgoc -> stocg. 2010-10-11 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> * gas/s390/zarch-z196.d: Adjust the load/store on condition instructions. * gas/s390/zarch-z196.s: Likewise.
2010-10-11fix dates in previous blackfin commitsMike Frysinger1-3/+3
2010-10-11gas: blackfin: reign in overeager insn flag handlingMike Frysinger2-7/+14
Currently, trying to declare single letter variables in Blackfin assembly can sometimes lead to parser errors if that letter is used for insn flags. For example, X, Z, S, M, and T are used to change the behavior of insns: R0 = 1; R0 = 1 (X); R0 = 1 (Z); But the current parser just looks for single letter tokens rather than ones that show up in the (FLAGS) field. So only match these letters as flags when they're in parentheses. Not a complete fix, but it at least lets gcc tests pass now (the test gcc/testsuite/gcc.c-torture/compile/mangle-1.c to be exact). A complete fix would require a significant parser rewrite in order to handle: R0 = (x) (x); /* zero extend the address of the symbol "x" */ R0 = W; R0 = W[P0]; Signed-off-by: Steve Kilbane <steve.kilbane@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-11gas: blackfin: support numeric local labels with LOOP_BEGIN/LOOP_END pseudo ↵Mike Frysinger4-0/+38
insns The current LOOP_BEGIN/LOOP_END pseudo insns hit parser errors when trying to use numeric local labels. So add support for them. Signed-off-by: David Gibson <david.gibson@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-11gas: blackfin: fix LOOP_BEGIN/LOOP_END pseudo insns handling of local labelsMike Frysinger2-2/+9
The current LOOP_BEGIN/LOOP_END pseudo insns hit "Internal errors" when using local labels as the loop names due to attempts at removing them. Signed-off-by: David Gibson <david.gibson@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-08Fix build with -DDEBUG=7Alan Modra2-0/+9
2010-10-07gas/Bernd Schmidt5-1/+30
* config/tc-tic6x.c (tic6x_try_encode): Correct encoding of fstg field in SPKERNEL instructions. opcodes/ * tic6x-dis.c (print_insn_tic6x): Correct decoding of fstg field in SPKERNEL instructions. gas/testsuite/ * gas/tic6x/insns-c674x-sploop.d: Add two more sploop/spkernel tests. * gas/tic6x/insns-c674x-sploop.s: Likewise.
2010-10-06 bfd/Nathan Sidwell2-8/+12
* elf32-arm.c (elf32_arm_stub_long_branch_any_arm_pic, elf32_arm_stub_long_branch_any_arm_pic): Use a consistent name for ip/r12. (arm_type_of_stub): Remove superfluous braces. gas/ * config/tc-arm.c (encode_branch): Remove superfluous braces. (do_t_branch): Move reloc setting to end of routine.
2010-10-042010-10-04 David Daney <ddaney@caviumnetworks.com>David Daney7-1/+139
* config/tc-mips.c (mips_fix_cn63xxp1): New variable. (mips_ip): Add errata work around when mips_fix_cn63xxp1 set. (OPTION_FIX_CN63XXP1, OPTION_NO_FIX_CN63XXP1): New enum options enumerations. (md_longopts): Add options for -mfix-cn63xxp1 and -mno-fix-cn63xxp1. (md_parse_option): Handle OPTION_FIX_CN63XXP1 and OPTION_NO_FIX_CN63XXP1. (md_show_usage): Add documentation for -mfix-cn63xxp1. * doc/c-mips.texi (-mfix-cn63xxp1, -mno-fix-cn63xxp1): Document the new options. 2010-10-04 David Daney <ddaney@caviumnetworks.com> * gas/mips/mips.exp (octeon-pref): Run the new test. * gas/mips/octeon-pref.s: New test. * gas/mips/octeon-pref.d: New expected results for the new test.
2010-09-29include/Bernd Schmidt5-6/+15
* opcode/tic6x-control-registers.h (tscl): Now read_write. gas/testsuite/ * gas/tic6x/insns-bad-1.s: Remove test for readonly tscl. * gas/tic6x/insns-bad-1.l: Likewise. * gas/tic6x/insns-c674x.d: Add test for writeable tscl. * gas/tic6x/insns-c674x.s: Likewise.
2010-09-29 * gas/all/fwdexp.d, * gas/all/fwdexp.s: New test.Alan Modra4-0/+41
* gas/all/gas.exp: Run it.
2010-09-29 * expr.c (expr): Correct returned segment value.Alan Modra2-10/+25
2010-09-29 * lib/gas-defs.exp (is_elf_format): Merge with binutils and ld versions.Alan Modra2-34/+82
(is_aout_format): Copy from ld testsuite. (is_pecoff_format): Merge with ld version.
2010-09-27Fix unportable shell quoting.Ralf Wildenhues2-1/+5
/: Sync from GCC: PR bootstrap/44621 * configure.ac: Fix unportable shell quoting. * configure: Regenerate. config/: * po.m4 (AM_PO_SUBDIRS): Fix unportable shell quoting. bfd/: * configure: Regenerate. gas/: * configure: Regenerate. gold/: * configure: Regenerate. intl/: * configure: Regenerate. ld/: * configure: Regenerate. opcodes/: * configure: Regenerate. binutils/: * configure: Regenerate. gprof/: * configure: Regenerate.
2010-09-27gas/Bernd Schmidt6-0/+62
* config/tc-tic6x.c (tic6x_fix_adjustable): New function. * config/tc-tic6x.h (tic6x_fix_adjustable): Declare. (tc_fix_adjustable): New macro. gas/testsuite/ * gas/tic6x/got-reloc.s: New test. * gas/tic6x/got-reloc.d: New test.
2010-09-272010-09-27 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>Andreas Krebbel9-3/+537
* s390-mkopc.c (enum s390_opcde_cpu_val): Add S390_OPCODE_Z196. (main): Recognize the new CPU string. * s390-opc.c: Add new instruction formats and masks. * s390-opc.txt: Add new z196 instructions. 2010-09-27 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> * opcode/s390.h: Add S390_OPCODE_Z196 to enum s390_opcode_cpu_val. 2010-09-27 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> * config/tc-s390.c: (md_parse_option): New option -march=z196. * doc/c-s390.texi: Document new option. 2010-09-27 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> * gas/s390/s390.exp: Run the zarch-z196 test. * gas/s390/zarch-z196.d: Add new instructions. * gas/s390/zarch-z196.s: Likewise. * gas/s390/zarch-z9-109.d: Likewise. * gas/s390/zarch-z9-109.s: Likewise.
2010-09-272010-09-27 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>Andreas Krebbel8-25/+35
* s390-dis.c (print_insn_s390): Pick instruction with most specific mask. * s390-opc.c: Add unused bits to the insn mask. * s390-opc.txt: Reorder some instructions to prefer more recent versions. 2010-09-27 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> * gas/s390/esa-g5.d: Adjust serveral instructions. * gas/s390/esa-reloc.d: Likewise. * gas/s390/esa-z990.d: Likewise. * gas/s390/zarch-reloc.d: Likewise. * gas/s390/zarch-z10.d: Likewise. * gas/s390/zarch-z9-ec.d: Likewise. * gas/s390/zarch-z900.d: Likewise. 2010-09-27 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> * ld-s390/tlsbin.dd: bcr 0,%r7 -> nopr %r7. * ld-s390/tlsbin_64.dd: Likewise. * ld-s390/tlspic.dd: Likewise. * ld-s390/tlspic_64.dd: Likewise.
2010-09-272010-09-27 Tejas Belagod <tejas.belagod@arm.com>Matthew Gretton-Dann10-0/+78
* gas/config/tc-arm.c (do_neon_ldr_str): Deprecate ARM-mode PC-relative VSTR, issue an error in THUMB mode. * opcodes/arm_dis.c (print_insn_coprocessor): Apply off-by-alignment correction to unaligned PCs while printing comment. * gas/testsuite/gas/arm/vldr.s: New test for pc-relative VLDR disassembly comment. * gas/testsuite/gas/arm/vldr.d: Likewise. * gas/testsuite/gas/arm/vstr-bad.s: New test for PC-relative VSTR. * gas/testsuite/gas/arm/vstr-thumb-bad.l: Likewise. * gas/testsuite/gas/arm/vstr-thumb-bad.d: Likewise. * gas/testsuite/gas/arm/vstr-arm-bad.l: Likewise. * gas/testsuite/gas/arm/vstr-arm-bad.d: Likewise.
2010-09-23 * bfd/bfd-in2.h (BFD_RELOC_ARM_HVC): New enum value.Matthew Gretton-Dann9-32/+508
* gas/config/tc-arm.c (arm_ext_virt): New variable. (arm_reg_type): Add REG_TYPE_RNB for banked registers. (reg_entry): Allow registers to be larger than a byte. (reg_alias): Fix type warning. (parse_operands): Parse banked registers when appropriate. (do_mrs): Add support for Virtualization Extensions. (do_hvc): New function. (do_t_mrs): Add support for Virtualization Extensions. (do_t_msr): Likewise. (do_t_hvc): New function. (SPLRBANK): New define. (reg_names): Add banked registers. (insns): Add support for Virtualization Extensions. (md_apply_fixup): Likewise. (arm_cpus): -mcpu=cortex-a15 implies the Virtualization Extensions. (arm_extensions): Add 'virt' extension. (aeabi_set_public_attributes): Add support for Virtualization Extensions. * gas/doc/c-arm.texi: Document 'virt' extension. * gas/testsuite/gas/arm/armv7-a+virt.d: New test. * gas/testsuite/gas/arm/armv7-a+virt.s: Likewise. * gas/testsuite/gas/arm/attr-march-all.d: Update for Virtualization Extensions. * gas/testsuite/gas/arm/attr-march-armv7-a+sec+virt.d: New test. * gas/testsuite/gas/arm/attr-march-armv7-a+virt.d: Likewise. * include/opcode/arm.h (ARM_EXT_VIRT): New define. (ARM_ARCH_V7A_IDIV_MP_SEC): Rename... (ARM_ARCH_V7A_IDIV_MP_SEC_VIRT): ...to this and include Virtualization Extensions. * opcodes/arm-dis.c (arm_opcodes): Add Virtualiztion Extensions support. (thumb32_opcodes): Likewise. (banked_regname): New function. (print_insn_arm): Add Virtualization Extensions support. (print_insn_thumb32): Likewise.
2010-09-23 * gas/config/tc-arm.c (arm_ext_adiv): New variable.Matthew Gretton-Dann8-10/+92
(do_div): New function. (insns): Accept UDIV and SDIV in ARM state. (arm_cpus): The cortex-a15 option has all current v7-A extensions. (arm_extensions): Add 'idiv' extension. (aeabi_set_public_attributes): Update Tag_DIV_use values for the Integer Divide extension. * gas/doc/c-arm.texi: Document the idiv extension. * gas/testsuite/gas/arm/armv7-a+idiv.d: New test. * gas/testsuite/gas/arm/armv7-a+idiv.s: Likewise. * gas/testsuite/gas/arm/attr-march-all.d: Update for Integer divide extension. * gas/testsuite/gas/arm/attr-march-armv7-a+idiv.d: New test. * include/opcode/arm.h (ARM_AEXT_ADIV): New define. (ARM_ARCH_V7A_IDIV_MP_SEC): Likewise. * opcodes/arm-dis.c (arm_opcodes): Support disassembly of UDIV and SDIV in ARM state.
2010-09-23 * config/tc-arm.c (arm_ext_v6m): New variable.Matthew Gretton-Dann10-3/+95
(arm_ext_m): Add support for OS extension. (arm_ext_os): New variable. (do_t_swi): In v6-M ensure we have the OS extension. (arm_cpus): The cortex-m1 and cortex-m0 options have the OS extension by default. (arm_archs): Add armv6s-m. (arm_extensions): Add 'os' extension. (cpu_arch_ver): Add support for v6S-M. * gas/doc/c-arm.texi: Document the OS Extension, and v6-m and v6s-m architecture options. * gas/testsuite/gas/arm/archv6s-m-bad.d: New test. * gas/testsuite/gas/arm/archv6s-m-bad.l: Likewise. * gas/testsuite/gas/arm/archv6s-m.d: Likewise. * gas/testsuite/gas/arm/archv6s-m.s: Likewise. * gas/testsuite/gas/arm/attr-march-armv6-m+os.d: Likewise. * gas/testsuite/gas/arm/attr-march-armv6s-m.d: Likewise. * include/opcode/arm.h (ARM_EXT_OS): New define. (ARM_AEXT_V6SM): Likewise. (ARM_ARCH_V6SM): Likewise.
2010-09-23 * gas/config/tc-arm.c (arm_ext_v6z): Remove.Matthew Gretton-Dann15-9/+92
(arm_ext_sec): New variable. (do_t_smc): In Thumb state SMC requires v7-A. (insns): Make SMC depend on Security Extensions. (arm_cpus): All -mcpu=cortex-a* options have the Security Extensions. (arm_extensions): Add 'sec' extension. (cpu_arch_ver): Reorder. (aeabi_set_public_attributes): Emit Tag_Virtualization_use as appropriate. * gas/doc/c-arm.texi: Document Security Extensions. * gas/testsuite/gas/arm/attr-march-all.d: Update for Security Extensions.. * gas/testsuite/gas/arm/attr-march-armv6k+sec.d: New test. * gas/testsuite/gas/arm/attr-march-armv6z.d: Update for Security Extensions. * gas/testsuite/gas/arm/attr-march-armv6zk.d: Likewise. * gas/testsuite/gas/arm/attr-march-armv6zkt2.d: Likewise. * gas/testsuite/gas/arm/attr-march-armv6zt2.d: Likewise. * gas/testsuite/gas/arm/attr-march-armv7-a+sec.d: New test. * gas/testsuite/gas/arm/attr-mcpu.d: Update for Security Extensions. * gas/testsuite/gas/arm/thumb32.d: Likewise. * gas/testsuite/gas/arm/thumb32.s: Likewise. * include/opcode/arm.h (ARM_EXT_V6Z): Remove. (ARM_EXT_SEC): New define. (ARM_AEXT_V6Z): Use Security Extensions. (ARM_AEXT_V6ZK): Likeiwse. (ARM_AEXT_V6ZT2): Likewise. (ARM_AEXT_V6ZKT2): Likewise. (ARM_AEXT_V7_ARM): Base v7 does not have Security Extensions. (ARM_ARCH_V7A_SEC): New define. (ARM_ARCH_V7A_MP): Rename... (ARM_ARCH_V7A_MP_SEC): ...to this and add Security Extensions. * ld/testsuite/ld-arm/attr-merge-6.attr: Update for Security Extensions. * ld/testsuite/ld-arm/attr-merge-7.attr: Likewise. * opcodes/arm-dis.c (arm_opcodes): SMC implies Security Extensions. (thumb32_opcodes): Likewise.
2010-09-23 * gas/config/tc-arm.c (arm_ext_mp): Add.Matthew Gretton-Dann12-5/+179
(do_pld): Update comment. (insns): Add support for pldw. (arm_cpus): Update cortex-a5, cortex-a9, and cortex-a15 to support MP extension. (arm_extensions): Add 'mp' extension. (aeabi_set_public_attributes): Emit correct build attribute when MP extension is enabled. * gas/doc/c-arm.texi: Update for MP extensions. * gas/testsuite/gas/arm/arch7a-mp.d: Add. * gas/testsuite/gas/arm/arch7ar-mp.s: Likewise. * gas/testsuite/gas/arm/arch7r-mp.d: Likewise. * gas/testsuite/gas/arm/armv2-mp-bad.d: Likewise. * gas/testsuite/gas/arm/armv2-mp-bad.l: Likewise. * gas/testsuite/gas/arm/attr-march-all.d: Update for MP extension. * gas/testsuite/gas/arm/attr-march-armv7-a+mp.d: Add. * gas/testsuite/gas/arm/attr-march-armv7-r+mp.d: Likewise. * include/opcode/arm.h (ARM_EXT_MP): Add. (ARM_ARCH_V7A_MP): Likewise. * opcodes/arm-dis.c (arm_opcodes): Add support for pldw. (thumb32_opcodes): Likewise.
2010-09-23 * gas/config/tc-arm.c (md_pseduo_table): Add .arch_extension directive.Matthew Gretton-Dann3-23/+199
(arm_option_extension_value_table): Add. (arm_extensions): Change type. (arm_option_cpu_table): Rename... (arm_option_fpu_table): ...to this. (arm_fpus): Change type. (arm_parse_extension): Enforce alphabetical order. Allow extensions to be removed. (arm_parse_arch): Allow extensions to be specified with -march. (s_arm_arch_extension): Add. (s_arm_fpu): Update for type changes. * gas/doc/c-arm.texi: Document changes to infrastructure.
2010-09-23 * gas/all/gas.exp: Update "forward" and "redef3" xfails.Alan Modra4-7/+15
* gas/m68k/all.exp: Don't xfail pcrel on uclinux. * gas/sh/arch/arch.exp: Don't pass dashes to send_log.
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