aboutsummaryrefslogtreecommitdiff
path: root/gas
AgeCommit message (Collapse)AuthorFilesLines
2013-12-07strip off +x bits on non-executable/script filesMike Frysinger28-0/+32
These files are source files and have no business being +x. We couldn't easily fix it in CVS (you need login+write access to the raw rcs files), but we can fix this w/git. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2013-12-03Fix crash on intelbad.Tristan Gingold2-6/+9
gas/ 2013-12-03 Tristan Gingold <gingold@adacore.com> * config/tc-i386-intel.c (i386_intel_simplify): Avoid arithmetic overflow on pointers.
2013-11-27binutils/testsuite/Richard Sandiford2-1/+7
2013-11-27 Matthew Fortune <matthew.fortune@imgtec.com> * binutils-all/objcopy.exp: Consider mips-mti-elf the same as mips-sde-elf * binutils-all/readelf.exp: Likewise gas/testsuite/ 2013-11-27 Matthew Fortune <matthew.fortune@imgtec.com> * gas/mips/mips.exp: Consider mips-mti-elf the same as mips-sde-elf ld/testsuite/ 2013-11-27 Matthew Fortune <matthew.fortune@imgtec.com> * ld-mips-elf/mips-elf.exp: Consider mips-mti-elf the same as mips-sde-elf
2013-11-20gas/testsuite/Yufeng Zhang3-1/+11
* gas/aarch64/msr.s: Add tests. * gas/aarch64/msr.d: Update. include/opcode * aarch64.h (aarch64_pstatefields): Change element type to aarch64_sys_reg. opcodes/ * aarch64-opc.c (aarch64_pstatefields): Update.
2013-11-20Revert "Do not issue error messages when parsing a PSTATE register".Yufeng Zhang2-4/+10
This reverts commit 03e621be975dacc9cec9f5782698bdb098f6a49c.
2013-11-19 * config/tc-aarch64.c (parse_sys_reg): Do not issue error messagesNick Clifton2-2/+10
for deprecated system registers when parsing pstate fields.
2013-11-192013-11-19 Catherine Moore <clm@codesourcery.com>Catherine Moore12-2/+230
gas/ * config/tc-mips.c (mips_fix_pmc_rm7000): Declare. (options): Add OPTION_FIX_PMC_RM7000 and OPTION_NO_FIX_PMC_RM7000. (md_longopts): Add mfix-pmc-rm7000 and mno-fix-pmc-rm7000. (INSN_DMULT): Define. (INSN_DMULTU): Define. (insns_between): Detect PMC RM7000 errata. (md_parse_option): Supprt OPTION_FIX_PMC_RM7000 and OPTION_NO_FIX_PMC_RM7000. * doc/as.texinfo: Document new options. * doc/c-mips.texi: Likewise. gas/testsuite/ * gas/mips/fix-pmc-rm7000-1.d: New. * gas/mips/fix-pmc-rm7000-1.s: New. * gas/mips/fix-pmc-rm7000-2.d: New. * gas/mips/fix-pmc-rm7000-2.s: New. * gas/mips/micromips@fix-pmc-rm7000-1.d: New. * gas/mips/micromips@fix-pmc-rm7000-2.d: New. * gas/mips/mips.exp: Run new tests.
2013-11-19 PR gas/16109Alexey Makhalov2-2/+15
* app.c (do_scrub_chars): Only insert a newline character if end-of-file has been reached.
2013-11-18Update x86 gas tests for mingwH.J. Lu8-9/+21
* gas/i386/avx512f-nondef.d: Updated for mingw. * gas/i386/mpx-add-bnd-prefix.d: Likewise. * gas/i386/x86-64-avx512f-nondef.d: Likewise. * gas/i386/x86-64-mpx-add-bnd-prefix.d: Likewise. * gas/i386/x86-64-mpx-addr32.d: Likewise. * gas/i386/x86-64-opcode.d: Likewise. * gas/i386/x86-64-sha.d: Likewise.
2013-11-18Add a dummy "int bnd_prefix" argumentH.J. Lu2-2/+8
* config/tc-i386.c (lex_got): Add a dummy "int bnd_prefix" argument.
2013-11-18Add support for armv7ve to gas.Yufeng Zhang5-9/+37
gas/ * config/tc-arm.c (arm_archs): New armv7ve architecture option. (arm_cpus): Replace ARM_ARCH_V7A_IDIV_MP_SEC_VIRT with ARM_ARCH_V7VE for cortex-a7, cortex-a12 and cortex-a15. (cpu_arch_ver): Likewise. * doc/c-arm.texi: Document armv7ve. gas/testsuite/ * gas/arm/attr-march-armv7ve.d: New test case for armv7ve. include/opcode/ * arm.h (ARM_AEXT_V7VE): New define. (ARM_ARCH_V7VE): New define. (ARM_ARCH_V7A_IDIV_MP_SEC_VIRT): Removed.
2013-11-18gas/Yufeng Zhang5-5/+20
* config/tc-aarch64.c (parse_sys_reg): Support S2_<op1>_<Cn>_<Cm>_<op2>. gas/testsuite/ * gas/testsuite/sysreg.s: Add test. * gas/testsuite/sysreg.d: Update.
2013-11-18Revert "Add support for AArch64 trace unit registers."Yufeng Zhang10-784/+34
This reverts commit 75468c93c14e9f14dd9020712538c5303a455876.
2013-11-17Add R_X86_64_PC32_BND and R_X86_64_PLT32_BNDH.J. Lu9-14/+172
bfd/ * elf64-x86-64.c (x86_64_elf_howto_table): Add R_X86_64_PC32_BND and R_X86_64_PLT32_BND. (R_X86_64_standard): Replace R_X86_64_RELATIVE64 with R_X86_64_PLT32_BND. (IS_X86_64_PCREL_TYPE): Add R_X86_64_PLT32_BND. (x86_64_reloc_map): Add BFD_RELOC_X86_64_PC32_BND and BFD_RELOC_X86_64_PLT32_BND. (elf_x86_64_check_relocs): Handle R_X86_64_PC32_BND and R_X86_64_PLT32_BND. (elf_x86_64_gc_sweep_hook): Likewise. (elf_x86_64_relocate_section): Likewise. * reloc.c (bfd_reloc_code_real): Add BFD_RELOC_X86_64_PC32_BND and BFD_RELOC_X86_64_PLT32_BND. * bfd-in2.h: Regenerated. * libbfd.h: Likewise. gas/ * config/tc-i386.c (reloc): Add an argument, bnd_prefix, to indicate if instruction has the BND prefix. Return BFD_RELOC_X86_64_PC32_BND instead of BFD_RELOC_32_PCREL if bnd_prefix isn't zero. (output_branch): Pass BFD_RELOC_X86_64_PC32_BND to frag_var if needed. (output_jump): Update reloc call. (output_interseg_jump): Likewise. (output_disp): Likewise. (output_imm): Likewise. (x86_cons_fix_new): Likewise. (lex_got): Add an argument, bnd_prefix, to indicate if instruction has the BND prefix. Use BFD_RELOC_X86_64_PLT32_BND if needed. (x86_cons): Update lex_got call. (i386_immediate): Likewise. (i386_displacement): Likewise. (md_apply_fix): Handle BFD_RELOC_X86_64_PC32_BND and BFD_RELOC_X86_64_PLT32_BND. (tc_gen_reloc): Likewise. * config/tc-i386-intel.c (i386_operator): Update lex_got call. gas/testsuite/ * gas/i386/i386.exp: Run x86-64-mpx-branch-1 and x86-64-mpx-branch-2 on 64-bit ELF targets. * gas/i386/x86-64-mpx-branch-1.d: New file. * gas/i386/x86-64-mpx-branch-1.s: Likewise. * gas/i386/x86-64-mpx-branch-2.d: Likewise. * gas/i386/x86-64-mpx-branch-2.s: Likewise. include/elf/ * x86-64.h: Add R_X86_64_PC32_BND and R_X86_64_PLT32_BND. ld/testsuite/ * ld-x86-64/mpx.exp: New file. * ld-x86-64/mpx1.out: Likewise. * ld-x86-64/mpx1a.c: Likewise. * ld-x86-64/mpx1a.rd: Likewise. * ld-x86-64/mpx1b.c: Likewise. * ld-x86-64/mpx1c.c: Likewise. * ld-x86-64/mpx1c.rd: Likewise.
2013-11-15gas/Yufeng Zhang10-8/+802
* config/tc-aarch64.c (set_other_error): New function. (parse_sys_reg): Add new parameter 'sys_reg' and if non-NULL set the variable to which it points with 'o'. (parse_operands): Update; check for write to read-only system registers or read from write-only ones. gas/testsuite/ * gas/aarch64/diagnostic.s: Add tests. * gas/aarch64/diagnostic.l: Update. * gas/aarch64/tracereg-illegal.d: New file. * gas/aarch64/tracereg-illegal.l: Ditto. * gas/aarch64/tracereg-illegal.s: Ditto. * gas/aarch64/tracereg.d: Ditto. * gas/aarch64/tracereg.s: Ditto. include/opcode * aarch64.h (aarch64_sys_reg_readonly_p): New declaration. (aarch64_sys_reg_writeonly_p): Ditto. opcodes/ * aarch64-opc.c (CPENT): New define. (F_READONLY, F_WRITEONLY): Likewise. (aarch64_sys_regs): Add trace unit registers. (aarch64_sys_reg_readonly_p): New function. (aarch64_sys_reg_writeonly_p): Ditto.
2013-11-15Reorder invalid default mask checkMichael Zolotukhin5-37/+57
gas/ 2013-11-15 Michael Zolotukhin <michael.v.zolotukhin@gmail.com> * config/tc-i386.c (check_VecOperands): Reorder checks. gas/testsuite/ 2013-11-15 Michael Zolotukhin <michael.v.zolotukhin@gmail.com> * gas/i386/inval-avx512f.s: Add invalid test for gather instruction with default mask. * gas/i386/inval-avx512f.l: Update correspondingly.
2013-11-11Fix ChangeLog entries from earlier commit.Catherine Moore1-0/+7
2013-11-112013-11-11 Catherine Moore <clm@codesourcery.com>Catherine Moore1-4/+4
gas/ * config/mips/tc-mips.c (convert_reg_type): Use INSN_LOAD_MEMORY instead of INSN_LOAD_MEMORY_DELAY. (reg_needs_delay): Likewise. (insns_between): Likewise. include/ * opcode/mips.h (INSN_LOAD_MEMORY_DELAY): Rename to... (INSN_LOAD_MEMORY): ...this. opcodes/ * mips-dis.c (print_insn_mips): Use INSN_LOAD_MEMORY instead of INSN_LOAD_MEMORY_DELAY. (print_insn_micromips): Likewise. * mips-opc.c (LDD): Remove. (CLD): Include INSN_LOAD_MEMORY. (LM): New. (mips_builtin_opcodes): Use LM instead of LDD. Add LM to load instructions.
2013-11-112013-11-08 Jan-Benedict Glaw <jbglaw@lug-owl.deJan-Benedict Glaw2-1/+5
* config/tc-ppc.c (ppc_elf_localentry): Add cast. [BR]: https://sourceware.org/ml/binutils/2013-11/msg00064.html
2013-11-05gas/Yufeng Zhang8-2/+43
* config/tc-aarch64.c (parse_sys_reg): Update to use aarch64_sys_reg; call aarch64_sys_reg_deprecated_p and warn about the deprecated system registers. gas/testsuite/ * gas/aarch64/deprecated.d: New file. * gas/aarch64/deprecated.l: New file. * gas/aarch64/deprecated.s: New file. * gas/aarch64/sysreg-1.s: Add tests. * gas/aarch64/sysreg-1.d: Add tests. include/opcode/ * aarch64.h (aarch64_sys_reg): New typedef. (aarch64_sys_regs): Change to define with the new type. (aarch64_sys_reg_deprecated_p): Declare. opcodes/ * aarch64-opc.c (F_DEPRECATED): New macro. (aarch64_sys_regs): Update; flag "spsr_svc" and "spsr_hyp" with F_DEPRECATED. (aarch64_print_operand): Call aarch64_sys_reg_deprecated_p on AARCH64_OPND_SYSREG.
2013-11-05gas/Yufeng Zhang10-2/+83
* config/tc-aarch64.c (parse_operands): Handle AARCH64_OPND_COND1. gas/testsuite/ * gas/aarch64/alias.s: Add tests. * gas/aarch64/alias.d: Update. * gas/aarch64/no-aliases.d: Update. * gas/aarch64/diagnostic.s: Add tests. * gas/aarch64/diagnostic.l: Update. * gas/aarch64/illegal.s: Add tests. * gas/aarch64/illegal.l: Update. include/opcode/ * aarch64.h (enum aarch64_operand_class): Add AARCH64_OPND_CLASS_COND. (enum aarch64_opnd): Add AARCH64_OPND_COND1. opcodes/ * aarch64-dis.c (convert_ubfm_to_lsl): Check for cond != '111x'. (convert_from_csel): Likewise. * aarch64-opc.c (operand_general_constraint_met_p): Handle AARCH64_OPND_CLASS_COND and AARCH64_OPND_COND1. (aarch64_print_operand): Handle AARCH64_OPND_COND1. * aarch64-tbl.h (aarch64_opcode_table): Use COND1 instead of COND for cinc, cset, cinv, csetm and cneg. (AARCH64_OPERANDS): Add entry for AARCH64_OPND_COND1. * aarch64-asm-2.c: Re-generated. * aarch64-dis-2.c: Ditto. * aarch64-opc-2.c: Ditto.
2013-11-05opcodes/Yufeng Zhang3-0/+17
* aarch64-opc.c (set_syntax_error): New function. (operand_general_constraint_met_p): Replace set_other_error with set_syntax_error. gas/testsuite/ * gas/aarch64/diagnostic.s: Add tests of ldp/stp. * gas/aarch64/diagnostic.l: Update.
2013-11-05config/tc-aarch64.c: Avoid trying to parse a vector mov as immediate.Will Newton5-1/+27
Parsing a vector mov instruction currently leads to a phantom undefined symbol being added to the symbol table. e.g.: .text mov x0, v0.D[0] Produces an undefined symbol called "v0.D". gas/ChangeLog: 2013-11-05 Will Newton <will.newton@linaro.org> PR gas/16103 * config/tc-aarch64.c (parse_operands): Avoid trying to parse a vector register as an immediate. gas/testsuite/ChangeLog: 2013-11-05 Will Newton <will.newton@linaro.org> * gas/aarch64/advsimd-mov-bad.d: New file. * gas/aarch64/advsimd-mov-bad.s: Likewise.
2013-11-04x86-64/gas: fix an asymmetry in suffix/register checkingJan Beulich6-5/+49
Without this, constructs like "orw %rax, (%rax)" aren't being rejected (other than any other wrong suffix/register combination). gas/ 2013-11-04 Jan Beulich <jbeulich@suse.com> * config/tc-i386.c (check_long_reg): Correct comment indentation. (check_qword_reg): Correct comment and its indentation. (check_word_reg): Extend comment and correct its indentation. Also check for 64-bit register. gas/testsuite/ 2013-11-04 Jan Beulich <jbeulich@suse.com> * gas/i386/x86-64-suffix-bad.[sl]: New. * gas/i386/i386.exp: Run new test.
2013-11-02Assorted x86 testsuite fixes.Alan Modra2-5/+4
I think HJ has already fixed the binutils and ld tests with his 2013-09-27 readelf change, but this allows them to pass with wider address output as per Nick's 2013-09-12 readelf change. binutils/testsuite/ * binutils-all/x86-64/compressed-1a.d: Allow wide display of addresses. gas/testsuite/ * gas/cfi/cfi-x86_64.d: Match when lacking end of section padding. ld/testsuite/ * ld-pe/cfi.d: Allow wide display of addresses.
2013-10-30Add ELFv2 .localentry support.Alan Modra2-0/+114
This defines the ELF symbol st_other field used to encode the number of instructions between a function "global entry" and its "local entry", and adds support related to the local entry offset. include/elf/ * ppc64.h (STO_PPC64_LOCAL_BIT, STO_PPC64_LOCAL_MASK): Define. (ppc64_decode_local_entry, ppc64_encode_local_entry): New functions. (PPC64_LOCAL_ENTRY_OFFSET, PPC64_SET_LOCAL_ENTRY_OFFSET): Define. bfd/ * elf64-ppc.c (struct ppc_stub_hash_entry): Add "other". (stub_hash_newfunc): Init new ppc_stub_hash_entry field, and one we forgot, "plt_ent". (ppc64_elf_add_symbol_hook): Check ELFv1 objects don't have st_other bits only valid in ELFv2. (ppc64_elf_merge_symbol_attribute): New function. (ppc_type_of_stub): Add local_off param to test branch range. (ppc_build_one_stub): Adjust destinations for ELFv2 locals. (ppc_size_one_stub, toc_adjusting_stub_needed): Similarly. (ppc64_elf_size_stubs): Pass local_off to ppc_type_of_stub. Set "other" field. (ppc64_elf_relocate_section): Adjust destination for ELFv2 local calls. gas/ * config/tc-ppc.c (md_pseudo_table): Add .localentry. (ppc_elf_localentry): New function. (ppc_force_relocation): Force relocs on all branches to localenty symbols. (ppc_fix_adjustable): Don't reduce such symbols to section+offset. binutils/ * readelf.c (get_ppc64_symbol_other): New function. (get_symbol_other): Use it for EM_PPC64.
2013-10-30Add .abiversion related support for ELFv2Alan Modra3-0/+50
Defines bits in ELF e_flags to differentiate ELFv2 objects from ELFv2, adds .abiversion directive to explicitly choose the ABI, and code to check and automatically select ABI. include/elf/ * ppc64.h (EF_PPC64_ABI): Define. bfd/ * elf64-ppc.c (abiversion, set_abiversion): New functions. (ppc64_elf_get_synthetic_symtab): Handle ELFv2 objects without .opd. (struct ppc_link_hash_table): Add opd_abi. (ppc64_elf_check_relocs): Check no .opd with ELFv2. (ppc64_elf_merge_private_bfd_data): New function. (ppc64_elf_print_private_bfd_data): New function. (ppc64_elf_tls_setup): Set htab->opd_abi. (ppc64_elf_size_dynamic_sections): Don't emit OPD related dynamic tags for ELFv2. (ppc_build_one_stub): Use R_PPC64_IRELATIVE for ELFv2 ifunc. (ppc64_elf_finish_dynamic_symbol): Likewise binutils/ * readelf.c (get_machine_flags): Display ABI version for EM_PPC64. gas/ * config/tc-ppc.c: Include elf/ppc64.h. (ppc_abiversion): New variable. (md_pseudo_table): Add .abiversion. (ppc_elf_abiversion, ppc_elf_end): New functions. * config/tc-ppc.h (md_end): Define.
2013-10-30Report overflow on PowerPC64 @h and @ha relocations.Alan Modra2-36/+114
This changes the behaviour of @h and @ha on PowerPC64 to report errors on 32-bit overflow. The motivation for this change is that on PowerPC64, most uses of @h and @ha modifiers and their corresponding relocations are to build up 32-bit offsets. We'd like to know when such offsets overflow. Only rarely do people use @h or @ha with the high 32-bit modifiers to build a 64-bit constant. Those uses will now need to use two new modifiers, @high and @higha, if the constant isn't known at assembly time. For now, we won't report overflow at assembly time.. This also fixes an error when applying some of the HIGHER and HIGHEST relocations. include/elf/ * ppc64.h (R_PPC64_ADDR16_HIGH, R_PPC64_ADDR16_HIGHA, R_PPC64_TPREL16_HIGH, R_PPC64_TPREL16_HIGHA, R_PPC64_DTPREL16_HIGH, R_PPC64_DTPREL16_HIGHA): New. (IS_PPC64_TLS_RELOC): Match new tls relocs. bfd/ * reloc.c (BFD_RELOC_PPC64_ADDR16_HIGH, BFD_RELOC_PPC64_ADDR16_HIGHA, BFD_RELOC_PPC64_TPREL16_HIGH, BFD_RELOC_PPC64_TPREL16_HIGHA, BFD_RELOC_PPC64_DTPREL16_HIGH, BFD_RELOC_PPC64_DTPREL16_HIGHA): New. * elf64-ppc.c (ppc64_elf_howto_raw): Add entries for new relocs. Make all _HA and _HI relocs report signed overflow. (ppc64_elf_reloc_type_lookup): Handle new relocs. (must_be_dyn_reloc, ppc64_elf_check_relocs): Likewise. (dec_dynrel_count, ppc64_elf_relocate_section): Likewise. (ppc64_elf_relocate_section): Don't apply 0x8000 adjust to R_PPC64_TPREL16_HIGHER, R_PPC64_TPREL16_HIGHEST, R_PPC64_DTPREL16_HIGHER, and R_PPC64_DTPREL16_HIGHEST. * libbfd.h: Regenerate. * bfd-in2.h: Regenerate. gas/ * config/tc-ppc.c (SEX16): Don't mask. (REPORT_OVERFLOW_HI): Define as zero. (ppc_elf_suffix): Support @high, @higha, @dtprel@high, @dtprel@higha, @tprel@high, and @tprel@higha modifiers. (md_assemble): Ignore X_unsigned when applying 16-bit insn fields. Add (disabled) code to check @h and @ha reloc overflow for powerpc64. Handle new relocs. (md_apply_fix): Similarly. elfcpp/ * powerpc.h (R_PPC64_ADDR16_HIGH, R_PPC64_ADDR16_HIGHA, R_PPC64_TPREL16_HIGH, R_PPC64_TPREL16_HIGHA, R_PPC64_DTPREL16_HIGH, R_PPC64_DTPREL16_HIGHA): Define. gold/ * powerpc.cc (Target_powerpc::Scan::check_non_pic): Handle new relocs. (Target_powerpc::Scan::global, local): Likewise. (Target_powerpc::Relocate::relocate): Likewise. Check for overflow on all ppc64 @h and @ha relocs.
2013-10-29ld/ELF: refine fake STT_FILE symbol emissionJan Beulich3-48/+52
There's no real need to emit these always: They're needed only if we indeed want to emit a localized symbol. Hence defer emission until we at least did the basic early checks that would lead to no such symbol getting emitted. This in particular avoids emitting such a symbol in the majority of (if not all) "ld -r" cases. I hope my set of cross build tests caught all the test cases needing adjustment - please forgive if I missed a few. bfd/ 2013-10-29 Jan Beulich <jbeulich@suse.com> * elflink.c (struct elf_outext_info): Add field file_sym_done. (bfd_elf_final_link): Initialize new field. Move fake STT_FILE symbol emission from here ... (elf_link_output_extsym): ... to here. gas/testsuite/ 2013-10-29 Jan Beulich <jbeulich@suse.com> * gas/microblaze/relax_size.elf: Drop expectation of no longer present STT_FILE symbol. * gas/microblaze/relax_size2.elf: Likewise. ld/testsuite/ 2013-10-29 Jan Beulich <jbeulich@suse.com> * ld-cris/tls-e-tpoffcomm1.d: Drop expectation of no longer present STT_FILE symbol. * ld-mmix/bpo-18.d: Likewise. * ld-mmix/bpo-22.d: Likewise. * ld-mmix/greg-6.d: Likewise. * ld-mmix/greg-7.d: Likewise. * ld-mmix/loc4.d: Likewise. * ld-mmix/local1.d: Likewise. * ld-mmix/local3.d: Likewise. * ld-mmix/local5.d: Likewise. * ld-mmix/local7.d: Likewise. * ld-mmix/loct-1.d: Likewise. * ld-sh/sh64/abi32.xd: Likewise. * ld-sh/sh64/abi64.xd: Likewise. * ld-sh/sh64/cmpct1.xd: Likewise. * ld-sh/sh64/crange1.rd: Likewise. * ld-sh/sh64/crange2.rd: Likewise. * ld-sh/sh64/crange3-cmpct.rd: Likewise. * ld-sh/sh64/crange3-media.rd: Likewise. * ld-sh/sh64/crange3.rd: Likewise. * ld-sh/sh64/crangerel1.rd: Likewise. * ld-sh/sh64/crangerel2.rd: Likewise. * ld-sh/sh64/mix1.xd: Likewise. * ld-sh/sh64/mix2.xd: Likewise. * ld-sh/sh64/shdl32.xd: Likewise. * ld-sh/sh64/shdl64.xd: Likewise.
2013-10-25Change mode of gas/configure back to 0755Yao Qi1-0/+0
2013-10-25Fix changelog.Yao Qi1-0/+0
gdb/ Add changelog entry for my previous commit.
2013-10-182013-10-18 Chao-ying Fu <Chao-ying.Fu@imgtec.com>Chao-ying Fu5-0/+750
* gas/mips/micromips@msa-branch.d, gas/mips/msa-branch.d, gas/mips/msa-branch.s: New. * gas/mips/mips.exp: Run new tests.
2013-10-182013-10-18 Chao-ying Fu <Chao-ying.Fu@imgtec.com>Chao-ying Fu2-2/+16
* config/tc-mips.c (fpr_read_mask): Test MSA registers. (fpr_write_mask): Test MSA registers. (can_swap_branch_p): Check fpr write followed by fpr read.
2013-10-18 * config/tc-tic6x.c (tic6x_parse_operand): Revert previous delta.Nick Clifton2-1/+5
2013-10-15Fix neon vshll disassembly.Ramana Radhakrishnan2-6/+10
opcodes/ 2013-10-15 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com> * arm-dis.c (neon_opcodes): Adjust print string for vshll. gas/testsuite/ 2013-10-15 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com> * gas/arm/neon-cov.d: Adjust output.
2013-10-15revert previous delta.Nick Clifton1-1/+1
2013-10-142013-10-14 Chao-ying Fu <Chao-ying.Fu@imgtec.com>Chao-ying Fu12-0/+2657
* gas/mips/micromips@msa-relax.d, gas/mips/micromips@msa.d, gas/mips/micromips@msa64.d, gas/mips/msa-relax.d, gas/mips/msa-relax.l, gas/mips/msa-relax.s, gas/mips/msa.d, gas/mips/msa.s, gas/mips/msa64.d, gas/mips/msa64.s: New. * gas/mips/mips.exp: Run new tests.
2013-10-142013-10-14 Richard Sandiford <rdsandiford@googlemail.com>Chao-ying Fu4-43/+181
Chao-ying Fu <Chao-ying.Fu@imgtec.com> * config/tc-mips.c (options): Add OPTION_MSA and OPTION_NO_MSA. (md_longopts): Add mmsa and mno-msa. (mips_ases): Add msa. (RTYPE_MASK): Update. (RTYPE_MSA): New define. (OT_REG_ELEMENT): Replace with... (OT_INTEGER_INDEX, OT_REG_INDEX): ...these new operand types. (mips_operand_token): Replace reg_element with index. (mips_parse_argument_token): Treat vector indices as separate tokens. Handle register indices. (md_begin): Add MSA register names. (operand_reg_mask): Handle cases for OP_IMM_INDEX and OP_REG_INDEX. (convert_reg_type): Handle cases for OP_REG_MSA and OP_REG_MSA_CTRL. (match_mdmx_imm_reg_operand): Update accordingly. (match_imm_index_operand): New function. (match_reg_index_operand): New function. (match_operand): Handle cases for OP_IMM_INDEX and OP_REG_INDEX. (md_convert_frag): Convert bz.b/h/w/d, bnz.b/h/w/d, bz.v bnz.v. (md_show_usage): Print -mmsa and -mno-msa. * doc/as.texinfo: Document -mmsa and -mno-msa. * doc/c-mips.texi: Document -mmsa and -mno-msa. Document .set msa and .set nomsa.
2013-10-14 * gen-aout.c (main): Fix formatting. Close file.Nick Clifton6-8/+17
* emultempl/aix.em (_read_file): Close file at end of function. * gas/all/itbl-test.c (main): Close fas. * read.c (add_include_dir): Use xrealloc. * config/tc-score.c (do_macro_bcmp): Initialise inst_main. * config/tc-tic6x.c (tic6x_parse_operand): Initialise second_reg. * readelf.c (decode_arm_unwind): Initialise addr structure. (process_symbol_table): Free lengths. * srcconv.c (wr_sc): Free info. * chew.c (perform): Free next.
2013-10-142013-10-13 Sandra Loosemore <sandra@codesourcery.com>Sandra Loosemore6-20/+34
opcodes/ * nios2-opc.c (nios2_builtin_reg): Use "sstatus" rather than "ba" as the primary name of r30. gas/ * config/tc-nios2.c (nios2_consume_arg): Make the "ba" warning also test/refer to "sstatus". Reformat the warning message. gas/testsuite/ * gas/nios2/warn_nobreak.l: Update text of warning messages. * gas/nios2/registers.s: Use "sstatus" rather than "ba" as the primary name of r30. * gas/nios2/registers.d: Likewise.
2013-10-12Only allow 32-bit/64-bit registers for bndcl/bndcu/bndcnH.J. Lu5-54/+38
gas/testsuite/ * gas/i386/mpx.s: Remove bndcl/bndcu/bndcn tests with AX. * gas/i386/x86-64-mpx.s: Likwise. * gas/i386/mpx.d: Updated. * gas/i386/x86-64-mpx.d: Likewise. opcodes/ * i386-dis.c (intel_operand_size): Move v_bnd_mode alongside the default case. (OP_E_register): Move v_bnd_mode alongside m_mode. * i386-opc.tbl (bndcl, bndcu, bndcn): Split 32- and 64-bit variants. Drop Reg16 and Disp16. Add NoRex64. (bndmk, bndmov, bndldx, bndstx): Drop Disp16. * i386-tbl.h: Re-generate.
2013-10-11 * Removed short_hand field from opcode table andSean Keys2-61/+98
refactored assembler/disassember accordingly. Testsuite checkout OK.
2013-10-11 * gas/xgate/all_insns.d: Add com macro insn test.Sean Keys3-35/+42
* gas/xgate/all_insns.s: Add com macro insn test.
2013-10-10gas/Jan Beulich2-0/+7
2013-10-10 Jan Beulich <jbeulich@suse.com> * tc-i386-intel.c (i386_intel_simplify_register): Suppress base/index swapping for bndmk, bndldx, and bndstx.
2013-10-09 PR gas/16025Nick Clifton2-1/+6
* config/tc-epiphany.c (md_convert_frag): Add missing break statement.
2013-10-09 PR gas/16026Nick Clifton2-2/+8
* config/tc-mn10200.c (md_convert_frag): Add missing break statement.
2013-10-08gas/Jan Beulich2-14/+13
2013-10-08 Jan Beulich <jbeulich@suse.com> * tc-i386.c (check_word_reg): Remove misplaced "else". (check_long_reg): Restore symmetry with check_word_reg.
2013-10-08gas/Jan Beulich5-5/+23
2013-10-08 Jan Beulich <jbeulich@suse.com> * gas/config/tc-arm.c (do_t_push_pop): Honor inst.size_req. Simplify LR/PC check. gas/testsuite/ 2013-10-08 Jan Beulich <jbeulich@suse.com> * gas/arm/thumb-w-good.s: Add PUSH.W and POP.W tests. * gas/arm/thumb-w-good.d: Update accordingly.
2013-10-08 * config/tc-msp430.c (msp430_operands): Accept "<foo>.a" as an aliasNick Clifton9-46/+175
for "<foo>a". Issue error messages for unrecognised or corrrupt size extensions. * gas/msp430/bad.s: New test: Checks erroneous size extensions. * gas/msp430/bad.d: New test command file. * gas/msp430/bad.l: New file: Expected error messages. * gas/msp430/msp430.exp: Run the new test. * gas/msp430/msp430x.s: Add "<foo>.a" aliases of "<foo>a" instructions. * gas/msp430/msp430x.d: Update expected disassembly.
2013-10-072013-10-07 Chao-ying Fu <Chao-ying.Fu@imgtec.com>Chao-ying Fu2-4/+8
* gas/mips/micromips@virt64.d: Fix dmfgc0 and dmtgc0.
generated by cgit v1.1 at 2024-12-02 21:52:45 +0000