Age | Commit message (Collapse) | Author | Files | Lines |
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avr25: ata5272, attiny828
avr35: ata5505, attiny1634
avr4: atmega8a, ata6285, ata6286, atmega48pa
avr5: at90pwm161, ata5790, ata5795, atmega164pa, atmega165pa,
atmega168pa, atmega32a, atmega64rfr2, atmega644rfr2, atmega64a,
atmega16hva2
avr51: atmega128a, atmega1284
avrxmega2: atxmega16a4u, atxmega16c4, atxmega32a4u, atxmega32c4,
atxmega32e5, atxmega16e5, atxmega8e5
avrxmega4: atxmega64a3u, atxmega64a4u, atxmega64b1, atxmega64b3,
atxmega64c3, atxmega64d4
avrxmega6: atxmega128a3u, atxmega128b3, atxmega128c3,
atxmega128d4, atxmega192a3u, atxmega192c3, atxmega256a3u,
atxmega256c3, atxmega384c3, atxmega384d3
avrxmega7: atxmega128a4u
* doc/c-avr.texi: Ditto.
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This adds support for "func@localentry", an expression that returns the
ELFv2 local entry point address of function "func". I've excluded
dynamic relocation support because that obviously would require glibc
changes.
include/elf/
* ppc64.h (R_PPC64_REL24_NOTOC, R_PPC64_ADDR64_LOCAL): Define.
bfd/
* elf64-ppc.c (ppc64_elf_howto_raw): Add R_PPC64_ADDR64_LOCAL entry.
(ppc64_elf_reloc_type_lookup): Support R_PPC64_ADDR64_LOCAL.
(ppc64_elf_check_relocs): Likewise.
(ppc64_elf_relocate_section): Likewise.
* Add BFD_RELOC_PPC64_ADDR64_LOCAL.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
gas/
* config/tc-ppc.c (ppc_elf_suffix): Support @localentry.
(md_apply_fix): Support R_PPC64_ADDR64_LOCAL.
ld/testsuite/
* ld-powerpc/elfv2-2a.s, ld-powerpc/elfv2-2b.s: New files.
* ld-powerpc/elfv2-2exe.d, ld-powerpc/elfv2-2so.d: New files.
* ld-powerpc/powerpc.exp: Run new test.
elfcpp/
* powerpc.h (R_PPC64_REL24_NOTOC, R_PPC64_ADDR64_LOCAL): Define.
gold/
* powerpc.cc (Target_powerpc::Scan::local, global): Support
R_PPC64_ADDR64_LOCAL.
(Target_powerpc::Relocate::relocate): Likewise.
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This patch allows gas to assemble a testcase like
li 3,ext_sym
which oddly was not accepted while the following is OK:
li 3,ext_sym@l
* config/tc-ppc.c (md_assemble): Move code adjusting reloc types
later. Merge absolute and relative branch reloc selection.
Generate 16-bit relocs for most 16-bit insn fields given a
non-constant expression.
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The XCOFF assembler does some wierd things with instructions like
`lwz 9,sym(30'. See the comment in md_apply_fix. From an ELF
perspective, it's weird even to magically select a TOC16 reloc
when a symbol is in the TOC/GOT. ELF assemblers generally use
modifiers like @toc to select relocs, so remove this "feature"
for ELF. I believe this was to support gcc -m32 -mcall-aixdesc
but that combination of gcc options has been broken for a long
time.
* config/tc-ppc.c (ppc_is_toc_sym): Remove OBJ_ELF support.
(md_assemble): Don't call ppc_is_toc_sym for ELF.
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2014-02-04 Heiher <r@hev.cc>
* elfxx-mips.c (mips_set_isa_flags): Use E_MIPS_ARCH_64R2 for
Loongson-3A.
(mips_mach_extensions): Make bfd_mach_mips_loongson_3a an
extension of bfd_mach_mipsisa64r2.
opcodes/
2014-02-04 Heiher <r@hev.cc>
* mips-dis.c (mips_arch_choices): Usee ISA_MIPS64R2 for Loongson-3A.
gas/
2014-02-04 Heiher <r@hev.cc>
* config/tc-mips.c (mips_cpu_info_table): Use ISA_MIPS64R2 for
Loongson-3A.
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generate warning messages about an instruction that changes the interrupt
state not being followed by a NOP instruction.
* config/msp430/msp430.c: Replace known mcu array with known
msp430 ISA mcu name array.
Accept any name for -mmcu option.
Add -mz option to warn about missing NOP following an interrupt
status change.
(check_for_nop): New.
(msp430_operands): Emit a warning, if requested, when an interrupt
changing instruction is not followed by a NOP.
* doc/c-msp430.c: Document -mz option.
* gas/msp430/bad.d: Add -mz option.
* gas/msp430/bad.s: Add more cases where warnings should be
generated.
* gas/msp430/bad.l: Add expected warning messages.
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* config/obj-fdpicelf.c: Correct copyright date.
* config/obj-fdpicelf.h: Likewise.
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binutils/
* README: Add "Copyright Notices" paragraph.
gas/
* config/bfin-lex-wrapper.c: Correct copyright date.
* config/tc-frv.c: Correct copyright punctuation.
* config/tc-ip2k.c: Likewise.
* config/tc-iq2000.c: Likewise.
* config/tc-mep.c: Likewise.
* config/tc-tic4x.c: Likewise.
* config/tc-tic4x.h: Likewise.
ld/testsuite/
* ld-scripts/phdrs2.exp: Correct copyright punctuation.
* ld-v850/v850.exp: Correct copyright typo.
opcodes/
* i386-gen.c (process_copyright): Emit copyright notice on one line.
gold/
* dwp.cc (print_version): Update copyright year to current.
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Don't be clever, calculate the length directly as the difference of
two symbols.
* dwarf2dbg.c (out_debug_line): Correct .debug_line header_length
field for 64-bit dwarf.
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* aarch64-tbl.h (aarch64_opcode_table): Replace IMM0 with
FPIMM0 for fcmeq, fcmgt, fcmge, fcmlt and fcmle.
gas/testsuite/
* gas/aarch64/fp-const0-parsing.s: New test.
* gas/aarch64/fp-const0-parsing.d: Likewise.
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* aarch64-opc.c (print_register_offset_address): Call
get_int_reg_name to prepare the register name.
gas/testsuite/
* gas/aarch64/ldst-reg-reg-offset.s: Add tests.
* gas/aarch64/ldst-reg-reg-offset.d: Update.
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Latest AVX512 spec
http://download-software.intel.com/sites/default/files/managed/50/1a/319433-018.pdf
Has CPUID PREFETCHWT1 for prefetchwt1 instruction, which we list as AVX512PF.
This patch introduces CPUID PREFETCHWT1.
gas/
* config/tc-i386.c (cpu_arch): Add .prefetchwt1.
* doc/c-i386.texi: Document .prefetchwt1/prefetchwt1.
opcodes/
* i386-gen.c (cpu_flag_init): Add CPU_PREFETCHWT1_FLAGS/
(cpu_flags): Add CpuPREFETCHWT1.
* i386-init.h: Regenerate.
* i386-opc.h (CpuPREFETCHWT1): New.
(i386_cpu_flags): Add cpuprefetchwt1.
* i386-opc.tbl: Cahnge CPU of prefetchwt1 from CpuAVX512PF to CpuPREFETCHWT1.
* i386-tbl.h: Regenerate.
gas/testsuite
* gas/i386/avx512pf-intel.d: Remove prefetchwt1.
* gas/i386/avx512pf.s: Ditto.
* gas/i386/avx512pf.d: Ditto.
* gas/i386/x86-64-avx512pf-intel.d: Ditto.
* gas/i386/x86-64-avx512pf.s: Ditto.
* gas/i386/x86-64-avx512pf.d: Ditto.
* gas/i386/prefetchwt1-intel.d: New file.
* gas/i386/prefetchwt1.s: Ditto.
* gas/i386/prefetchwt1.d: Ditto.
* gas/i386/x86-64-prefetchwt1-intel.d: Ditto.
* gas/i386/x86-64-prefetchwt1.s: Ditto.
* gas/i386/x86-64-prefetchwt1.d: Ditto.
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In latest release of AVX512 spec
http://download-software.intel.com/sites/default/files/managed/50/1a/319433-018.pdf
Vptestnmq and vptestnmq instructions have CPUID AVX512F, not AVX512CD.
This patch fixes it.
opcodes/
* i386-opc.tbl: Change CPU of vptestnmq, vptestnmd from CpuAVX512CD,
to CpuAVX512F.
* i386-tbl.h: Regenerate.
gas/testsuite/
* gas/i386/avx512cd-intel.d: Remove vptestnmq, vptestnmd.
* gas/i386/avx512cd.s: Ditto.
* gas/i386/avx512cd.d: Ditto.
* gas/i386/x86-64-avx512cd-intel.d: Ditto.
* gas/i386/x86-64-avx512cd.s: Ditto.
* gas/i386/x86-64-avx512cd.d: Ditto.
* gas/i386/avx512f-intel.d: Add vptestnmq, vptestnmd.
* gas/i386/avx512f.s: Ditto.
* gas/i386/avx512f.d: Ditto.
* gas/i386/x86-64-avx512f-intel.d: Ditto.
* gas/i386/x86-64-avx512f.s: Ditto.
* gas/i386/x86-64-avx512f.d: Ditto.
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gas/
2014-02-12 Ilya Tocar <ilya.tocar@intel.com>
* config/tc-i386.c (cpu_arch): Add .clflushopt, .xsavec, .xsaves.
* doc/c-i386.texi: Document .xsavec/xsavec/.xsaves/xsaves/
clflushopt/.clfushopt.
gas/testsuite/
2014-02-12 Ilya Tocar <ilya.tocar@intel.com>
* gas/i386/clflushopt-intel.d: New.
* gas/i386/clflushopt.d: Ditto.
* gas/i386/clflushopt.s: Ditto.
* gas/i386/i386.exp: Run new tests.
* gas/i386/x86-64-clflushopt-intel.d: New.
* gas/i386/x86-64-clflushopt.d: Ditto.
* gas/i386/x86-64-clflushopt.s: Ditto.
* gas/i386/x86-64-xsavec-intel.d: Ditto.
* gas/i386/x86-64-xsavec.d: Ditto.
* gas/i386/x86-64-xsavec.s: Ditto.
* gas/i386/x86-64-xsaves-intel.d: Ditto.
* gas/i386/x86-64-xsaves.d: Ditto.
* gas/i386/x86-64-xsaves.s: Ditto.
* gas/i386/xsavec-intel.d: Ditto.
* gas/i386/xsavec.d: Ditto.
* gas/i386/xsavec.s: Ditto.
* gas/i386/xsaves-intel.d: Ditto.
* gas/i386/xsaves.d: Ditto.
* gas/i386/xsaves.s: Ditto.
opcodes/
2014-02-12 Ilya Tocar <ilya.tocar@intel.com>
* i386-dis.c (MOD enum): Add MOD_0FC7_REG_3, MOD_0FC7_REG_4,
MOD_0FC7_REG_5.
(PREFIX enum): Add PREFIX_0FAE_REG_7.
(reg_table): Add MOD_0FC7_REG_3, MOD_0FC7_REG_4 MOD_0FC7_REG_5.
(prefix_table): Add clflusopt.
(mod_table): Add xrstors, xsavec, xsaves.
* i386-gen.c (cpu_flag_init): Add CPU_CLFLUSHOPT_FLAGS,
CPU_XSAVES_FLAGS, CPU_XSAVEC_FLAGS.
(cpu_flags): Add CpuClflushOpt, CpuXSAVES, CpuXSAVEC.
* i386-init.h: Regenerate.
* i386-opc.tbl: Add clflushopt, xrstors, xrstors64, xsaves,
xsaves64, xsavec, xsavec64.
* i386-tbl.h: Regenerate.
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Adds nds32 files to POTFILES.in
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2014-02-03 Sandra Loosemore <sandra@codesourcery.com>
include/elf/
* nios2.h (R_NIOS2_GOT_LO, R_NIOS2_GOT_HA): New.
(R_NIOS2_CALL_LO, R_NIOS2_CALL_HA): New.
(R_NIOS2_ILLEGAL): Adjust.
gas/
* config/tc-nios2.c (md_apply_fix): Test for new relocs.
(nios2_special_reloc): Add %call_lo, %call_hiadj, %got_lo,
%got_hiadj relocation operators. Sort table and add comment
to explain ordering.
(nios2_fix_adjustable): Test for new relocs.
* doc/c-nios2.texi (Nios II Relocations): Document new relocation
operators.
bfd/
* reloc.c (BFD_RELOC_NIOS2_GOT_LO, BFD_RELOC_NIOS2_GOT_HA): New.
(BFD_RELOC_NIOS2_CALL_LO, BFD_RELOC_NIOS2_CALL_HA): New.
* libbfd.h: Regenerated.
* bfd-in2.h: Regenerated.
* elf32-nios2.c (elf_nios2_howto_table_rel): Add new relocations.
(nios2_reloc_map): Likewise.
(GOT_USED, CALL_USED): Renamed from GOT16_USED and CALL16_USED.
Fixed all references.
(nios2_elf32_relocate_section): Add new relocations.
(nios2_elf32_check_relocs): Likewise.
(nios2_elf32_gc_sweep_hook): Likewise.
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2014-01-31 Michael Zolotukhin <michael.v.zolotukhin@gmail.com>
PR gas/16488
* gas/i386/inval-avx512f.s: Add test for incorrect memory operand
for gather/scatter instructions.
* gas/i386/x86-64-inval-avx512f.s: Likewise.
* gas/i386/inval-avx512f.l: Adjust correspondingly.
* gas/i386/x86-64-inval-avx512f.l: Likewise.
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2014-01-30 Sandra Loosemore <sandra@codesourcery.com>
bfd/
* bfd-in2.h: Update from reloc.c.
* elf32-nios2.c: Include elf32-nios2.h.
(elf_nios2_howto_table_rel): Add entry for R_NIOS2_CALL26_NOAT.
(nios2_reloc_map): Likewise.
(enum elf32_nios2_stub_type): Declare.
(struct elf32_nios2_stub_hash_entry): Declare.
(nios2_stub_hash_entry, nios2_stub_hash_lookup): New macros.
(struct elf32_nios2_link_hash_entry): Add hsh_cache field.
(struct elf32_nios2_link_hash_table): Add new fields bstab,
stub_bfd, add_stub_section, layout_sections_again, stub_group,
bfd_count, top_index, input_list, all_local_syms.
(nios2_call26_stub_entry): New.
(nios2_elf32_install_imm16): Move up in file.
(nios2_elf32_install_data): Move up in file.
(hiadj): Move up in file.
(stub_hash_newfunc): New.
(link_hash_newfunc): Initialize hsh_cache field.
(STUB_SUFFIX): New.
(nios2_stub_name): New.
(nios2_get_stub_entry): New.
(nios2_add_stub): New.
(nios2_elf32_setup_section_lists): New.
(nios2_elf32_next_input_section): New.
(CALL26_SEGMENT): New.
(MAX_STUB_SECTION_SIZE): New.
(group_sections): New.
(nios2_type_of_stub): New.
(nios2_build_one_stub): New.
(nios2_size_one_stub): New.
(get_local_syms): New.
(nios2_elf32_size_stubs): New.
(nios2_elf32_build_stubs): New.
(nios2_elf32_do_call26_relocate): Correct CALL26 overflow test.
(nios2_elf32_relocate_section): Handle R_NIOS2_CALL26_NOAT. Add
trampolines for R_NIOS2_CALL26 stubs.
(nios2_elf32_check_relocs): Handle R_NIOS2_CALL26_NOAT.
(nios2_elf32_gc_sweep_hook): Likewise.
(nios2_elf32_link_hash_table_create): Initialize the stub hash table.
(nios2_elf32_link_hash_table_free): New.
(bfd_elf32_bfd_link_hash_table_free): Define.
* elf32-nios2.h: New file.
* libbfd.h: Update from reloc.c.
* reloc.c (BFD_RELOC_NIOS2_CALL26_NOAT): New.
gas/
* config/tc-nios2.c (md_apply_fix): Handle BFD_RELOC_NIOS2_CALL26_NOAT.
(nios2_assemble_args_m): Likewise.
(md_assemble): Likewise.
gas/testsuite/
* gas/nios2/call26_noat.d: New.
* gas/nios2/call26_noat.s: New.
* gas/nios2/call_noat.d: New.
* gas/nios2/call_noat.s: New.
include/elf/
* nios2.h (elf_nios2_reloc_type): Add R_NIOS2_CALL26_NOAT.
ld/
* Makefile.am (enios2elf.c, enios2linux.c): Update dependencies.
* Makefile.in: Regenerated.
* emulparams/nios2elf.sh (EXTRA_EM_FILE): Set.
* emulparams/nios2linux.sh (EXTRA_EM_FILE): Set.
* emultempl/nios2elf.em: New file.
* gen-doc.texi (NIOSII): Set.
* ld.texinfo (NIOSII): Set.
ld/testsuite/
* ld-nios2/relax_call26.s: New.
* ld-nios2/relax_call26_boundary.ld: New.
* ld-nios2/relax_call26_boundary.s: New.
* ld-nios2/relax_call26_boundary_c8.d: New.
* ld-nios2/relax_call26_boundary_cc.d: New.
* ld-nios2/relax_call26_boundary_d0.d: New.
* ld-nios2/relax_call26_boundary_d4.d: New.
* ld-nios2/relax_call26_boundary_d8.d: New.
* ld-nios2/relax_call26_boundary_dc.d: New.
* ld-nios2/relax_call26_boundary_f0.d: New.
* ld-nios2/relax_call26_boundary_f4.d: New.
* ld-nios2/relax_call26_boundary_f8.d: New.
* ld-nios2/relax_call26_boundary_fc.d: New.
* ld-nios2/relax_call26_cache.d: New.
* ld-nios2/relax_call26_cache.ld: New.
* ld-nios2/relax_call26_cache.s: New.
* ld-nios2/relax_call26_multi.d: New.
* ld-nios2/relax_call26_multi.ld: New.
* ld-nios2/relax_call26_norelax.d: New.
* ld-nios2/relax_call26_shared.d: New.
* ld-nios2/relax_call26_shared.ld: New.
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opcodes/
2014-01-30 Michael Zolotukhin <michael.v.zolotukhin@gmail.com>
Jan Beulich <jbeulich@suse.com>
PR binutils/16490
* i386-dis.c (OP_E_memory): Fix shift computation for
vex_vsib_q_w_dq_mode.
gas/testsuite/
2014-01-30 Michael Zolotukhin <michael.v.zolotukhin@gmail.com>
Jan Beulich <jbeulich@suse.com>
PR binutils/16490
* gas/i386/avx512f.d: Fix test output.
* gas/i386/avx512f-intel.d: Likewise.
* gas/i386/x86-64-avx512f.d: Likewise.
* gas/i386/x86-64-avx512f-intel.d: Likewise.
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SHF_INFO_LINK bit set, which shows up in readelf section dumps. This
has broken a couple of IA64 testcases in the gas testsuite, which are
fixed by this patch.
PR binutils/16317
* gas/ia64/group-2.d: Expect I attribute with RELA sections.
* gas/ia64/xdata.d: Likewise.
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For each object, if it has a nonempty .data or .bss section,
emit a symbol that could cause the startup code to selectively
link in the code to initialize those sections.
* config/tc-msp430.c (msp430_section): Always flag data sections,
regardless of -md.
(msp430_frob_section): New. Make sure all sections are noticed if
they have content.
(msp430_lcomm): New. Flag bss if .lcomm is seen.
(msp430_comm): New. Likewise.
(md_pseudo_table): Add them.
* config/tc-msp430.h (msp430_frob_section): Declare.
(tc_frob_section): Define.
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New MSP430 MCU parts are being created by TI all the time and the
list is basically always out of date. Instead any name will be
accepted by the -mmcu= command line option. ISA selection is now
based upon the -mcpu= command line option, just as is done for GCC.
gas/ChangeLog
* config/tc-msp430.c (show_mcu_list): Delete.
(md_parse_option): Accept any MCU name. Accept several more
variants for the -mcpu option.
(md_show_usage): Do not call show_mcu_list.
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* config/tc-msp430.c (msp430_refsym): New: ".refsym <symbol>"
* doc/c-msp430.texi (MSP430 Directives): Document it.
The purpose of this patch is to provide a way for one object file
to require the inclusion of another object, without having to
allocate space for a .word address reference.
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Since regzmm can't be used in AVX2 gather instructions, there is no need
to check regzmm in AVX2 gather assert.
2014-01-22 Michael Zolotukhin <michael.v.zolotukhin@gmail.com>
* config/tc-i386.c (check_VecOperands): Remove regzmm from AVX2
gather assert.
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AVX512 gather instructions shouldn't accept the same register for both
destination and index.
gas/
2014-01-22 Michael Zolotukhin <michael.v.zolotukhin@gmail.com>
PR gas/16489
* config/tc-i386.c (check_VecOperands): Add check for invalid
register set in AVX512 gathers.
gas/testsuite/
2014-01-22 Michael Zolotukhin <michael.v.zolotukhin@gmail.com>
PR gas/16489
* gas/i386/vgather-check.s: Add tests for AVX512 gathers.
* gas/i386/x86-64-vgather-check.s: Likewise.
* gas/i386/vgather-check-error.l: Update correspondingly.
* gas/i386/vgather-check-none.d: Likewise.
* gas/i386/vgather-check-warn.d: Likewise.
* gas/i386/vgather-check-warn.e: Likewise.
* gas/i386/vgather-check.d: Likewise.
* gas/i386/x86-64-vgather-check-error.l: Likewise.
* gas/i386/x86-64-vgather-check-none.d: Likewise.
* gas/i386/x86-64-vgather-check-warn.d: Likewise.
* gas/i386/x86-64-vgather-check-warn.e: Likewise.
* gas/i386/x86-64-vgather-check.d: Likewise.
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* config/tc-tic4x.c (md_shortopts): s/CONST/const/.
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This is to avoid expressions like: %hi(foo) + 1, which will
not do what you expect. The complex relocations can handle it,
but the internal fixups can't.
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The direct rounding floating-point VCVT instructions introduced in
ARMv8 encode the s32.f64 variant incorrectly. The op bit should be
set to 1 for all signed conversions.
gas/ChangeLog:
2014-01-17 Will Newton <will.newton@linaro.org>
* config/tc-arm.c (do_vfp_nsyn_cvt_fpv8): Set OP to 1
for the s32.f64 flavours of VCVT.
gas/testsuite/ChangeLog:
2014-01-17 Will Newton <will.newton@linaro.org>
* gas/arm/armv8-a+fp.d: Correct encoding of vcvta.s32.f64.
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* config/tc-z80.c (wrong_match): Provide format string to
as_warn.
(parse_exp_not_indexed): Delete unused variable dummy.
(emit_byte): Delete unused variable fixp.
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* config/tc-i386.c (regbnd): Removed.
(vec_disp8): Likewise.
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binutils/
* version.c (print_version): Update copyright year to 2014.
gas/
* as.c (parse_args): Update copyright year to 2014.
gold/
* version.cc (print_version): Update copyright year to 2014.
ld/
* ldver.c (ldversion): Update copyright year to 2014.
opcodes/
* i386-gen.c (process_copyright): Update copyright year to 2014.
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This removes the last uses of the obsolete VA_* macros from binutils.
All the binutils and bfd changes were tested by rebuilding.
I didn't rebuild the gas change but I think it is obviously correct.
2014-01-07 Tom Tromey <tromey@redhat.com>
* elf32-xtensa.c (vsprint_msg): Don't use old VA_* compatibility
wrappers.
2014-01-07 Tom Tromey <tromey@redhat.com>
* bucomm.c (fatal, non_fatal): Replace obsolete VA_* macros with
stdarg macros.
* dlltool.c (inform): Replace obsolete VA_* macros with stdarg
macros.
* dllwrap.c (inform, warn): Replace obsolete VA_* macros with
stdarg macros.
2014-01-07 Tom Tromey <tromey@redhat.com>
* config/tc-tic30.c (debug): Avoid old VA_* compatibility
wrappers.
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This removes the last uses of PARAMS from binutils.
The two changes in binutils were tested by rebuilding.
I didn't rebuild the gas change but I think it is obviously correct.
2014-01-07 Tom Tromey <tromey@redhat.com>
* coffgrok.h (coff_ofile): Don't use PARAMS.
* nlmheader.y (strerror): Don't use PARAMS.
2014-01-07 Tom Tromey <tromey@redhat.com>
* config/tc-microblaze.h (parse_cons_expression_microblaze): Don't
use PARAMS.
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This removes the last use of ANSI_PROTOTYPES in the tree.
It appears in gas.
I didn't even rebuild this but I think it is obviously correct.
2014-01-07 Tom Tromey <tromey@redhat.com>
* config/tc-xc16x.h: Don't use ANSI_PROTOTYPES.
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* config/tc-aarch64.c (aarch64_cpus): Add entry for "xgene-1"
This adds support for the AppliedMicro X-Gene 1 processor to the
assembler.
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* gas/mmix/bspec-1.d: Adjust for SHF_INFO_LINK now set on RELA
sections.
* gas/mmix/bspec-2.d: Ditto.
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* dwarf.c (read_and_display_attr_value): Only print a tab
character if it preceeds further text.
* binutils-all/dw2-1.W: Update expected objdump output.
* binutils-all/i386/compressed-1a.d: Likewise.
* binutils-all/objdump.W: Likewise.
* binutils-all/x86-64/compressed-1a.d: Likewise.
* gas/elf/dwarf2-1.d: Update expected objdump output.
* gas/elf/dwarf2-2.d: Likewise.
* gas/i386/dw2-compress-1.d: Likewise.
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* doc/c-arm.texi (ARM Directives): Remove duplicate .pad entry.
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mingw targets pad text sections which won't work with x86-64-disassem.
* gas/i386/i386.exp: Don't run x86-64-disassem for mingw targets.
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* config/tc-aarch64.c (md_assemble): Defer the feature checking until
do_encode () succeeds.
gas/testsuite/
* gas/aarch64/rm-simd-ext.d: New file.
* gas/aarch64/rm-simd-ext.l: Likewise.
* gas/aarch64/rm-simd-ext.s: Likewise.
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order to avoid conflict with same named variable in MinGW system
header file.
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Add two more as test files for user special and system register.
Fix typo.
2013-12-17 Kuan-Lin Chen <kuanlinchentw@gmail.com>
* gas/nds32/nds32.exp: Add system and user special register tests.
* gas/nds32/sys-reg.s: New test.
* gas/nds32/sys-reg.d: Likewise.
* gas/nds32/usr-spe-reg.s: Likewise.
* gas/nds32/usr-spe-reg.d: Likewise.
* gas/nds32/alu-2.d: Delete the new blank line at EOF.
* gas/nds32/br-1.d: Likewise.
* gas/nds32/br-2.d: Likewise.
* gas/nds32/ji-jr.d: Likewise.
* gas/nds32/lsi.d: Likewise.
* nds32-dis.c (sr_map): Add system register table for disassembling.
(usr_map): Fix typo.
* nds32-asm.c (keyword_sr): Add embedded debug registers.
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gas/testsuite/
2013-12-17 Michael Zolotukhin <michael.v.zolotukhin@gmail.com>
* gas/i386/disassem.s: New.
* gas/i386/disassem.d: Likewise.
* gas/i386/x86-64-disassem.s: Likewise.
* gas/i386/x86-64-disassem.d: Likewise.
* gas/i386/i386.exp: Run disassem and x86-64-disassem.
opcodes/
2013-12-17 Michael Zolotukhin <michael.v.zolotukhin@gmail.com>
* i386-dis.c (MOD_FF_REG_3): New.
(MOD_FF_REG_5): Likewise.
(mod_table): Add MOD_FF_REG_3 and MOD_FF_REG_5.
(reg_table): Use MOD_FF_REG_3 and MOD_FF_REG_5.
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2013-12-16 Andrew Bennett <andrew.bennett@imgtec.com>
gas/testsuite/gas/mips/
* mips.exp: Add CP1 register name tests.
* cp1-names-mips32.d: New test.
* cp1-names-mips32r2.d: New test.
* cp1-names-mips64.d: New test.
* cp1-names-mips64r2.d: New test.
* cp1-names-numeric.d: New test.
* cp1-names-r3000.d: New test.
* cp1-names-r4000.d: New test.
* cp1-names-sb1.d: New test.
* cp1-names.s: New test.
* micromips-insn32.d: Add the correct symbolic names for the CP1
registers.
* micromips-noinsn32.d: Likewise.
* micromips-trap.d: Likewise.
* micromips.d: Likewise.
opcodes/
* mips-dis.c: Add mips_cp1_names pointer.
(mips_cp1_names_numeric): New array.
(mips_cp1_names_mips3264): New array.
(mips_arch_choice): Add cp1_names.
(mips_arch_choices): Add relevant cp1 register name array to each of
the elements.
(set_default_mips_dis_options): Add support for setting up the
mips_cp1_names pointer.
(parse_mips_dis_option): Add support for the cp1-names command line
variable. Also setup the mips_cp1_names pointer.
(print_reg): Print out name of the cp1 register.
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The element index range for the following MIPS MSA instructions: sldi, splati,
copy_s, copy_u, insert and insve is 1 bit too large. This patch fixes this issue.
ChangeLog:
gas/testsuite/gas/mips/
* msa.s: Reduced maximum element index range for sldi, splati,
copy_s, copy_u, insert and insve instructions.
* msa64.s: Likewise.
* micromips@msa.d: Likewise.
* micromips@msa64.d: Likewise.
* msa.d: Likewise.
* msa64.d: Likewise.
include/opcode/
* mips.h: Updated description of +o, +u, +v and +w for MIPS and
microMIPS.
opcodes/
* micromips-opc.c (decode_micromips_operand): Reduced range of +o, +u,
+v and +w.
(micromips_opcodes): Reduced element index range for sldi, splati,
copy_s, copy_u, insert and insve instructions.
* opcodes/mips-opc.c (decode_mips_operand): Reduced range of +o, +u,
+v and +w.
(mips_builtin_opcodes): Reduced element index range for sldi, splati,
copy_s, copy_u, insert and insve instructions.
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(OPTION_INTR_NOPS): Define.
(gen_interrupt_nops): Default to FALSE.
(md_parse_opton): Add support for OPTION_INTR_NOPS.
(md_longopts): Add -mn.
(md_show_usage): Add -mn.
(msp430_operands): Generate NOPs for all MCUs not just 430Xv2.
* doc/c-msp430.c: Document -mn.
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