Age | Commit message (Collapse) | Author | Files | Lines |
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gas/
* config/tc-arm.c (do_t_mov_cmp): Handle shift by register and
narrow shift by immediate.
gas/testsuite/
* gas/arm/thumb32.s: Add tests for shift instructions.
* gas/arm/thumb32.d: Ditto.
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2007-06-14 H.J. Lu <hongjiu.lu@intel.com>
* Makefile.am (ACLOCAL_AMFLAGS): Add -I . -I ../config.
* acinclude.m4: Don't include m4 files. Remove libtool
kludge.
* Makefile.in: Regenerated.
* doc/Makefile.in: Likewise.
* aclocal.m4: Likewise.
* configure: Likewise.
binutils/
2007-06-14 H.J. Lu <hongjiu.lu@intel.com>
* Makefile.am (ACLOCAL_AMFLAGS): Add -I ../config -I ../bfd.
* acinclude.m4: Removed.
* Makefile.in: Regenerated.
* aclocal.m4: Likewise.
* configure: Likewise.
gas/
2007-06-14 H.J. Lu <hongjiu.lu@intel.com>
* Makefile.am (ACLOCAL_AMFLAGS): Add -I ../config -I ../bfd.
* acinclude.m4: Don't include m4 files.
(BFD_BINARY_FOPEN): Removed.
Remove libtool kludge.
* Makefile.in: Regenerated.
* doc/Makefile.in: Likewise.
* aclocal.m4: Likewise.
* configure: Likewise.
gprof/
2007-06-14 H.J. Lu <hongjiu.lu@intel.com>
* Makefile.am (ACLOCAL_AMFLAGS): Add -I ../config -I ../bfd.
* acinclude.m4: Removed.
* Makefile.in: Regenerated.
* aclocal.m4: Likewise.
* configure: Likewise.
ld/
2007-06-14 H.J. Lu <hongjiu.lu@intel.com>
* Makefile.am (ACLOCAL_AMFLAGS): Add -I ../config -I ../bfd.
* acinclude.m4: Removed.
* Makefile.in: Regenerated.
* aclocal.m4: Likewise.
* configure: Likewise.
opcodes/
2007-06-14 H.J. Lu <hongjiu.lu@intel.com>
* Makefile.am (ACLOCAL_AMFLAGS): Add -I ../config -I ../bfd.
* acinclude.m4: Removed.
* Makefile.in: Regenerated.
* doc/Makefile.in: Likewise.
* aclocal.m4: Likewise.
* configure: Likewise.
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* elf32-xtensa.c (extend_ebb_bounds_forward): Use renamed
XTENSA_PROP_NO_TRANSFORM flag instead of XTENSA_PROP_INSN_NO_TRANSFORM.
(extend_ebb_bounds_backward, compute_text_actions): Likewise.
(compute_ebb_proposed_actions, coalesce_shared_literal): Likewise.
(xtensa_get_property_predef_flags): Likewise.
(compute_removed_literals): Pass new arguments to is_removable_literal.
(is_removable_literal): Add sec, prop_table and ptblsize arguments.
Do not remove literal if the NO_TRANSFORM property flag is set.
gas/
* config/tc-xtensa.c (XTENSA_PROP_INSN_NO_TRANSFORM): Renamed to...
(XTENSA_PROP_NO_TRANSFORM): ...this.
(frag_flags_struct): Move is_no_transform out of the insn sub-struct.
(xtensa_mark_frags_for_org): New.
(xtensa_handle_align): Set RELAX_ORG frag subtype for rs_org.
(xtensa_post_relax_hook): Call xtensa_mark_frags_for_org.
(get_frag_property_flags): Adjust reference to is_no_transform flag.
(xtensa_frag_flags_combinable): Likewise.
(frag_flags_to_number): Likewise. Use XTENSA_PROP_NO_TRANSFORM.
* config/tc-xtensa.h (xtensa_relax_statesE): Add RELAX_ORG.
include/elf/
* xtensa.h (XTENSA_PROP_INSN_NO_TRANSFORM): Renamed to...
(XTENSA_PROP_NO_TRANSFORM): ...this.
ld/
* emultempl/xtensaelf.em (replace_insn_sec_with_prop_sec): Use renamed
XTENSA_PROP_NO_TRANSFORM flag instead of XTENSA_PROP_INSN_NO_TRANSFORM.
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gas/
* config/tc-arm.c (s_align): Pad code sections appropriately.
gas/testsuite/
* gas/arm/thumb.d: Update expected output.
* gas/arm/thumb2_relax.d: Ditto.
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gas/
* config/tc-arm.c (insns): Correct Thumb-2 ldrd/strd opcodes.
gas/testsuite/
* gas/arm/thumb32.d: Add writeback addressing mode tests.
* gas/arm/thumb32.s: Update expected output.
opcodes/
* arm-dis.c (thumb32_opcodes): Display writeback ldrd/strd addresses.
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number@ppu.
(tc_gen_reloc): Abort if neither addsy or subsy is set.
(md_apply_fix): Don't attempt to resolve SPU_PPU relocs.
* config/tc-spu.h (md_operand): Handle @ppu without sym.
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gas/
* config/tc-arm.c (insns): Allow strex on M profile cores.
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2007-05-29 David S. Miller <davem@davemloft.net>
Jakub Jelinek <jakub@redhat.com>
PR gas/4558
* config/tc-sparc.c (md_apply_fix): Fix relocation overflow checks
for BFD_RELOC_SPARC_WDISP16 and BFD_RELOC_SPARC_WDISP19.
gas/testsuite/
2007-05-29 Jakub Jelinek <jakub@redhat.com>
PR gas/4558
* gas/sparc/sparc.exp: Add v9branch{1,2,3,4,5} tests.
* gas/sparc/v9branch1.d: New test.
* gas/sparc/v9branch1.s: New.
* gas/sparc/v9branch2.d: New test.
* gas/sparc/v9branch2.s: New.
* gas/sparc/v9branch3.d: New test.
* gas/sparc/v9branch3.s: New.
* gas/sparc/v9branch4.d: New test.
* gas/sparc/v9branch4.s: New.
* gas/sparc/v9branch5.d: New test.
* gas/sparc/v9branch5.s: New.
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* config/tc-ppc.c: Likewise.
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(string_byte_count, section_alignment): Delete.
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top 32 bits of 64 bit value if so doing results in passing
range check. Rewrite sign extension fudges similarly. Enable
fudges for powerpc64 too. Report user value if range check
fails rather than fudged value. Negate PPC_OPERAND_NEGATIVE
range rather than value, also to report user value on failure.
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gas/
* config/tc-arm.c (T2_SUBS_PC_LR): Define.
(do_t_add_sub): Correctly encode subs pc, lr, #const.
(do_t_mov_cmp): Correctly encode movs pc, lr.
gas/testsulte/
* gas/arm/thumb32.s: Add tests for subs pc, lr.
* gas/arm/thumb32.d: Change error-output: to stderr:.
Update expected output.
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* libtool.m4: Update from GCC.
* ltsugar.m4: New. Update from GCC.
* ltversion.m4: New. Update from GCC.
* ltoptions.m4: New. Update from GCC.
* ltconfig: Remove.
* ltcf-c.sh: Remove.
* ltcf-cxx.sh: Remove.
* ltcf-gcj.sh: Remove.
* src-release: Update with new libtool file list.
* newlib/*/configure.in: invoke _LD_DECL_SED.
* newlib/*/Makefile.am: Ensure toplevel is included in ACLOCAL_AMFLAGS.
* Regenerate subdirectories
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and index entries about automatic alignment of ENTRY instructions.
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bunutils/
* objdump.c (find_symbol_for_address): Merge section and target
specific filtering code.
ld/testsuite/
* ld-arm-mixed-lib.d: Update expected output.
* ld-arm/arm-app.d: Ditto.
* ld-arm/mixed-app.d: Ditto.
* ld-arm/arm-lib-plt32.d: Ditto.
* ld-arm/arm-app-abs32.d: Ditto.
* ld-arm/mixed-app-v5.d: Ditto.
* ld-arm/armthumb-lib.d: Ditto.
* ld-arm/arm-lib.d: Ditto.
gas/testsuite/
* gas/arm/backslash-at.d: Update expected output.
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containing a comma.
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PR gas/4517
2003-06-05 Michal Ludvig <mludvig@suse.cz>
* as.texinfo: Document new directives: .cfi_restore,
.cfi_undefined, .cfi_same_value, .cfi_return_column,
.cfi_remember_state and .cfi_restore_state.
2007-05-17 H.J. Lu <hongjiu.lu@intel.com>
2003-06-05 Michal Ludvig <mludvig@suse.cz>
* testsuite/gas/cfi/cfi-x86_64.s: Test new directives
and different writings of registers and numbers.
* testsuite/gas/cfi/cfi-x86_64.d: Updated pattern to
match the above change.
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fixups in error message.
(md_conver_frag_1): Propagate the fix source location and use
as_bad_where rather than fatal, for better error messages.
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* config/tc-arm.c (v7m_psrs): Add uppercase PSR names and xpsr.
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* app.c (do_scrub_chars): Don't damage \@ pseudo-variables.
gas/testsuite/
* gas/arm/backslash-at.d: New.
* gas/arm/backslash-at.s: New.
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* config/tc-m68k.c (relaxable_symbol): Make sure that the correct addend is stored for relocs against weak symbols.
(md_apply_fix): So not loose track of addend for relocs against weak symbols.
* testsuite/gas/m68k/p3041.s: New test case.
* testsuite/gas/m68k/p3041.d: New expected disassembly.
* testsuite/gas/m68k/all.exp: Run new test for m68k-*-netbsd toolchains.
Only run arch-cpu-1 test for ELF based toolchains.
Tidy ups for m68k-netbsd gas toolchain:
* testsuite/gas/m68k/cpu32.d: Allow for extra text after expected disassembly.
* testsuite/gas/m68k/mcf-trap.d: Allow for alternative trap mnemonics.
* testsuite/gas/m68k/br-isab.d: Fix name of test.
* testsuite/gas/m68k/br-isac.d: Fix name of test.
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2007-05-14 H.J. Lu <hongjiu.lu@intel.com>
PR binutils/4502
* gas/i386/amd.d: Replace "pfmulhrw" with "pmulhrw".
opcodes/
2007-05-14 H.J. Lu <hongjiu.lu@intel.com>
PR binutils/4502
* i386-dis.c (Suffix3DNow): Replace "pfmulhrw" with "pmulhrw".
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* config/tc-score.c (data_op2, validate_immediate): Fix bug for addri, addri.c, subi, and
subi.c when immediate number is hex.
(score_insns): Remove subis and subis.c.
(do_sub_rdi16): Delete.
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* spu.h (R_SPU_PPU32, R_SPU_PPU64): Define.
bfd/
* reloc.c (BFD_RELOC_SPU_PPU32, BFD_RELOC_SPU_PPU64): Define.
* elf-bfd.h (struct elf_backend_data): Change return type of
elf_backend_relocate_section to int.
* elf32-spu.c (elf_howto_table): Add howtos for R_SPU_PPU32 and
R_SPU_PPU64.
(spu_elf_bfd_to_reloc_type): Convert new relocs.
(spu_elf_count_relocs): New function.
(elf_backend_count_relocs): Define.
(spu_elf_relocate_section): Arrange to emit R_SPU_PPU32 and
R_SPU_PPU64 relocs.
* elflink.c (elf_link_input_bfd): Emit relocs if relocate_section
returns 2.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
gas/
* config/tc-spu.c (md_pseudo_table): Add int, long, quad. Call
spu_cons for word.
(md_assemble): Tidy use of insn.flag.
(get_imm): Likewise. Handle uppercase input too.
(spu_cons): New function.
* config/tc-spu.h (tc_fix_adjustable): Don't adjust SPU_PPU relocs.
(TC_FORCE_RELOCATION): Don't resolve them either.
binutils/
* embedspu.sh (find_prog): Prefer prog in same dir as embedspu
over one found on the users path.
(main): Generate .reloc for each R_SPU_PPU* reloc.
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* config/tc-arm.c (md_apply_fix): Generate more accurate
diagnostic when 8-bit immediate range is exceeded for
BFD_RELOC_ARM_OFFSET_IMM8.
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PR gas/4460
* gas/i386/gotpc.s: Add a new test.
* gas/i386/reloc64.s: Likewise.
* gas/i386/gotpc.d: Updated.
* gas/i386/reloc64.d: Likewise.
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* config/tc-i386.c (lex_got): Don't replace the reloc token with
a space if we already have a space.
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2007-05-03 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (match_template): Don't explicitly check
suffix for crc32 in Intel mode.
(process_suffix): Issue an error for crc32 if the operand size
is ambiguous.
gas/testsuite/
2007-05-03 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/crc32-intel.d: Updated.
* gas/i386/crc32.d: Likewise.
* gas/i386/sse4_2.d: Likewise.
* gas/i386/x86-64-crc32-intel.d: Likewise.
* gas/i386/x86-64-crc32.d: Likewise.
* gas/i386/x86-64-sse4_2.d: Likewise.
* gas/i386/crc32.s: Remove crc32 instructions with ambiguous
operand size and suffix in crc32 instructions in Intel mode.
* gas/i386/x86-64-crc32.s: Likewise.
* gas/i386/sse4_2.s: Remove crc32 instructions with ambiguous
operand size.
* gas/i386/x86-64-sse4_2.s: Likewise.
* gas/i386/i386.exp: Run inval-crc32 and x86-64-inval-crc32.
* gas/i386/inval-crc32.l: New.
* gas/i386/inval-crc32.s: Likewise.
* gas/i386/x86-64-inval-crc32.l: Likewise.
* gas/i386/x86-64-inval-crc32.s: Likewise.
opcodes/
2007-05-03 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (CRC32_Fixup): Don't print suffix in Intel mode.
* i386-opc.c (i386_optab): Remove IgnoreSize and correct operand
type for crc32.
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* gas/config/tc-m68k.c (relaxable_symbol): Do not relax weak symbols.
(tc_gen_reloc): Adjust the addend of relocs against weak symbols.
(md_apply_fix): Put zero values into the frags referencing weak symbols.
* bfd/aoutx.h (swap_std_reloc_out): Treat relocs against weak symbols in the same way as relocs against external symbols.
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PR 4448
* config/tc-ppc.c (ppc_insert_operand): Don't increase min for
PPC_OPERAND_PLUS1.
include/opcode/
* ppc.h (PPC_OPERAND_PLUS1): Update comment.
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2007-05-01 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (match_template): Check suffix for crc32 in
Intel mdoe.
(process_suffix): Default the suffix of 8bit crc32 to
BYTE_MNEM_SUFFIX.
(check_byte_reg): Skip check for 8bit crc32.
gas/testsuite/
2007-05-01 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/crc32-intel.d: New file.
* gas/i386/crc32.d:Likewise.
* gas/i386/crc32.s:Likewise.
* gas/i386/x86-64-crc32-intel.d:Likewise.
* gas/i386/x86-64-crc32.d:Likewise.
* gas/i386/x86-64-crc32.s:Likewise.
* gas/i386/i386.exp: Run crc32, crc32-intel, x86-64-crc32
and x86-64-crc32-intel.
opcodes/
2007-05-01 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (CRC32_Fixup): Properly handle Intel mode and
check data size prefix in 16bit mode.
* i386-opc.c (i386_optab): Default crc32 to non-8bit and
support Intel mode.
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* config/tc-i386.c (md_assemble): Use register_prefix in
error/warning message.
(check_byte_reg): Likewise.
(check_long_reg): Likewise.
(check_qword_reg): Likewise.
(check_word_reg): Likewise.
(process_operands): Likewise.
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PR 4436
* ppc-opc.c (powerpc_operands): Correct bitm for second entry of MBE.
gas/
PR 4436
* config/tc-ppc.c (ppc_insert_operand): Disable range check if
min > max.
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2007-04-26 H.J. Lu <hongjiu.lu@intel.com>
PR binutils/4430
* gas/i386/amd.d: Updated.
* gas/i386/immed32.d: Likewise.
* gas/i386/intel.d: Likewise.
* gas/i386/intel16.d: Likewise.
* gas/i386/intelok.d: Likewise.
* gas/i386/jump16.d: Likewise.
* gas/i386/naked.d: Likewise.
* gas/i386/opcode-suffix.d: Likewise.
* gas/i386/opcode.d: Likewise.
* gas/i386/prescott.d: Likewise.
* gas/i386/ssemmx2.d: Likewise.
* gas/i386/tlsd.d: Likewise.
* gas/i386/tlspic.d: Likewise.
* gas/i386/x86-64-addr32.d: Likewise.
* gas/i386/x86-64-prescott.d: Likewise.
* gas/i386/x86-64-rip.d: Likewise.
* gas/i386/x86_64.d: Likewise.
ld/testsuite/
2007-04-26 H.J. Lu <hongjiu.lu@intel.com>
PR binutils/4430
* ld-i386/tlsbin.dd: Updated.
* ld-i386/tlsbindesc.dd: Likewise
* ld-i386/tlsdesc.dd: Likewise
* ld-i386/tlsgdesc.dd: Likewise
* ld-i386/tlsnopic.dd: Likewise
* ld-i386/tlspic.dd: Likewise
* ld-x86-64/tlsbin.dd: Likewise
* ld-x86-64/tlsbindesc.dd: Likewise
* ld-x86-64/tlsdesc.dd: Likewise
* ld-x86-64/tlsgdesc.dd: Likewise
* ld-x86-64/tlspic.dd: Likewise
opcodes/
2007-04-26 H.J. Lu <hongjiu.lu@intel.com>
PR binutils/4430
* i386-dis.c (print_displacement): New.
(OP_E): Call print_displacement instead of print_operand_value
to output displacement when either base or index exist. Print
the explicit zero displacement in 16bit mode.
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2007-04-26 H.J. Lu <hongjiu.lu@intel.com>
PR binutils/4429
* gas/i386/i386.exp: Run "x86-64-addr32-intel" and
"x86-64-rip-intel".
* gas/i386/intelok.d: Updated.
* gas/i386/x86-64-addr32-intel.d: New file.
* gas/i386/x86-64-rip-intel.d: Likewise.
opcodes/
2007-04-26 H.J. Lu <hongjiu.lu@intel.com>
PR binutils/4429
* i386-dis.c (print_insn): Also swap the order of op_riprel
when swapping op_index. Break when the RIP relative address
is printed.
(OP_E): Properly handle RIP relative addressing and print the
explicit zero displacement for Intel mode.
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atmega16hva devices. Move at90usb82 device to 'avr5' architecture.
* doc/c-avr.texi: Document new devices.
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* opcodes/s390-opc.c (MASK_SSF_RRDRD): Fourth nybble belongs to the
opcode.
* opcodes/s390-opc.txt (pfpo, ectg, csst): New z9-ec instructions added.
2007-04-24 Andreas Krebbel <krebbel1@de.ibm.com>
* gas/s390/zarch-z9-ec.d: Add pfpo, ectg and csst.
* gas/s390/zarch-z9-ec.s: Likewise.
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* Makefile.in: Regenerate.
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* gas/m68k/br-isaa.s: New.
* gas/m68k/br-isaa.d: New.
* gas/m68k/br-isab.s: New.
* gas/m68k/br-isab.d: New.
* gas/m68k/br-isac.s: New.
* gas/m68k/br-isac.d: New.
* gas/m68k/all.exp: Adjust.
gas/
* config/tc-m68k.c (mcf54455_ctrl): New.
(HAVE_LONG_DISP, HAVE_LONG_CALL, HAVE_LONG_COND): New.
(m68k_archs): Add isac.
(m68k_cpus): Add 54455 family.
(m68k_ip): Split Bg into Bb, Bs, Bg.
(m68k_elf_final_processing): Add ISA_C.
* doc/c-m68k.texi (M680x0 Options): Add isac.
include/opcode/
* m68k.h (mcfisa_c): New.
(mcfusp, mcf_mask): Adjust.
bfd/
* archures.c (bfd_mach_mcf_isa_c, bfd_mach_mcf_isa_c_mac,
bfd_mach_mcf_isa_c_emac): New.
* elf32-m68k.c (ISAC_PLT_ENTRY_SIZE, elf_isac_plt0_entry,
elf_isac_plt_entry, elf_isac_plt_info): New.
(elf32_m68k_object_p): Add ISA_C.
(elf32_m68k_print_private_bfd_data): Print ISA_C.
(elf32_m68k_get_plt_info): Detect ISA_C.
* cpu-m68k.c (arch_info): Add ISAC.
(m68k_arch_features): Likewise,
(bfd_m68k_compatible): ISAs B & C are not compatible.
opcodes/
* m68k-opc.c: Mark mcfisa_c instructions.
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cover hack in mmix md_start_line_hook which overwrites a
colon with a space. Delete sermon and needless assertion.
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* gas/arm/archv6.d: Likewise.
* gas/arm/archv6t2.d: Likewise.
* gas/arm/arch3.d: Likewise.
* gas/arm/arch7dm.d: Likewise.
* gas/arm/arch7t.d: Likewise.
* gas/arm/archv1.d: Likewise.
* gas/arm/copro.d: Likewise.
* gas/arm/inst.d: Likewise.
* gas/arm/macro1.d: Likewise.
* gas/arm/tcompat.d: Likewise.
* gas/arm/wince_inst.d: Likewise.
* gas/arm/xscale.d: Likewise.
* gas/arm/thumb.d: White space cleanup.
* gas/arm/thumb2_relax.d: Likewise.
* gas/arm/thumb32.d: Likewise.
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