Age | Commit message (Expand) | Author | Files | Lines |
2018-12-14 | elf: Add PT_GNU_PROPERTY segment type | H.J. Lu | 3 | -3/+9 |
2018-12-13 | Fix typo/thinko in last change. | Jeff Law | 2 | -1/+6 |
2018-12-13 | Move aarch64 CIE code to aarch64 backend | Sam Tebbs | 4 | -13/+70 |
2018-12-12 | [GAS][Arm] Skip Local BLX Thumb tests for arm-netbsdelf and arm-nto | Andre Vieira | 2 | -1/+6 |
2018-12-10 | RISC-V: Don't segfault for two regs in auipc or lui. | Jim Wilson | 5 | -1/+27 |
2018-12-10 | Correct gas/ChangeLog entry for PR gas/23968 | H.J. Lu | 1 | -1/+1 |
2018-12-09 | x86: Put back BFD_RELOC_X86_64_GOTPCREL | H.J. Lu | 6 | -0/+39 |
2018-12-07 | RISC-V: Fix 4-arg add parsing. | Jim Wilson | 5 | -3/+43 |
2018-12-06 | PowerPC @l, @h and @ha warnings, plus VLE e_li | Alan Modra | 2 | -33/+61 |
2018-12-06 | opcodes/riscv: Hide '.L0 ' fake symbols | Andrew Burgess | 2 | -2/+8 |
2018-12-05 | [aarch64] Add support for pointer authentication B key | Sam Tebbs | 7 | -16/+150 |
2018-12-04 | PR23939, Check frch_cfi_data before use | wu.heng | 2 | -1/+15 |
2018-12-03 | RISC-V: Accept version, supervisor ext and more than one NSE for -march. | Jim Wilson | 29 | -141/+159 |
2018-12-03 | [aarch64] - Only use MOV for disassembly when shifter op is LSL #0 | Egeyar Bagcioglu | 3 | -2/+16 |
2018-12-03 | Update the assembler to use a version of 3 when generating the header of the ... | Nick Clifton | 19 | -19/+41 |
2018-12-01 | PR23938, should not free memory alloced in obstack by free() | Alan Modra | 8 | -44/+67 |
2018-11-30 | GAS/MIPS: Add `-mfix-r5900' option for the R5900 short loop erratum | Fredrik Noring | 9 | -1/+161 |
2018-11-27 | RISC-V: Add .insn CA support. | Jim Wilson | 5 | -13/+65 |
2018-11-27 | [ARM] Update knowledge of bfd architectures | Thomas Preud'homme | 150 | -0/+1145 |
2018-11-27 | Tighten the constraints for warning about NOPs for the MSP 430 ISA, so NOPs a... | Jozef Lawrynowicz | 24 | -71/+751 |
2018-11-23 | [GAS][ARM] Fix testism for bl local v4t test | Andre Vieira | 4 | -1/+61 |
2018-11-21 | S12Z opcodes: Fix bug disassembling certain shift instructions. | John Darrington | 3 | -1/+10 |
2018-11-21 | S12Z: Add alias instructions BHS and BLO. | John Darrington | 4 | -2/+14 |
2018-11-13 | [ARM] Improve indentation of ARM architecture declarations | Thomas Preud'homme | 2 | -51/+55 |
2018-11-12 | [BINUTILS, AARCH64, 8/8] Add data cache instructions for Memory Tagging Exten... | Sudakshina Das | 4 | -0/+68 |
2018-11-12 | [BINUTILS, AARCH64, 7/8] Add system registers for Memory Tagging Extension | Sudakshina Das | 4 | -1/+75 |
2018-11-12 | [BINUTILS, AARCH64, 6/8] Add Tag getting instruction in Memory Tagging Extension | Sudakshina Das | 6 | -3/+70 |
2018-11-12 | [BINUTILS, AARCH64, 5/8] Add Tag getting instruction in Memory Tagging Extension | Sudakshina Das | 5 | -1/+33 |
2018-11-12 | [BINUTILS, AARCH64, 4/8] Add Tag setting instructions in Memory Tagging Exten... | Sudakshina Das | 6 | -0/+140 |
2018-11-12 | [BINUTILS, AARCH64, 3/8] Add Pointer Arithmetic instructions in Memory Taggin... | Sudakshina Das | 5 | -0/+66 |
2018-11-12 | [BINUTILS, AARCH64, 2/8] Add Tag generation instructions in Memory Tagging Ex... | Sudakshina Das | 7 | -0/+120 |
2018-11-12 | [BINUTILS, AARCH64, 1/8] Add support for Memory Tagging Extension for ARMv8.5-A | Sudakshina Das | 3 | -0/+10 |
2018-11-09 | S/390: Fix optional operand handling after memory addresses | Andreas Krebbel | 4 | -24/+42 |
2018-11-09 | PowerPC, don't use bfd reloc howto in md_assemble | Alan Modra | 2 | -11/+255 |
2018-11-07 | Add updated French and Portuguese translations. | Nick Clifton | 2 | -2994/+3076 |
2018-11-07 | rx: Add target rx-*-linux. | Yoshinori Sato | 5 | -2/+13 |
2018-11-06 | [arm] fix testsuite breakage on pe-coff | Matthew Malcomson | 2 | -2/+8 |
2018-11-06 | [arm] Check for neon and condition in vcvt.f16.f32 | Matthew Malcomson | 7 | -14/+40 |
2018-11-06 | PowerPC instruction mask checks | Alan Modra | 2 | -14/+29 |
2018-11-06 | PowerPC instruction operand flag validation | Alan Modra | 2 | -0/+14 |
2018-11-06 | x86: correctly handle VPBROADCASTD with EVEX.W set outside of 64-bit mode | Jan Beulich | 4 | -0/+10 |
2018-11-06 | x86: correctly handle VMOVD with EVEX.W set outside of 64-bit mode | Jan Beulich | 4 | -0/+20 |
2018-11-06 | x86: correctly handle KMOVD with VEX.W set outside of 64-bit mode | Jan Beulich | 3 | -0/+9 |
2018-11-06 | x86: adjust {,E}VEX.W handling for PEXTR* / PINSR* | Jan Beulich | 8 | -0/+60 |
2018-11-06 | x86: adjust {,E}VEX.W handling outside of 64-bit mode | Jan Beulich | 13 | -31/+241 |
2018-11-06 | x86: fix various non-LIG templates | Jan Beulich | 10 | -0/+433 |
2018-11-06 | x86: allow {store} to select alternative {,}PEXTRW encoding | Jan Beulich | 5 | -2/+51 |
2018-11-06 | x86: add more VexWIG | Jan Beulich | 9 | -18/+70 |
2018-11-05 | Correct ChangeLog entries for PR gas/23854 commit | H.J. Lu | 1 | -1/+1 |
2018-11-05 | x86: Disable GOT relaxation with data prefix | H.J. Lu | 3 | -7/+15 |