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2004-10-282004-10-28 Tomer Levi <Tomer.Levi@nsc.com>Tomer Levi2-8/+12
2004-10-282004-10-28 Tomer Levi <Tomer.Levi@nsc.com>Tomer Levi2-0/+6
2004-10-272004-10-27 Tomer Levi <Tomer.Levi@nsc.com>Tomer Levi1-0/+7
2004-10-27* gas/crx/cop_insn.s: Test new Co-Processor instruction 'cpi'.Tomer Levi2-43/+53
2004-10-27* gas/crx/list_insn.s: Add hi/lo/u<N> registers tests, fix test bugs.Tomer Levi2-20/+24
2004-10-272004-10-27 Tomer Levi <Tomer.Levi@nsc.com>Tomer Levi1-0/+17
2004-10-27* config/tc-crx.c: Remove global variable 'post_inc_mode'.Tomer Levi1-265/+270
2004-10-252004-10-25 David Mosberger-Tang <davidm@hpl.hp.com>H.J. Lu2-1/+12
2004-10-252004-10-25 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu2-3/+13
2004-10-25Add ARM CFI supportNick Clifton11-8/+122
2004-10-25'gas/crx' updateTomer Levi1-0/+8
2004-10-25Remove test for unsupported 'popa' instruction.Tomer Levi2-12/+5
2004-10-25Reverse operands order in store co-processor instructions.Tomer Levi2-4/+4
2004-10-25'config/tc-crx.c' update.Tomer Levi1-0/+6
2004-10-251. Check unsigned immediate operands validity. 2. Update coprocessor id to be...Tomer Levi1-1/+16
2004-10-18 * config/tc-i386.c (O_secrel): Delete.Alan Modra3-2/+29
2004-10-18Accept and ignore @fptr() directives for 4-byte fixups.Nick Clifton2-3/+24
2004-10-15 * Makefile.am: Run "make dep-am"Alan Modra3-8/+19
2004-10-14 * doc/c-xtensa.texi (Xtensa Options, Absolute Literals Directive):Bob Wilson2-28/+47
2004-10-14 * gas/arm/mapping.d: Pass --special-syms to objdump.Paul Brook2-1/+5
2004-10-12bfd ChangeLogBob Wilson3-249/+175
2004-10-12bfd ChangeLogBob Wilson6-2569/+1630
2004-10-122004-10-12 Paul Brook <paul@codesourcery.com>Paul Brook3-4/+12
2004-10-11 * doc/as.texinfo (VTableEntry, VTableInherit): Add "directive" to indexBob Wilson2-4/+10
2004-10-08Add David Heine and Sterling Augustine to previous ChangeLog entry.Bob Wilson1-0/+1
2004-10-08bfd/Daniel Jacobowitz7-1/+83
2004-10-08m68k-parse.h (enum m68k_register): New control register, MBAR2 (for MCF5249)Nick Clifton3-1/+17
2004-10-08 * gas/cfi/cfi-common-4.d: Correct for 64 bit targets.Alan Modra2-1/+5
2004-10-08bfd ChangeLogBob Wilson13-2866/+8164
2004-10-07 * config/tc-mips.c (append_insn): Use fix_new rather than fix_new_expRichard Sandiford8-32/+90
2004-10-07 * elf64-mips.c (mips_elf64_write_rel): Use STN_UNDEF for relocsRichard Sandiford4-0/+19
2004-10-07 * config/tc-mips.c (append_insn): Set fx_tcbit for composite relocs.Richard Sandiford6-11/+45
2004-10-07When separating CIE out from FDE, treat a DW_CFA_remember_state as we do aNick Clifton6-22/+65
2004-10-07For ELF targets use .LL rather than LL as the prefix for symbol names generatedNick Clifton2-2/+8
2004-10-07Add error checking for CRX Co-Processor instructionsTomer Levi1-0/+1
2004-10-07Add error checking for Co-Processor instructionsTomer Levi1-1/+17
2004-10-07Add support for CRX co-processor opcodesNick Clifton9-92/+190
2004-10-06 * gas/testsuite/gas/ppc/e500.s: Add double-precision instructions.Aldy Hernandez3-0/+67
2004-10-05oops - omitted from previous deltaNick Clifton1-0/+7
2004-10-05Add support for generating ARM unwind tables.Nick Clifton7-175/+1457
2004-10-042004-10-04 Eric Christopher <echristo@redhat.com>Eric Christopher2-13/+16
2004-10-022004-10-01 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu4-1/+47
2004-10-01The patch below adds binutils support for the SHT_ARM_EXIDX, as defined byNick Clifton3-0/+24
2004-10-01Fixes for the encoding and decoding of the PDP11's SOB instructionNick Clifton4-2/+12
2004-10-01(TARGET_FORMAT): Remove LynxOS COFF definition.Nick Clifton2-5/+5
2004-10-01 * config/tc-arc.c (tc_gen_reloc): Don't assume fixP->fx_addsy is anAlan Modra2-2/+8
2004-09-30(select_control_regs): Add mcf5249.Nick Clifton2-0/+5
2004-09-30Apply Paul Brook's patch to implement armv6k instructionsNick Clifton7-3/+167
2004-09-30Use ISO C90 semanticsNick Clifton2-3400/+2719
2004-09-30(mav_reg_required_here): Allow REG_TYPE_CN as alternative when REG_TYPE_MVF,Nick Clifton2-2/+26
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