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2009-11-18Remove suffix on fxsave.H.J. Lu2-9/+13
2009-11-18 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/rex.d: Remove suffix on fxsave.
2009-11-182009-11-18 Paul Brook <paul@codesourcery.com>Paul Brook2-1/+7
gas/ * config/tc-arm.c (arm_fpus): Add fpv4-sp-d16. (aeabi_set_public_attributes): Correctly mark VFPv3xD. include/opcode/ * arm.h (FPU_VFP_V4_SP_D16, FPU_ARCH_VFP_V4_SP_D16): Define.
2009-11-18bfd/Alan Modra2-2/+14
* bfd-in.h (_bfd_elf_ppc_at_tls_transform): Declare. * bfd-in2.h: Regenerate. * elf64-ppc.c (ppc64_elf_relocate_section): Move code for R_PPC64_TLS insn optimisation to.. * elf32-ppc.c (_bfd_elf_ppc_at_tls_transform): ..here. New function. (ppc_elf_relocate_section): Use it. gas/ * config/tc-ppc.c (md_assemble): Report error on invalid @tls operands and opcode.
2009-11-182009-11-17 Sebastian Pop <sebastian.pop@amd.com>Sebastian Pop14-8/+5360
Quentin Neill <quentin.neill@amd.com> gas/ * config/tc-i386.c (cpu_arch): Added .xop and .cvt16. (build_vex_prefix): Handle xop08. (md_assemble): Don't special case the constant 3 for insns using MODRM. (build_modrm_byte): Handle vex2sources. (md_show_usage): Add xop and cvt16. * doc/c-i386.texi: Document fma4, xop, and cvt16. gas/testsuite/ * gas/i386/i386.exp: Run xop and cvt16 in 32-bit mode. Run x86-64-xop and x86-64-cvt16 in 64-bit mode. * gas/i386/lwp.d: Update name of the testcase. * gas/i386/x86-64-xop.d: New. * gas/i386/x86-64-xop.s: New. * gas/i386/xop.d: New. * gas/i386/xop.s: New. * gas/i386/cvt16.d: New. * gas/i386/cvt16.s: New. opcodes/ * i386-dis.c (OP_Vex_2src_1): New. (OP_Vex_2src_2): New. (Vex_2src_1): New. (Vex_2src_2): New. (XOP_08): Added. (VEX_LEN_XOP_08_A0): Added. (VEX_LEN_XOP_08_A1): Added. (VEX_LEN_XOP_09_80): Added. (VEX_LEN_XOP_09_81): Added. (xop_table): Added an entry for XOP_08. Handle xop instructions. (vex_len_table): Added entries for VEX_LEN_XOP_08_A0, VEX_LEN_XOP_08_A1, VEX_LEN_XOP_09_80, VEX_LEN_XOP_09_81. (get_valid_dis386): Handle XOP_08. (OP_Vex_2src): New. * i386-gen.c (cpu_flag_init): Add CPU_XOP_FLAGS and CPU_CVT16_FLAGS. (cpu_flags): Add CpuXOP and CpuCVT16. (opcode_modifiers): Add XOP08, Vex2Sources. * i386-opc.h (CpuXOP): Added. (CpuCVT16): Added. (i386_cpu_flags): Add cpuxop and cpucvt16. (XOP08): Added. (Vex2Sources): Added. (i386_opcode_modifier): Add xop08, vex2sources. * i386-opc.tbl: Add entries for XOP and CVT16 instructions. * i386-init.h: Regenerated. * i386-tbl.h: Regenerated.
2009-11-17 * gas/arm/vfma1.d: Only run on ELF based targets.Nick Clifton8-34/+50
PR binutils/10924 * gas/arm/arch4t-eabi.d: Update expected disassembly. * gas/arm/arch4t.d: Likewise. * gas/arm/archv6t2.d: Likewise. * gas/arm/arm7t.d: Likewise. * gas/arm/inst.d: Likewise. * gas/arm/xscale.d: Likewise. PR binutils/10924 * arm-dis.c (arm_opcodes): Add patterns to match undefined LDRB instruction variants. Add pattern for MRS variant that was being confused with CMP. (arm_decode_shift): Place error message in a comment. (print_insn_arm): Note that writing back to the PC is unpredictable. Only print 'p' variants of cmp/cmn/teq/tst instructions if decoding for pre-V6 architectures.
2009-11-172009-11-17 Paul Brook <paul@codesourcery.com>Paul Brook9-13/+502
Daniel Jacobowitz <dan@codesourcery.com> gas/ * doc/c-arm.texi: Document .arch armv7e-m. * config/tc-arm.c (arm_ext_v6_dsp, arm_ext_v7m): New. (insns): Put Thumb versions of v5TExP instructions into arm_ext_v5exp also. Move some Thumb variants from arm_ext_v6_notm to arm_ext_v6_dsp. (arm_archs): Add armv7e-m architecture. (aeabi_set_public_attributes): Handle -march=armv7e-m. gas/testsuite/ * gas/arm/attr-march-armv7em.d: New test. * gas/arm/arch7em-bad.d: New test. * gas/arm/arch7em-bad.l: New test. * gas/arm/arch7em.d: New test. * gas/arm/arch7em.s: New test. include/elf/ * arm.h (TAG_CPU_ARCH_V7E_M): Define. include/opcode/ * arm.h (ARM_EXT_V6_DSP): Define. (ARM_AEXT_V6T2, ARM_AEXT_NOTM): Include ARM_EXT_V6_DSP. (ARM_AEXT_V7EM, ARM_ARCH_V7EM): Define. binutils/ * readelf.c (arm_attr_tag_CPU_arch): Add v7E-M. bfd/ * elf32-arm.c (using_thumb_only, arch_has_arm_nop, arch_has_thumb2_nop): Handle TAG_CPU_ARCH_V7E_M. (tag_cpu_arch_combine): Ditto. Correct MAX_TAG_CPU_ARCH test.
2009-11-17 * gas/rx/macros.inc (creg): Remove cpen.Nick Clifton6-87/+85
* gas/rx/mvfc.d: Remove expected uses of cpen register. * gas/rx/mvtc.d: Likewise. * gas/rx/popc.d: Likewise. * gas/rx/pushc.d: Likewise.
2009-11-16 * config/tc-arm.c (parse_operands): Encode APSR_nzcv as r15.Nick Clifton5-3/+122
(do_vmrs): New function. (do_vmsr): New function. (insns): Add vmrs and vmsr. * gas/arm/vfp1xD.s: Add vmrs and vmsr instructions. * gas/arm/vfp1xD.d: Update expected disassembly.
2009-11-14Check destination operand for lockable instructions.H.J. Lu13-156/+269
gas/ 2009-11-13 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (md_assemble): Check destination operand for lockable instructions. gas/testsuite/ 2009-11-13 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/lock-1-intel.d: Updated. * gas/i386/lock-1.d: Likewise. * gas/i386/lock-1.s: Likewise. * gas/i386/lockbad-1.l: Likewise. * gas/i386/lockbad-1.s: Likewise. * gas/i386/x86-64-lock-1-intel.d: Likewise. * gas/i386/x86-64-lock-1.d: Likewise. * gas/i386/x86-64-lock-1.s: Likewise. * gas/i386/x86-64-lockbad-1.l: Likewise. * gas/i386/x86-64-lockbad-1.s: Likewise.
2009-11-142009-11-13 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu2-1/+6
* config/tc-i386.c (_i386_insn): Don't use bit field on swap_operand.
2009-11-13Check rex_ignored.H.J. Lu3-0/+9
gas/testsuite/ 2009-11-13 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/rex.s: Add a test for VEX insn. * gas/i386/rex.d: Updated. opcodes/ 2009-11-13 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (print_insn): Check rex_ignored.
2009-11-13Rewrite prefix processing.H.J. Lu40-758/+915
gas/testsuite/ 2009-11-13 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/i386.exp: Run long-1, long-1-intel, x86-64-long-1, and x86-64-long-1-intel. * gas/i386/long-1-intel.d: New. * gas/i386/long-1.d: Likewise. * gas/i386/long-1.s: Likewise. * gas/i386/x86-64-long-1-intel.d: Likewise. * gas/i386/x86-64-long-1.d: Likewise. * gas/i386/x86-64-long-1.s: Likewise. * gas/i386/jump16.d: Updated for prefix processing. * gas/i386/naked.d: Likewise. * gas/i386/nops-1-core2.d: Likewise. * gas/i386/nops-1-i686.d: Likewise. * gas/i386/nops-3-i686.d: Likewise. * gas/i386/nops-4-i686.d: Likewise. * gas/i386/nops-5-i686.d: Likewise. * gas/i386/nops-5.d: Likewise. * gas/i386/prefix.d: Likewise. * gas/i386/rep.d: Likewise. * gas/i386/string-ok.d: Likewise. * gas/i386/x86-64-addr32-intel.d: Likewise. * gas/i386/x86-64-addr32.d: Likewise. * gas/i386/x86-64-cbw-intel.d: Likewise. * gas/i386/x86-64-cbw.d: Likewise. * gas/i386/x86-64-io-intel.d: Likewise. * gas/i386/x86-64-io-suffix.d: Likewise. * gas/i386/x86-64-io.d: Likewise. * gas/i386/x86-64-lwp.d: Likewise. * gas/i386/x86-64-nops-1-core2.d: Likewise. * gas/i386/x86-64-nops-1-nocona.d: Likewise. * gas/i386/x86-64-nops-1.d: Likewise. * gas/i386/x86-64-nops-2.d: Likewise. * gas/i386/x86-64-nops-3.d: Likewise. * gas/i386/x86-64-nops-4-core2.d: Likewise. * gas/i386/x86-64-nops-4.d: Likewise. * gas/i386/x86-64-nops-5-k8.d: Likewise. * gas/i386/x86-64-nops-5.d: Likewise. * gas/i386/x86-64-rep.d: Likewise. * gas/i386/x86-64-stack-intel.d: Likewise. * gas/i386/x86-64-stack-suffix.d: Likewise. * gas/i386/x86-64-stack.d: Likewise. ld/testsuite/ 2009-11-13 H.J. Lu <hongjiu.lu@intel.com> * ld-x86-64/tlsbin.dd: Updated for prefix processing. * ld-x86-64/tlsgdesc.dd: Likewise. * ld-x86-64/tlsld1.dd: Likewise. * ld-x86-64/tlspic.dd: Likewise. opcodes/ 2009-11-13 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (ckprefix): Updated to return 0 if number of prefixes > 14 and record the last position for each prefix. (lock_prefix): Removed. (data_prefix): Likewise. (addr_prefix): Likewise. (repz_prefix): Likewise. (repnz_prefix): Likewise. (last_lock_prefix): New. (last_repz_prefix): Likewise. (last_repnz_prefix): Likewise. (last_data_prefix): Likewise. (last_addr_prefix): Likewise. (last_rex_prefix): Likewise. (last_seg_prefix): Likewise. (MAX_CODE_LENGTH): Likewise. (ADDR16_PREFIX): Likewise. (ADDR32_PREFIX): Likewise. (DATA16_PREFIX): Likewise. (DATA32_PREFIX): Likewise. (REP_PREFIX): Likewise. (seg_prefix): Likewise. (all_prefixes): Change size to MAX_CODE_LENGTH - 1. (prefix_name): Handle ADDR16_PREFIX, ADDR32_PREFIX, DATA16_PREFIX, DATA32_PREFIX and REP_PREFIX. (get_valid_dis386): Updated. (OP_C): Likewise. (OP_Monitor): Likewise. (REP_Fixup): Likewise. (print_insn): Display all prefixes. (putop): Set PREFIX_DATA on used_prefixes only if it is used. (intel_operand_size): Likewise. (OP_E_register): Likewise. (OP_G): Likewise. (OP_REG): Likewise. (OP_IMREG): Likewise. (OP_I): Likewise. (OP_I64): Likewise. (OP_sI): Likewise. (CRC32_Fixup): Likewise. (MOVBE_Fixup): Likewise. (OP_E_memory): Set REFIX_DATA on used_prefixes when it is used in 16bit mode. (OP_J): Set REX_W used if it is used. Set PREFIX_DATA on used_prefixes only if it is used.
2009-11-12gas/H.J. Lu14-17/+888
2009-11-12 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (LOCKREP_PREFIX): Removed. (REP_PREFIX): New. (LOCK_PREFIX): Likewise. (PREFIX_GROUP): Likewise. (REX_PREFIX): Updated. (MAX_PREFIXES): Likewise. (add_prefix): Updated. Return enum PREFIX_GROUP. (md_assemble): Check for lock without a lockable instruction. (parse_insn): Updated. (output_insn): Likewise. gas/testsuite/ 2009-11-12 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/i386.exp: Run lock-1, lock-1-intel, lockbad-1, x86-64-lock-1, x86-64-lock-1-intel and x86-64-lockbad-1. * gas/i386/lock-1-intel.d: New. * gas/i386/lock-1.d: Likewise. * gas/i386/lock-1.s: Likewise. * gas/i386/lockbad-1.l: Likewise. * gas/i386/lockbad-1.s: Likewise. * gas/i386/x86-64-lock-1-intel.d: Likewise. * gas/i386/x86-64-lock-1.d: Likewise. * gas/i386/x86-64-lock-1.s: Likewise. * gas/i386/x86-64-lockbad-1.l: Likewise. * gas/i386/x86-64-lockbad-1.s: Likewise. opcodes/ 2009-11-12 H.J. Lu <hongjiu.lu@intel.com> * i386-gen.c (opcode_modifiers): Add IsLockable. * i386-opc.h (IsLockable): New. (i386_opcode_modifier): Add islockable. * i386-opc.tbl: Add IsLockable to add, adc, and, btc, btr, bts, cmpxchg, cmpxch8b, dec, inc, neg, not, or, sbb, sub, xor, xadd and xchg. * i386-tbl.h: Regenerated.
2009-11-12 gas/testsuite/Daniel Jacobowitz5-11/+17
* gas/arm/copro.d, gas/arm/fp-save.d, gas/arm/float.d, gas/arm/fpa-mem.d: Update for removed generic coprocessor instructions and expanded PC-relative offsets. opcodes/ * arm-dis.c (coprocessor_opcodes): Use %A instead of %C. Remove generic coprocessor instructions for FPA loads and stores. (print_insn_coprocessor): Remove %C support. Display address for PC-relative offsets in %A.
2009-11-12Updated Russian bfd translation.Nick Clifton2-2527/+3787
Updated Indonesian gas translation.
2009-11-122009-11-11 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu2-12/+21
* config/tc-i386.c (build_modrm_byte): Don't set register operand twice.
2009-11-12gas/testsuite/H.J. Lu4-48/+54
2009-11-11 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/prefix.d: Swap order of ADDR and REP prefixes. * gas/i386/rep.d: Likewise. * gas/i386/x86-64-rep.d: Likewise. opcodes/ 2009-11-11 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (all_prefixes): New. (ckprefix): Set all_prefixes. (print_insn): Print all_prefixes instead of lock_prefix, repz_prefix, repnz_prefix, addr_prefix and data_prefix.
2009-11-11bfd/Jan Kratochvil4-15/+57
* configure.in: Call ACX_LARGEFILE. Stop calling AC_PLUGINS, AC_SYS_LARGEFILE and checking the Solaris largefile exception. * aclocal.m4: Regenerate. * configure: Regenerate. binutils/ * configure.in: Call ACX_LARGEFILE. Stop calling AC_PLUGINS, AC_SYS_LARGEFILE and checking the Solaris largefile exception. * aclocal.m4: Regenerate. * configure: Regenerate. gas/ * configure.in: Call ACX_LARGEFILE. Stop calling AC_SYS_LARGEFILE. * aclocal.m4: Regenerate. * configure: Regenerate. gdb/ * configure.ac: Call ACX_LARGEFILE. * aclocal.m4: Call m4_include for ../config/largefile.m4 and ../config/plugins.m4. * configure: Regenerate. * config.in: Regenerate. gprof/ * configure.in: Call ACX_LARGEFILE. Stop calling AC_SYS_LARGEFILE. * aclocal.m4: Regenerate. * configure: Regenerate. ld/ * configure.in: Call ACX_LARGEFILE. Stop calling AC_SYS_LARGEFILE. * aclocal.m4: Regenerate. * configure: Regenerate.
2009-11-10 * config/m68k-parse.h (enum m68k_register): Add ACR[4-7], RGPIOBAR.Maxim Kuvyrkov3-4/+46
* config/tc-m68k.c (mcf5206_ctrl): Fix whitespace. (mcf52223_ctrl): Remove non-existent registers. (mcf54418): Define. (mcf54455): Remove MBAR. (m68k_cpus): Add lines for MCF5441x family. (m68k_ip, init_table): Handle RGPIOBAR, ACR[4-7]. * m68k-dis.c (print_insn_arg): Handle RGPIOBAR, ACR[4-7] and MBAR[01].
2009-11-062009-11-06 Sebastian Pop <sebastian.pop@amd.com>Sebastian Pop3-192/+582
* opcodes/i386-dis.c (reg_table): Add XOP_8F_TABLE (XOP_09) to reg_table[REG_8F][1]: for XOP instructions, ModRM.reg first points to B.mm in the RXB.mmmmm byte, and so when B is set, we still should use the xop_table. (get_valid_dis386): Removed unused condition (from cut/n/paste) for XOP instructions. * gas/testsuite/gas/i386/x86-64-lwp.s: Updated to also contain patterns with r[8-15] registers. * gas/testsuite/gas/i386/x86-64-lwp.d: Same.
2009-11-062009-11-06 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu2-1/+6
* doc/c-i386.texi: Move .lwp.
2009-11-06 * config/obj-elf.c (obj_elf_change_section): Remove FIXME fromAlan Modra2-2/+7
comment.
2009-11-052009-11-05 Sebastian Pop <sebastian.pop@amd.com>Sebastian Pop9-7/+758
Quentin Neill <quentin.neill@amd.com> * gas/config/tc-i386.c (cpu_arch): Add CPU_LWP_FLAGS. (build_vex_prefix): Handle xop09 and xop0a. (build_modrm_byte): Handle vexlwp. (md_show_usage): Add lwp. * gas/doc/c-i386.texi (i386-LWP): New section. * gas/testsuite/gas/i386/i386.exp: Run x86-64-lwp in 64-bit mode, run lwp in 32-bit mode. * gas/testsuite/gas/i386/x86-64-lwp.d: New. * gas/testsuite/gas/i386/x86-64-lwp.s: New. * gas/testsuite/gas/i386/lwp.d: New. * gas/testsuite/gas/i386/lwp.s: New. * opcodes/i386-dis.c (OP_LWPCB_E): New. (OP_LWP_E): New. (OP_LWP_I): New. (USE_XOP_8F_TABLE): New. (XOP_8F_TABLE): New. (REG_XOP_LWPCB): New. (REG_XOP_LWP): New. (XOP_09): New. (XOP_0A): New. (reg_table): Redirect REG_8F to XOP_8F_TABLE. Add entries for REG_XOP_LWPCB and REG_XOP_LWP. (xop_table): New. (get_valid_dis386): Handle USE_XOP_8F_TABLE. Use the offsets VEX_0F, VEX_0F38, and VEX_0F3A instead of their values to access to the vex_table. (OP_LWPCB_E): New. (OP_LWP_E): New. (OP_LWP_I): New. * opcodes/i386-gen.c (cpu_flag_init): Add CPU_LWP_FLAGS, CpuLWP. (cpu_flags): Add CpuLWP. (opcode_modifiers): Add VexLWP, XOP09, and XOP0A. * opcodes/i386-opc.h (CpuLWP): New. (i386_cpu_flags): Add bit cpulwp. (VexLWP): New. (XOP09): New. (XOP0A): New. (i386_opcode_modifier): Add vexlwp, xop09, and xop0a. * opcodes/i386-opc.tbl (llwpcb): Added. (lwpval): Added. (lwpins): Added.
2009-11-05 * gas/i386/i386.exp (space1): Move test inside check for x86Nick Clifton2-3/+7
target.
2009-11-05[opcodes]DJ Delorie2-2/+7
* rx-decode.opc (rx_decode_opcode) (mvtipl): Add. (mvtcp, mvfcp, opecp): Remove. * rx-decode.c: Regenerate. * rx-dis.c (cpen): Remove. [gas] * config/rx-parse.y (MVTIPL): Update bit pattern. (cpen): Remove. [include/opcode] * rx.h (rx_decode_opcode) (mvtipl): Add. (mvtcp, mvfcp, opecp): Remove.
2009-11-042009-11-04 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu4-0/+32
PR gas/876 * gas/i386/i386.exp: Run space1. * gas/i386/space1.l: New. * gas/i386/space1.s: Likewise.
2009-11-04Fix ChangeLog typo.Paul Brook1-1/+1
2009-11-042009-11-04 Daniel Jacobowitz <dan@codesourcery.com>Maxim Kuvyrkov5-3/+53
Maxim Kuvyrkov <maxim@codesourcery.com> * config/tc-m68k.h (CF_DIFF_EXPR_OK): Define to 0 for uClinux. (CFI_DIFF_LSDA_OK): Define. * config/te-uclinux.h: New file. * configure.tgt (m68k-uclinux): Define em. * dw2gencfi.c (CFI_DIFF_LSDA_OK): New macro. (dot_cfi_lsda, output_fde): Use instead of CFI_DIFF_EXPR_OK.
2009-11-032009-11-03 Paul Brook <paul@codesourcery.com>Paul Brook5-10/+19
gas/ * config/tc-arm.c (do_vfp_nsyn_mla_mls): Fix vmls excoding. gas/testsuite/ * gas/arm/vfp-neon-syntax.d: Update expected results. * gas/arm/vfp-neon-syntax_t2.d: Update expected results.
2009-11-022009-11-02 Paul Brook <paul@codesourcery.com>Paul Brook17-30/+394
ld/testsuite/ * ld-arm/arm-elf.exp: Add new attr-merge-vfp tests. * ld-arm/attr-merge-vfp-1.d: New test. * ld-arm/attr-merge-vfp-1r.d: New test. * ld-arm/attr-merge-vfp-2.d: New test. * ld-arm/attr-merge-vfp-2r.d: New test. * ld-arm/attr-merge-vfp-3.d: New test. * ld-arm/attr-merge-vfp-3r.d: New test. * ld-arm/attr-merge-vfp-4.d: New test. * ld-arm/attr-merge-vfp-4r.d: New test. * ld-arm/attr-merge-vfp-5.d: New test. * ld-arm/attr-merge-vfp-5r.d: New test. * ld-arm/attr-merge-vfp-2.s: New test. * ld-arm/attr-merge-vfp-3.s: New test. * ld-arm/attr-merge-vfp-3-d16.s: New test. * ld-arm/attr-merge-vfp-4.s: New test. * ld-arm/attr-merge-vfp-4-d16.s: New test. gas/ * doc/c-arm.texi: Document new -mfpu options. * config/tc-arm.c (fpu_vfp_ext_v3xd, fpu_vfp_fp16, fpu_neon_ext_fma, fpu_vfp_ext_fma): New. (NEON_ENC_TAB): Add vfma, vfms, vfnma and vfnms. (do_vfp_nsyn_fma_fms, do_neon_fmac): New functions. (insns): Move double precision load/store. Split out double precision VFPv3 instrucitons. Add VFPv4 instructions. (arm_fpus): Add VFPv3-FP16, VFPv3xD and VFPv4 variants. (aeabi_set_public_attributes): Set VFPv4 variants gas/testsuite/ * gas/arm/attr-mfpu-vfpv4.d: New test. * gas/arm/attr-mfpu-vfpv4-d16.d: New test. * gas/arm/neon-fma-cov.d: New test. * gas/arm/neon-fma-cov.s: New test. * gas/arm/vfp-fma-inc.s: New test. * gas/arm/vfp-fma-arm.d: New test. * gas/arm/vfp-fma-arm.s: New test. * gas/arm/vfp-fma-thumb.d: New test. * gas/arm/vfp-fma-thumb.s: New test. * gas/arm/vfma1.d: New test. * gas/arm/vfma1.s: New test. * gas/arm/vfpv3xd.d: New test. * gas/arm/vfpv3xd.s: New test. include/opcode/ * arm.h (FPU_VFP_EXT_V3xD, FPU_VFP_EXT_FP16, FPU_NEON_EXT_FMA, FPU_VFP_EXT_FMA, FPU_VFP_V3xD, FPU_VFP_V4D16, FPU_VFP_V4): Define. (FPU_ARCH_VFP_V3D16_FP16, FPU_ARCH_VFP_V3_FP16, FPU_ARCH_VFP_V3xD, FPU_ARCH_VFP_V3xD_FP16, FPU_ARCH_VFP_V4, FPU_ARCH_VFP_V4D16, FPU_ARCH_NEON_VFP_V4): Define. binutils/ * readelf.c (arm_attr_tag_VFP_arch): Add VFPv4 and VFPv4-D16. bfd/ * elf32-arm.c (elf32_arm_merge_eabi_attributes): Handle VFPv4 attributes. opcodes/ * arm-dis.c (coprocessor_opcodes): Update to use new feature flags. Add VFPv4 instructions.
2009-11-02missed from last commitAlan Modra1-1/+2
2009-11-02 * ecoff.c (ecoff_symbol_clone_hook): New function.Alan Modra9-7/+41
* ecoff.h (ecoff_symbol_clone_hook): Declare. * obj.h (struct format_ops): Add symbol_clone_hook. * config/obj-aout.c (aout_format_ops): Init new field. * config/obj-coff.c (coff_format_ops): Likewise. * config/obj-ecoff.c (ecoff_format_ops): Likewise. * config/obj-elf.c (elf_format_ops): Likewise. * config/obj-ecoff.h (obj_symbol_clone_hook): Define. * config/obj-multi.h (obj_symbol_clone_hook): Define.
2009-11-02 * messages.c (as_fatal): Apply 2001-01-15 change and followupAlan Modra2-0/+7
to second copy of function.
2009-10-30 * config/tc-hppa.c (pa_build_unwind_subspace): Replace start symbolDave Anglin2-2/+35
with local symbol.
2009-10-29gas/H.J. Lu5-150/+151
2009-10-29 Sebastian Pop <sebastian.pop@amd.com> * config/tc-i386.c (build_modrm_byte): Do not swap REG and NDS operands for FMA4. gas/testsuite/ 2009-10-29 Sebastian Pop <sebastian.pop@amd.com> * gas/i386/fma4.d: Updated patterns. * gas/i386/x86-64-fma4.d: Same. opcodes/ 2009-10-29 Sebastian Pop <sebastian.pop@amd.com> * i386-dis.c (OP_VEX_FMA): Removed. (VexFMA): Removed. (Vex128FMA): Removed. (prefix_table): First source operand of FMA4 insns is decoded with Vex not with VexFMA. (OP_EX_VexW): Second source operand is decoded with get_vex_imm8 when vex.w is set. Third source operand is decoded with get_vex_imm8 when vex.w is cleared. (OP_VEX_FMA): Removed.
2009-10-292009-10-29 Paul Brook <paul@codesourcery.com>Paul Brook5-18/+27
gas/ * config/tc-arm.c (neon_tab_entry): Fix VNMLA/VNMLS opcodes. gas/testsuite/ * gas/arm/vfp-neon-syntax.d: Update expected results. * gas/arm/vfp-neon-syntax_t2.d: Update expected results.
2009-10-292009-10-29 Paul Brook <paul@codesourcery.com>Paul Brook3-0/+7
gas/ * doc/c-arm.texi: Document ARM -mcpu=cortex-a5. * config/arm/tc-arm.c (arm_cpu_option_table): Add cortex-a5.
2009-10-292009-10-29 Tristan Gingold <gingold@adacore.com>Tristan Gingold5-10/+8
* config/tc-mep.c (md_pseudo_table): Remove dwarf2 pseudo as they are already defined in obj-elf.c * config/tc-m32c.c (md_pseudo_table): Ditto. * config/tc-spu.c (md_pseudo_table): Ditto. * config/tc-avr.c (md_pseudo_table): Ditto.
2009-10-29 * doc/as.texinfo (Set): Delete incorrect HPPA para.Alan Modra2-5/+4
2009-10-282009-10-28 Paul Brook <paul@codesourcery.com>Paul Brook2-5/+7
gas/ * config/tc-arm.c (opcode_lookup): Allow VFP/NEON type suffixes unconditionally.
2009-10-28 PR gas/10856Alan Modra4-9/+25
* expr.c (resolve_expression): Only add "left" value to O_symbol expression when the symbol is undefined and different from the original symbol. Simplify negative logic. * gas/i386/intelpic.d: Correct.
2009-10-272009-10-27 Tristan Gingold <gingold@adacore.com>Tristan Gingold3-0/+15
* config/tc-avr.c (md_pseudo_table): Add dwarf2 debug pseudo. * config/tc-avr.h (DWARF2_LINE_MIN_INSN_LENGTH): Define. (DWARF2_ADDR_SIZE): Define.
2009-10-26 PR gas/10850Alan Modra4-22/+14
* listing.c (listing_flags): Delete. * listing.h: Likewise. * read.c (potable <lflags>): Call s_ignore.
2009-10-26 * doc/as.texinfo: Add mention of RX port and inclusion of RXNick Clifton1-0/+5
documentation.
2009-10-26 * doc/as.texinfo: Add mention of RX port and inclusion of RXNick Clifton1-0/+14
documentation.
2009-10-25* gas/z80/equ.d, gas/z80/equ.s: Added test of parsing equ directives.Arnold Metselaar5-1/+28
* gas/z80/z80.exp: Run it. * gas/z80/redef.d: Expect little endian output only.
2009-10-25* config/tc-z80.c (z80_start_line_hook): Fix parsing of 'equ' orArnold Metselaar2-11/+17
'defl' in cases where the space between the keyword and the expression has been scrubbed away. Do not check whether a symbol is redefined with 'equ' here; the function equals takes an argument indicating whether redefinitions are allowed. Only call LISTING_NEWLINE if needed, and then after the call to bump_line_counters.
2009-10-25 * doc/as.texinfo (Overview): Move -mfix7000/-mno-fix7000 toMaciej W. Rozycki3-3/+13
match the order elsewhere. Add -mfix-vr4120/-mno-fix-vr4120 and -mfix-vr4130/-mno-fix-vr4130. * doc/c-mips.texi (MIPS Opts): Correct -no-mfix-vr4120 to -mno-fix-vr4120 and -no-mfix-vr4130 to -mno-fix-vr4130.
2009-10-20gas/H.J. Lu8-67/+84
2009-10-20 H.J. Lu <hongjiu.lu@intel.com> PR gas/10775 * doc/c-i386.texi: Mention movabs. gas/testsuite/ 2009-10-20 H.J. Lu <hongjiu.lu@intel.com> PR gas/10775 * gas/i386/immed64.d: Updated. * gas/i386/l1om.d: Likewise. * gas/i386/x86-64-disp-intel.d: Likewise. * gas/i386/x86-64-disp.d: Likewise. * gas/i386/x86_64.d: Likewise. opcodes/ 2009-10-20 H.J. Lu <hongjiu.lu@intel.com> PR gas/10775 * i386-dis.c: Document LB, LS and LV macros. (dis386): Use mov%LB, mov%LS and mov%LV on mov instruction with the 64-bit displacement or immediate operand. (putop): Handle LB, LS and LV macros.
2009-10-192009-10-19 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu2-3/+5
* doc/c-i386.texi: Don't mention the 8 extra control registers for x86-64.
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