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2017-03-20Update descriptions of the .2byte, .4byte and .8byte directives.Nick Clifton2-14/+28
2017-03-20[arm] Document missing -mfpu entries.Richard Earnshaw3-4/+13
2017-03-20[arm] Add neon-vfp3 as an alias for neon to -mfpu.Richard Earnshaw2-0/+5
2017-03-16gas/arc: Limit special handling of t/nt flag to ARCv2Rinat Zelig2-5/+18
2017-03-15RISC-V: Fix assembler for c.li, c.andi and c.addiwKito Cheng2-0/+14
2017-03-15Fix building riscv targets with gcc v6.3.1Nick Clifton2-1/+6
2017-03-14RISC-V: Define DWARF2_USE_FIXED_ADVANCE_PC.Kuan-Lin Chen2-0/+7
2017-03-14RISC-V: Fix DW_CFA_advance_loc relocation.Kuan-Lin Chen2-0/+7
2017-03-14RISC-V: Fix the offset of CFA relocation.Kuan-Lin Chen2-10/+15
2017-03-13Rename R_AARCH64_TLSDESC_LD64_LO12_NC to R_AARCH64_TLSDESC_LD64_LO12 and R_AA...Nick Clifton3-8/+20
2017-03-10Document that the .2byte and .4byte directives warn about overlarge values.Nick Clifton2-10/+22
2017-03-09X86: Add pseudo prefixes to control encodingH.J. Lu8-48/+418
2017-03-08Update -maltivec and -mvsx options to only enable their oldest instructions.Peter Bergner2-2/+7
2017-03-08Add support for the new 'lnia' extended mnemonic.Peter Bergner3-2/+9
2017-03-07Correct @section placement for makeinfo 4.13Alan Modra2-3/+7
2017-03-07Document .Nbyte assembler directivesAlan Modra3-0/+46
2017-03-06Add support for Intel CET instructionsH.J. Lu10-0/+213
2017-03-06Update x86-64-mpx-inval-2 test for COFFH.J. Lu3-4/+12
2017-03-06dw2gencfi.c DWARF2_FDE_RELOC_SIZEAlan Modra2-12/+22
2017-03-06gas/dw2gencfi.c formattingAlan Modra2-25/+35
2017-03-05gas: Emit name, comp_dir and producer strings in .debug_str.Mark Wielaard3-21/+65
2017-03-02GAS: Fix bogus "attempt to move .org backwards" relaxation errorsMaciej W. Rozycki48-4/+411
2017-03-01[AArch64] Document +rcpc weak release consistency extensionSzabolcs Nagy2-0/+6
2017-02-28x86: fix handling of 64-bit operand size VPCMPESTR{I,M}Jan Beulich14-192/+262
2017-02-28Nios2 dynobj handling fixesAlan Modra2-0/+12
2017-02-28PowerPC addpcis fixAlan Modra3-81/+71
2017-02-28MIPS/BFD: Also handle `jalr $0, $25' with R_MIPS_JALRMaciej W. Rozycki7-6/+147
2017-02-25Testsuite fixes for hppa64-hpuxAlan Modra2-7/+18
2017-02-24[AArch64] Additional SVE instructionsRichard Sandiford7-8/+5081
2017-02-24[AArch64] Add a "compnum" featureRichard Sandiford5-0/+62
2017-02-24x86: also correctly support TEST opcode aliasesJan Beulich7-0/+32
2017-02-24gas: test cases for the architecture level aware SPARC ASI work.Sheldon Lobo6-0/+22
2017-02-23MIPS/BFD: Discard ineligible JALR relocations right awayMaciej W. Rozycki6-0/+156
2017-02-23S/390: Add support for new cpu architecture - arch12.Andreas Krebbel7-12/+411
2017-02-23opcodes,gas: associate SPARC ASIs with an architecture level.Sheldon Lobo2-7/+51
2017-02-23gas: slightly relax .startof.()/.sizeof.() testcaseJan Beulich2-6/+8
2017-02-23x86: extend 64-bit invalid MPX insn forms testcaseJan Beulich3-171/+226
2017-02-22GAS: Consistently fix labels at the `.end' pseudo-opMaciej W. Rozycki8-4/+101
2017-02-22Fix gas/all/err-sizeof.s for cris*-*-*Hans-Peter Nilsson2-1/+6
2017-02-22Skip ARM vcmp-noprefix-imm test on non-ELF targetsNick Clifton2-0/+5
2017-02-22gas: require an operand to .startof.()/.sizeof.()Jan Beulich3-0/+49
2017-02-20Downgrade powerpc register error to warningAlan Modra3-5/+12
2017-02-17GAS: Add ECOFF `.aent' pseudo-op supportMaciej W. Rozycki8-14/+76
2017-02-15[AArch64] Add SVE system registersRichard Sandiford5-0/+85
2017-02-15[AArch64] Fix +sve documentationRichard Sandiford2-2/+6
2017-02-15[ARC] Fix assembler relaxation.Claudiu Zissulescu28-9/+355
2017-02-15Distinguish some of the registers different on ARC700 and HS38 cpusVineet Gupta2-1/+5
2017-02-14PowerPC register expression checksAlan Modra4-484/+568
2017-02-14Fix powerpc testsuite source errorsAlan Modra4-22/+28
2017-02-13[ARM] Allow immediate without prefix in unified syntax for VCMPThomas Preud'homme4-3/+29
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