Age | Commit message (Expand) | Author | Files | Lines |
2024-01-04 | LoongArch: Fix some macro that cannot be expanded properly | Lulu Cai | 7 | -114/+96 |
2023-12-29 | x86: Append "#pass" to APX tests | H.J. Lu | 5 | -0/+5 |
2023-12-29 | x86: Don't use .insn with '/' | H.J. Lu | 1 | -3/+3 |
2023-12-29 | Fix x86-64: Add R_X86_64_CODE_4_GOTPCRELX | H.J. Lu | 1 | -0/+1 |
2023-12-29 | LoongArch: gas: Add support for tls le relax. | changjiachen | 5 | -0/+85 |
2023-12-29 | RISC-V: THEAD: Add 5 assembly pseudoinstructions for XTheadVector extension | Jin Ma | 2 | -0/+24 |
2023-12-28 | x86-64: Add R_X86_64_CODE_4_GOTTPOFF/R_X86_64_CODE_4_GOTPC32_TLSDESC | H.J. Lu | 6 | -0/+87 |
2023-12-28 | x86-64: Add R_X86_64_CODE_4_GOTPCRELX | H.J. Lu | 8 | -8/+60 |
2023-12-28 | gas: Mention initial support for Intel APX in NEWS | H.J. Lu | 1 | -0/+2 |
2023-12-28 | Support APX JMPABS for disassembler | Hu, Lin1 | 6 | -0/+87 |
2023-12-28 | Support APX NDD optimized encoding. | Hu, Lin1 | 4 | -0/+362 |
2023-12-28 | Support APX pushp/popp | Cui, Lili | 7 | -1/+53 |
2023-12-28 | Support APX Push2/Pop2 | Mo, Zewei | 12 | -0/+227 |
2023-12-28 | Support APX NDD | konglin1 | 8 | -17/+452 |
2023-12-28 | Add tests for APX GPR32 with extend evex prefix | Cui, Lili | 12 | -0/+1498 |
2023-12-28 | Support APX GPR32 with extend evex prefix | Cui, Lili | 3 | -14/+75 |
2023-12-28 | Support APX GPR32 with rex2 prefix | Cui, Lili | 17 | -160/+577 |
2023-12-25 | LoongArch: Add testsuit for DESC and tls transition and tls relaxation. | Lulu Cai | 10 | -0/+214 |
2023-12-25 | LoongArch: Add support for TLS LD/GD/DESC relaxation | mengqinggang | 5 | -280/+296 |
2023-12-25 | LoongArch: Add new relocs and macro for TLSDESC. | Lulu Cai | 1 | -1/+13 |
2023-12-22 | nios2: fix .text/.data interaction with .previous | Jan Beulich | 1 | -2/+2 |
2023-12-22 | hppa/ELF: fix .text/.data interaction with .previous | Jan Beulich | 1 | -4/+15 |
2023-12-22 | RISC-V: drop .bss override | Jan Beulich | 2 | -14/+0 |
2023-12-22 | x86-64: refuse "high" 8-bit regs with .insn and VEX/XOP/EVEX encodings | Jan Beulich | 1 | -0/+10 |
2023-12-22 | x86: properly respect rex/{rex} | Jan Beulich | 6 | -62/+98 |
2023-12-22 | LoongArch: Add support for the third expression of .align for R_LARCH_ALIGN | mengqinggang | 4 | -27/+47 |
2023-12-20 | s390: Add suffix to conditional branch instruction descriptions | Jens Remus | 2 | -0/+4 |
2023-12-20 | s390: Optionally print instruction description in disassembly | Jens Remus | 3 | -0/+28 |
2023-12-19 | aarch64: Add FEAT_ITE support | Andrea Corallo | 6 | -0/+20 |
2023-12-19 | aarch64: Add FEAT_ECBHB support | Andrea Corallo | 3 | -2/+13 |
2023-12-19 | aarch64: Add FEAT_SPECRES2 support | Andrea Corallo | 6 | -0/+25 |
2023-12-19 | x86: Remove the restriction for size of the mask register in AVX10 | Haochen Jiang | 3 | -231/+30 |
2023-12-18 | LoongArch: Add call36 and tail36 pseudo instructions for medium code model | mengqinggang | 2 | -2/+10 |
2023-12-18 | LoongArch: Add new relocation R_LARCH_CALL36 | mengqinggang | 3 | -1/+26 |
2023-12-15 | arm: reformat -march option section in gas documentation | Matthieu Longo | 1 | -110/+129 |
2023-12-15 | aarch64: Enable Cortex-X3 CPU | Matthieu Longo | 4 | -0/+11 |
2023-12-15 | arm: document -march=armv9.[123]-a binutils options | Matthieu Longo | 1 | -0/+3 |
2023-12-15 | x86: last-insn recording should be per-subsection | Jan Beulich | 5 | -0/+77 |
2023-12-15 | ELF: reliably invoke md_elf_section_change_hook() | Jan Beulich | 1 | -11/+18 |
2023-12-15 | ELF: drop "push" parameter from obj_elf_change_section() | Jan Beulich | 9 | -24/+34 |
2023-12-15 | x86: don't needlessly override .bss | Jan Beulich | 1 | -8/+5 |
2023-12-15 | revert "x86: allow 32-bit reg to be used with U{RD,WR}MSR" | Jan Beulich | 1 | -4/+4 |
2023-12-15 | x86: fold assembly dialect attributes | Jan Beulich | 2 | -5/+5 |
2023-12-15 | x86: Intel syntax implies Intel mnemonics | Jan Beulich | 8 | -54/+30 |
2023-12-15 | Arm64: fix build for certain gcc versions | Jan Beulich | 1 | -3/+3 |
2023-12-14 | RISC-V: Fix the wrong encoding and operand of the XTheadFmv extension. | Jin Ma | 2 | -3/+3 |
2023-12-13 | Make const_1_mode print $1 in AT&T syntax | Cui, Lili | 13 | -128/+128 |
2023-12-13 | Clean base_reg and assign correct values to regs for input_output_operand (%dx). | Cui, Lili | 1 | -0/+2 |
2023-12-12 | Fix whitespace snafu in tc-riscv.c | Nick Clifton | 1 | -5/+5 |
2023-12-12 | RISC-V: Emit R_RISCV_RELAX for the la/lga pseudo instruction | Rui Ueyama | 3 | -0/+26 |