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2015-03-13MIPS: Fix constraint issues with the R6 beqc and bnec instructionsAndrew Bennett4-0/+58
opcodes/ * mips-opc.c (decode_mips_operand): Fix constraint issues with u and y operands. gas/testsuite/ * gas/mips/mips.exp: Added branch constraints testcase. * gas/mips/r6-branch-constraints.s: New test. * gas/mips/r6-branch-constraints.l: New test.
2015-03-13Add support for MIPS R6 evp and dvp instructions.Andrew Bennett5-0/+24
opcodes/ * mips-opc.c (mips_builtin_opcodes): Add evp and dvp instructions. gas/testsuite/ * gas/mips/r6.s: Add evp and dvp instructions. * gas/mips/r6.d: Likewise. * gas/mips/r6-n32.d: Likewise. * gas/mips/r6-n64.d: Likewise.
2015-03-13[AArch64] Don't warn on XZR/SP overlapping when it's in load/storeJiong Wang5-0/+100
2015-03-13 Jiong Wang <jiong.wang@arm.com> gas/ * config/tc-aarch64.c (warn_unpredictable_ldst): Don't warn on reg number 31. gas/testsuite/ * gas/aarch64/diagnostic.s: New testcases. * gas/aarch64/diagnostic.l: New error match.
2015-03-13[AArch64] Don't tail-pads sections to the alignmentJiong Wang5-0/+41
2015-03-13 Jiong Wang <jiong.wang@arm.com> gas/ * config/tc-aarch64.h (SUB_SEGMENT_ALIGN): Define to be zero. gas/testsuite/ * gas/aarch64/tail_padding.s: New testcase. * gas/aarch64/tail_padding.d: New expectation file.
2015-03-12Add i6400 entry to the MIPS CPU table.Andrew Bennett3-0/+9
gas/ * config/tc-mips.c (mips_cpu_info_table): Add i6400 entry. * doc/c-mips.texi: Document i6400 -march option.
2015-03-12Fixes a problem generating relocs for thumb function calls to local symbols ↵Nick Clifton3-7/+20
defined in other sections. PR gas/17444 * config/tc-arm.h (MD_APPLY_SYM_VALUE): Pass the current segment to arm_apply_sym_value. Update prototype. * config/tc-arm.c (arm_apply_sym_value): Add segment argument. Do not apply the value if the symbol is in a different segment to the current segment.
2015-03-11Fix powerpc gas abort on invalid instruction fixupsAlan Modra2-3/+28
* config/tc-ppc.c (md_assemble): Don't abort on 8 byte insn fixups. (md_apply_fix): Report an error on data-only fixups used with insns.
2015-03-10S/390: Add more IBM z13 instructionsAndreas Krebbel3-0/+273
opcodes/ 2015-03-10 Andreas Krebbel <krebbel@linux.vnet.ibm.com> * s390-opc.c: Add new IBM z13 instructions. * s390-opc.txt: Likewise. gas/testsuite/ 2015-03-10 Andreas Krebbel <krebbel@linux.vnet.ibm.com> * gas/s390/zarch-z13.d: Add more z13 instructions. * gas/s390/zarch-z13.s: Likewise.
2015-03-10S/390: Add check for length field operandAndreas Krebbel2-0/+8
gas/ 2015-03-10 Andreas Krebbel <krebbel@linux.vnet.ibm.com> * gas/config/tc-s390.c (md_gather_operands): Check for valid length field operands.
2015-03-10Fixes a bug in the ARM port of GAS when parsing inverted register lists.Michael Perkins2-1/+9
* config/tc-arm.c (parse_operands): Fix bug setting writeback values for '^' on OP_REGLSTs. (do_push_pop): Add new writeback constraint.
2015-03-10[ARM]Fix "align directive causes MAP_DATA symbol to be lost"Sterling Augustine5-24/+32
gas/ 2015-03-10 Renlin Li <renlin.li@arm.com> * config/tc-arm.c (mapping_state): Remove first MAP_DATA emitting code. (mapping_state_2): Emit first MAP_DATA symbol here. gas/testsuite/ 2015-03-05 Renlin Li <renlin.li@arm.com> * gas/arm/dis-data.d: Adjust the desired output. * gas/arm/dis-data2.d: Ditto.
2015-03-10[AARCH64] Remove Load/Store register (unscaled immediate) alias.Jiong Wang4-200/+204
opcodes/ChangeLog: 2015-03-10 Renlin Li <renlin.li@arm.com> * aarch64-tbl.h (aarch64_opcode_table): Remove strub, ldurb, ldursb, stur, ldur, sturh, ldurh, ldursh, ldursw, prfum F_HAS_ALIAS flag and related alias. * aarch64-asm-2.c: Regenerate. * aarch64-dis-2.c: Likewise. * aarch64-opc-2.c: Likewise. gas/testsuite/ChangeLog: 2015-03-10 Renlin Li <renlin.li@arm.com> * gas/aarch64/ldst-reg-uns-imm.d: Adjust expected output. * gas/aarch64/ldst-reg-unscaled-imm.d: Likewise. * gas/aarch64/reloc-insn.d: Likewise.
2015-03-10[AArch64] Set the minimum alignment on code segmentsJiong Wang5-1/+36
gas/ 2015-03-10 Matthew Wahab <matthew.wahab@arm.com> * config/tc-aarch64.c (mapping_state): Set minimum alignment for code sections. gas/testsuite 2015-03-10 Matthew Wahab <matthew.wahab@arm.com> * gas/aarch64/codealign.d: Add test for code section alignment. * gas/aarch64/codealign.s: New file.
2015-03-10Fixes a bug building the ARM Linux kernel with a toolchain compiled with ↵Nick Clifton2-0/+8
CPU_DEFAULT set. PR gas/17852 * config/tc-arm.c (md_begin): Ensure that selected_cpu is initialised when CPU_DEFAULT is defined.
2015-03-05Fixes a thinko in the implementation of the V850 -m8byte-align and ↵Nick Clifton2-6/+14
-m4byte-align command line options. * config/tc-v850.c (md_parse_option): Fix code to set or clear EF_RH850_DATA_ALIGN8 bit in ELF header, based upon the use of the -m8byte-align and -m4byte-align command line options.
2015-03-04Allow MOVK for R_AARCH64_TLSLE_MOVW_TPREL_G{0,1}NCRichard Sandiford5-2/+21
bfd/ PR gas/17843 * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Expect R_AARCH64_TLSLE_MOVW_TPREL_G0_NC and R_AARCH64_TLSLE_MOVW_TPREL_G1_NC to be used with MOVK rather than MOVZ. gas/ PR gas/17843 * config/tc-aarch64.c (process_movw_reloc_info): Allow R_AARCH64_TLSLE_MOVW_TPREL_G0_NC and R_AARCH64_TLSLE_MOVW_TPREL_G1_NC for MOVK. gas/testsuite/ PR gas/17843 * gas/aarch64/tls.s, gas/aarch64/tls.d: Add test for R_AARCH64_TLSLE_MOVW_TPREL_G0/R_AARCH64_TLSLE_MOVW_TPREL_G1_NC sequence. ld/testsuite/ PR gas/17843 * ld-aarch64/tlsle.s, ld-aarch64/tlsle.d: New test. * ld-aarch64/aarch64-elf.exp: Run it.
2015-02-28Pad only text sections at end by defaultAlan Modra5-29/+39
gas/ * write.c (SUB_SEGMENT_ALIGN): Don't pad non-code sections at end to their alignment. gas/testsuite/ * gas/sparc/pcrel.d: Update for changed padding in data sections. * gas/sparc/pcrel64.d: Likewise. ld/testsuite/ * ld-sparc/gotop32.rd: Update for changed padding in data sections. * ld-sparc/gotop32.td: Likewise. * ld-sparc/gotop64.rd: Likewise. * ld-sparc/gotop64.td: Likewise. * ld-tilegx/external.s: Align .data. * ld-tilepro/external.s: Likewise.
2015-02-26[AArch64] Add support for :tlsdesc: and TLSDESC_LD_PREL19Marcus Shawcroft1-1/+3
2015-02-26[AArch64] Add support for :tlsdesc: and TLSDESC_ADR_PREL21Marcus Shawcroft2-1/+10
2015-02-26Add ADR :tlsgd: directive and TLSGD_ADR_PREL21 support.Marcus Shawcroft2-1/+10
2015-02-26Adding support for TLSIE_LD_GOTTREL_PREL19.Marcus Shawcroft2-1/+10
2015-02-26Adding ld_literal_type.Marcus Shawcroft2-5/+42
Extend the address modifier parsing to distinguish between the modifers used in LDR literal and LDR register offset address modes. The current parser incorrectly accepts the :got: modifier on a register offset instruction resulting in silent corruption of the output binary.
2015-02-26Adding test case for abuse of :got: in offset loadMarcus Shawcroft3-0/+7
The :got: modifier is not meaningful in a register offset load store instruction and should result in a diagnostic.
2015-02-26Adding adr_type and prevent adr :got:Marcus Shawcroft2-3/+53
The current implementation of the :got: assembler modifier does not distinguish the ADR and ADRP instruction. The :got: modifier does not make sense on and ADR instruction and should be error'd rather than the current behavior of applying an inappropriate relocation to the output and scrambling the underlying instruction silently.
2015-02-26Add test case for ADR :got:fooMarcus Shawcroft3-0/+7
The modifier :got: does not make sense on an ADR instruction. Add a test case to ensure we gripe.
2015-02-26Remove dead code.Marcus Shawcroft2-3/+4
2015-02-26[ARM]Update for Tag_ABI_HardFP_use per EABI docTerry Guo8-0/+71
Updated how we merge and display this attribute per the latest EABI documents. bfd/ChangeLog * elf32-arm.c (elf32_arm_merge_eabi_attributes): Update how we merge Tag_ABI_HardFP_use. binutils/ChangeLog * readelf.c (arm_attr_tag_ABI_HardFP_use): Update how we display it. ld/testsuite/ChangeLog * ld-arm/attr-merge-3.attr: Remove Tag_ABI_HardFP_use. * ld-arm/attr-merge-vfp-10.d: Likewise. * ld-arm/attr-merge-vfp-10r.d: Likewise. * ld-arm/attr-merge-vfp-12.d: Likewise. * ld-arm/attr-merge-vfp-12r.d: Likewise. * ld-arm/attr-merge-vfp-13.d: Likewise. * ld-arm/attr-merge-vfp-13r.d: Likewise. * ld-arm/attr-merge-vfp-14.d: Likewise. * ld-arm/attr-merge-vfp-14r.d: Likewise. * ld-arm/attr-merge-vfp-6.d: Likewise. * ld-arm/attr-merge-vfp-6r.d: Likewise. * ld-arm/attr-merge-vfp-7.d: Likewise. * ld-arm/attr-merge-vfp-7r.d: Likewise. * ld-arm/attr-merge-vfp-8.d: Likewise. * ld-arm/attr-merge-vfp-8r.d: Likewise.
2015-02-25avr/objdump: Support dumping .avr.prop section.Andrew Burgess3-0/+60
Add support to objdump for dumping the .avr.prop section in a structured way. binutils/ChangeLog: * od-elf32_avr.c: Add elf32-avr.h include. (OPT_AVRPROP): Define. (options[]): Add 'avr-prop' entry. (elf32_avr_help): Add avr-prop help text. (elf32_avr_dump_avr_prop): New function. (elf32_avr_dump): Add check for avr-prop. bfd/ChangeLog: * elf32-avr.h (struct avr_property_header): New strucure. (avr_elf32_load_property_records): Declare. (avr_elf32_property_record_name): Declare. * elf32-avr.c: Add bfd_stdint.h include. (retrieve_local_syms): New function. (get_elf_r_symndx_section): New function. (get_elf_r_symndx_offset): New function. (internal_reloc_compare): New function. (struct avr_find_section_data): New structure. (avr_is_section_for_address): New function. (avr_find_section_for_address): New function. (avr_elf32_load_records_from_section): New function. (avr_elf32_load_property_records): New function. (avr_elf32_property_record_name): New function. gas/testsuite/ChangeLog: * gas/avr/avr-prop-1.d: New file. * gas/avr/avr-prop-1.s: New file.
2015-02-25avr/gas: Write out data to track .org/.align usage.Andrew Burgess3-0/+375
Adds support to the assembler to write out data for tracking the use of .org and .align directives. This data is collected within the assembler and written out to a section ".avr.prop" (if there's anything to write out). This patch does not add any tests. The next patch in this series will add a better mechanism for visualising the contents of .avr.prop which will make writing tests much easier. This patch also does not make any use of this collected data, that will also come along in a later patch; the intended consumer is the linker, during linker relaxation this information will be used to ensure that the .org and .align directives are honoured. bfd/ChangeLog: * elf32-avr.h (AVR_PROPERTY_RECORD_SECTION_NAME): Define. (AVR_PROPERTY_RECORDS_VERSION): Define. (AVR_PROPERTY_SECTION_HEADER_SIZE): Define. (struct avr_property_record): New structure. gas/ChangeLog: * config/tc-avr.c: Add elf32-avr.h include. (struct avr_property_record_link): New structure. (avr_output_property_section_header): New function. (avr_record_size): New function. (avr_output_property_record): New function. (avr_create_property_section): New function. (avr_handle_align): New function. (exclude_section_from_property_tables): New function. (create_record_for_frag): New function. (append_records_for_section): New function. (avr_create_and_fill_property_section): New function. (avr_post_relax_hook): New function. * config/tc-avr.h (md_post_relax_hook): Define. (avr_post_relax_hook): Declare. (HANDLE_ALIGN): Define. (avr_handle_align): Declare. (strut avr_frag_data): New structure. (TC_FRAG_TYPE): Define.
2015-02-25[SH] Fix clrs, sets, pref insn arch memberships.Oleg Endo24-486/+416
opcodes/ * sh-opc.h (clrs, sets): Mark as arch_sh3_nommu_up instead of arch_sh_up. (pref): Mark as arch_sh2a_nofpu_or_sh3_nommu_up instead of arch_sh2a_nofpu_or_sh4_nommu_nofpu_up. gas/testsuite/ * gas/sh/arch/arch.exp: Replace dead code to generate expected .s files with ... * gas/sh/arch/sh-opc-gen-as.pl: ... this new script. * gas/sh/arch/arch_expected.txt: Regenerate. * gas/sh/arch/sh-dsp.s: Likewise. * gas/sh/arch/sh-opc-gen-as.pl: Likewise. * gas/sh/arch/sh.s: Likewise. * gas/sh/arch/sh2.s: Likewise. * gas/sh/arch/sh2a-nofpu-or-sh3-nommu.s: Likewise. * gas/sh/arch/sh2a-nofpu-or-sh4-nommu-nofpu.s: Likewise. * gas/sh/arch/sh2a-nofpu.s: Likewise. * gas/sh/arch/sh2a-or-sh3e.s: Likewise. * gas/sh/arch/sh2a-or-sh4.s: Likewise. * gas/sh/arch/sh2a.s: Likewise. * gas/sh/arch/sh2e.s: Likewise. * gas/sh/arch/sh3-dsp.s: Likewise. * gas/sh/arch/sh3-nommu.s: Likewise. * gas/sh/arch/sh3.s: Likewise. * gas/sh/arch/sh3e.s: Likewise. * gas/sh/arch/sh4-nofpu.s: Likewise. * gas/sh/arch/sh4-nommu-nofpu.s: Likewise. * gas/sh/arch/sh4.s: Likewise. * gas/sh/arch/sh4a-nofpu.s: Likewise. * gas/sh/arch/sh4a.s: Likewise. * gas/sh/arch/sh4al-dsp.s: Likewise. ld/testsuite/ * ld-sh/arch/arch_expected.txt: Regenerate. * ld-sh/arch/sh-dsp.s: Likewise. * ld-sh/arch/sh.s: Likewise. * ld-sh/arch/sh2.s: Likewise. * ld-sh/arch/sh2a-nofpu-or-sh3-nommu.s: Likewise. * ld-sh/arch/sh2a-nofpu-or-sh4-nommu-nofpu.s: Likewise. * ld-sh/arch/sh2a-nofpu.s: Likewise. * ld-sh/arch/sh2a-or-sh3e.s: Likewise. * ld-sh/arch/sh2a-or-sh4.s: Likewise. * ld-sh/arch/sh2a.s: Likewise. * ld-sh/arch/sh2e.s: Likewise. * ld-sh/arch/sh3-dsp.s: Likewise. * ld-sh/arch/sh3-nommu.s: Likewise. * ld-sh/arch/sh3.s: Likewise. * ld-sh/arch/sh3e.s: Likewise. * ld-sh/arch/sh4-nofpu.s: Likewise. * ld-sh/arch/sh4-nommu-nofpu.s: Likewise. * ld-sh/arch/sh4.s: Likewise. * ld-sh/arch/sh4a-nofpu.s: Likewise. * ld-sh/arch/sh4a.s: Likewise. * ld-sh/arch/sh4al-dsp.s: Likewise.
2015-02-25[gas][ARM] Document supported ARMv8 cores.Kyrylo Tkachov2-0/+8
2015-02-25 Matthew Wahab <matthew.wahab@arm.com> * doc/c-arm.texi (-mcpu=): Add cortex-a53, cortex-a57 and cortex-a72.
2015-02-24Adds support for generating notes in V850 binaries.Nick Clifton7-4/+139
bfd * elf32-v850.c (v850_set_note): New function. Creates a Renesas style note entry. (v850_elf_make_note_section): New function. Creates a note section. (v850_elf_create_sections): New function. Create a note section if one is not already present. (v850_elf_set_note): New function. Adds a note to a bfd. (v850_elf_copy_private_bfd_data): New function. Copies V850 notes. (v850_elf_merge_notes): New function. Merges V850 notes. (print_v850_note): New function. Displays a V850 note. (v850_elf_print_notes): New function. Displays all notes attached to a bfd. (v850_elf_merge_private_bfd_data): Call v850_elf_merge_notes. (v850_elf_print_private_bfd_data): Call v850_elf_print_notes. (v850_elf_fake_sections): Set the type of the V850 note section. * bfd-in.h (v850_elf_create_sections): Add prototype. (v850_elf_set_note): Add prototype. * bfd-in2.h: Regenerate. binutils* readelf.c (get_machine_flags): Remove deprecated V850 machine flags. (get_v850_section_type_name): New function. Handles V850 special sections. (get_section_type_name): Add support for V850. (get_v850_elf_note_type): New function. Returns the name of a V850 note. (print_v850_note): New function. Prints a V850 note. (process_v850_notes): New function. Prints V850 notes. (process_note_sections): Add support for V850. binutils/testsute * binutils-all/objcopy.exp: Skip the strip-10 test for the V850. gas * config/tc-v850.c (soft_float): New variable. (v850_data_8): New variable. (md_show_usage): Add -msoft-float/-mhard-float. (md_parse_option): Likewise. (md_begin): Set the default value of soft_float. (v850_md_end): New function. Creates a note section. * config/tc-v850.h (md_end): Define. * doc/c-v850.texi: Document -msoft-float/-mhard-float. gas/testsuite * gas/elf/elf.exp: Add special version of the section2 test for the V850. * gas/elf/section2.e-v850: New file. include/elf * v850.h (EF_RH850_SIMD): Delete deprecated flag. (EF_RH850_CACHE): Likewise. (EF_RH850_MMU): Likewise. (EF_RH850_DATA_ALIGN8): Likewise. (SHT_RENESAS_IOP): Fix typo in name. (SHT_RENESAS_INFO): Define. (V850_NOTE_SECNAME): Define. (SIZEOF_V850_NOTE): Define. (V850_NOTE_NAME): Define. (enum v850_notes): New enum. (NUM_V850_NOTES): Define. ld/ChangeLog 2015-02-24 Nick Clifton <nickc@redhat.com> * Makefile.am (ev850.c): Add dependency upon $(srcdir)/emultempl/v850elf.em. (ev850_rh850.c): Likewise. * Makefile.in: Regenerate. * emultempl/v850elf.em: New file. * emulparams/v850.sh (EXTRA_EM_FILE): Define. * emulparams/v850_rh850.sh (EXTRA_EM_FILE): Define. * scripttempl/v850.sc: Add .note.renesas section. * scripttempl/v850_rh850.sc: Likewise. ld/testsuite * ld-elf/extract-symbol-1sec.d: Expect to fail on the V850.
2015-02-23Add support for the h8300-linux target.Yoshinori Sato5-4/+134
ld * Makefile.am: (ALL_EMULATION_SOURCES): Add new emulations. * Makefile.in: Regenerate. * configure.tgt: Add h8300-*-linux * emulparams/h8300elf_linux.sh: Add new emulation. * emulparams/h8300helf_linux.sh: Likewise. * emulparams/h8300self_linux.sh: Likewise. * emulparams/h8300sxelf_linux.sh: Likewise. bfd * config.bfd: Add h8300-*-linux. * configure.ac: Add h8300_elf32_linux_vec. * configure: Regenerate. * elf32-h8300.c: Likewise. * targets.c(_bfd_target_vector): Likewise. gas * config/tc-h8300.c (line_separater_chars): Add a version for h8300-linux that includes a separator. (default_mach): New variable. (md_main): Use it. (md_longopts): Add '--march' option. (md_parse_option): Parse the new option. * config/tc-h8300.h (TARGET_FORMAT): Add elf32-h8300-linux. * configure.tgt: Add h8300-*-linux * doc/c-h8300.texi: Document --march.
2015-02-23Fixes the generation of dwarf line debug information for the msp430, even in ↵Nick Clifton3-4/+28
the presence of function sections and linker garbage collection. PR 17940 * dwarf2dbg.c (out_header): When generating dwarf sections use real symbols not temps for the start and end symbols. * config/tc-msp430.h (TC_FORCE_RELOCATION_SUB_SAME): Also prevent adjustments to relocations in debug sections. (TC_LINKRELAX_FIXUP): Likewise. * elf32-msp430.c (msp430_elf_relax_delete_bytes): Adjust debug symbols at end of sections. Adjust function sizes.
2015-02-19gas doc warning fixesAlan Modra3-23/+28
* doc/as.texinfo (Local Symbol Names): Don't use ':' in pxref. * doc/c-i386.texi: Reorder i386-Bugs after i386-Arch.
2015-02-11[AArch64] Fix code formatting in the cpu-tableJiong Wang2-6/+10
2015-02-11 Matthew Wahab <matthew.wahab@arm.com> * config/tc-aarch64.c (aarch64_cpus): Fix code formatting.
2015-02-11[ARM] Add support for Cortex-A72Jiong Wang2-0/+6
2015-02-11 Matthew Wahab <matthew.wahab@arm.com> * config/tc-arm.c: Add support for Cortex-A72.
2015-02-09[ARM][gas] Use as_tsktsk instead of as_warn for deprecation messages.Kyrylo Tkachov13-73/+102
* config/tc-arm.c (warn_deprecated_sp): Use as_tsktsk instead of as_warn for deprecation messages. (encode_arm_addr_mode_2): Likewise. (check_obsolete): Likewise. (do_rd_rm_rn): Likewise. (do_co_reg): Likewise. (do_setend): Likewise. (do_t_mov_cmp): Likewise. (do_neon_ldr_str): Likewise. (opcode_lookup): Likewise. (if_fsm_post_encode): Likewise. (md_assemble): Likewise. * gas/arm/armv1.l: Remove 'Warning: ' from expected messages for deprecations. * gas/arm/armv8-a-bad.l: Likewise. * gas/arm/armv8-a-it-bad.l: Likewise. * gas/arm/depr-swp.l: Likewise. * gas/arm/ldsgeb.l: Likewise. * gas/arm/ldsgeh.l: Likewise. * gas/arm/thumb2_bad_reg.l: Likewise. * gas/arm/thumb32.l: Likewise. * gas/arm/udf.l: Likewise. * gas/arm/vstr-arm-bad.l: Likewise.
2015-02-06gas: fix a few omissions in .cfi_label handlingJan Beulich2-1/+12
While actually starting to use that new directive, I noticed a few oversights of the original commit. gas/ 2015-02-06 Jan Beulich <jbeulich@suse.com> * dw2gencfi.c (select_cie_for_fde): Also bail on CFI_label. (cfi_change_reg_numbers): Also do nothing for CFI_label. (cfi_pseudo_table): Also handle .cfi_label when not supporting CFI directives.
2015-02-05Fix msp430 build with gcc-5Alan Modra2-2/+7
gcc-5 correctly complains "loop exit may only be reached after undefined behavior". I was going to correct this by checking the index before dereferencing the array rather than the other way around, but then I noticed it is possible for extract_cmd to write the terminating zero one past the end of "cmd". Fixing that means no index check is needed in md_assemble. * config/tc-msp430.c (md_assemble): Correct size passed to extract_cmd. Remove index check.
2015-02-04[AArch64] Add support for Cortex-A72Jiong Wang3-0/+8
2015-02-04 Matthew Wahab <matthew.wahab@arm.com> * config/tc-aarch64.c (aarch64_cpus): Add support for Cortex-A72. * doc/c-aarch64.texi (-mcpu=): Add "cortex-a72".
2015-02-04Fix encoding of "addw ax, [hl]" and "subw ax, [hl]".Nick Clifton2-1/+6
* config/rl78-parse.y (addsubw): Fix encoding of [HL] variant of these instructions.
2015-02-03[AARCH64] Document .arch and .arch_extension directiveJiong Wang2-0/+23
2015-02-03 Renlin Li <renlin.li@arm.com> gas/ * doc/c-aarch64.texi (.arch): Document the directive. (.arch_extension): Likewise.
2015-02-03Fix use of uninitialised memory by the RL78 port of GAS.Nick Clifton2-0/+7
* config/tc-rl78.h (TC_PARSE_CONS_EXPRESSION): Define.
2015-01-29NDS32: Set branch instruction to relaxable.Kuan-Lin Chen2-166/+277
Relaxable fragments can be relaxed when there are alignment requirements. Besides, insert a dummy fragment in the final to make sure that all alignment is traversed. Finally, convert these fragments in md_convert_frag with relax_table.
2015-01-28FT32 initial supportAlan Modra11-0/+1395
FT32 is a new 32-bit RISC core developed by FTDI for embedded applications. * configure.ac: Add FT32 support. * configure: Regenerate. bfd/ * Makefile.am: Add FT32 files. * archures.c (enum bfd_architecture): Add bfd_arch_ft32. (bfd_mach_ft32): Define. (bfd_ft32_arch): Declare. (bfd_archures_list): Add bfd_ft32_arch. * config.bfd: Handle FT32. * configure.ac: Likewise. * cpu-ft32.c: New file. * elf32-ft32.c: New file. * reloc.c (BFD_RELOC_FT32_10, BFD_RELOC_FT32_20, BFD_RELOC_FT32_17, BFD_RELOC_FT32_18): Define. * targets.c (_bfd_target_vector): Add ft32_elf32_vec. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. * Makefile.in: Regenerate. * configure: Regenerate. * po/SRC-POTFILES.in: Regenerate. binutils/ * readelf.c: Add FT32 support. gas/ * Makefile.am: Add FT32 files. * config/tc-ft32.c: New file. * config/tc-ft32.h: New file. * configure.tgt: Add FT32 support. * Makefile.in: Regenerate. * po/POTFILES.in: Regenerate. gas/testsuite/ * gas/ft32/ft32.exp: New file. * gas/ft32/insn.d: New file. * gas/ft32/insn.s: New file. include/ * dis-asm.h (print_insn_ft32): Declare. include/elf/ * common.h (EM_FT32): Define. * ft32.h: New file. include/opcode/ * ft32.h: New file. ld/ * Makefile.am: Add FT32 files. * configure.tgt: Handle FT32 target. * emulparams/elf32ft32.sh: New file. * scripttempl/ft32.sc: New file. * Makefile.in: Regenerate. opcodes/ * Makefile.am: Add FT32 files. * configure.ac: Handle FT32. * disassemble.c (disassembler): Call print_insn_ft32. * ft32-dis.c: New file. * ft32-opc.c: New file. * Makefile.in: Regenerate. * configure: Regenerate. * po/POTFILES.in: Regenerate.
2015-01-27NDS32/gas: Limit the format of pseudo instruction la.Kuan-Lin Chen2-1/+15
2015-01-27NDS32/gas: Fix md_parse_name hook.Kuan-Lin Chen2-0/+12
2015-01-19Extend .reloc to accept some BFD_RELOCsAlan Modra7-1/+47
Tests that bfd_perform_reloc doesn't freak over a NONE reloc at end of section. gas/ * read.c (s_reloc): Match BFD_RELOC_NONE, BFD_RELOC{8,16,32,64}. * write.c (get_frag_for_reloc): Allow match just past end of frag. gas/testsuite/ * gas/all/none.s, * gas/all/none.d: New test. * gas/all/gas.exp: Run it.
2015-01-16S/390: Add support for IBM z13.Andreas Krebbel16-152/+1254
- 32 128 bit vector registers (overlapping with the existing 16 64 bit floating point registers) - vector double instructions - vector integer instructions - scalar vector instructions (allowing to have more floating point registers for scalar operations) - vector string instructions gas/ChangeLog: * config/tc-s390.c (struct pd_reg): Remove. (pre_defined_registers): Remove. (REG_NAME_CNT): Remove. (reg_name_search): Calculate the register number instead of doing a lookup. (register_name, tc_s390_regname_to_dw2regnum): Adopt to the new reg_name_search signature. (s390_parse_cpu): Support the new arch string z13. (s390_insert_operand): Support for vector registers with the extra field for the fifth bit of each vector register operand. (md_gather_operand): Adjust to the new handling of optional parameters. * doc/as.texinfo: Document the z13 cpu string. gas/testsuite/ChangeLog: * gas/s390/esa-g5.d: Add a variant without the optional operand. * gas/s390/esa-g5.s: Likewise. * gas/s390/esa-z9-109.d: Likewise. * gas/s390/esa-z9-109.s: Likewise. * gas/s390/zarch-z9-109.d: Likewise. * gas/s390/zarch-z9-109.s: Likewise. * gas/s390/zarch-z10.d: For variants with a zero optional argument it is not dumped by objdump anymore. * gas/s390/zarch-zEC12.d: Likewise. * gas/s390/zarch-z13.d: New file. * gas/s390/zarch-z13.s: New file. * gas/s390/s390.exp: Run the test for the z13 files. include/opcode/ChangeLog: * s390.h (s390_opcode_cpu_val): Add S390_OPCODE_Z13. ld/testsuite/ChangeLog: * ld-s390/tlsbin.dd: The nopr register operand is optional and not printed if 0 anymore. opcodes/ChangeLog: * s390-dis.c (s390_extract_operand): Support vector register operands. (s390_print_insn_with_opcode): Support new operands types and add new handling of optional operands. * s390-mkopc.c (s390_opcode_mode_val, s390_opcode_cpu_val): Remove and include opcode/s390.h instead. (struct op_struct): New field `flags'. (insertOpcode, insertExpandedMnemonic): New parameter `flags'. (dumpTable): Dump flags. (main): Parse flags from the s390-opc.txt file. Add z13 as cpu string. * s390-opc.c: Add new operands types, instruction formats, and instruction masks. (s390_opformats): Add new formats for .insn. * s390-opc.txt: Add new instructions.
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