Age | Commit message (Collapse) | Author | Files | Lines |
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2015-03-27 Renlin Li <renlin.li@arm.com>
gas/
* config/tc-aarch64.c (mapping_state): Emit MAP_DATA within text section in order.
(mapping_state_2): Don't emit MAP_DATA here.
(s_aarch64_inst): Align frag during state transition.
(md_assemble): Likewise.
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* config/tc-aarch64.c (set_error_kind): Delete.
(set_error_message): Delete.
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bfd/
* configure: Regenerated.
binutils/
* configure: Regenerated.
gas/
* configure: Regenerated.
gdb/
* Makefile.in (top_srcdir): New.
* configure: Regenerated.
gold/
* configure: Regenerated.
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2015-03-26 Evandro Menezes <e.menezes@samsung.com>
gas/
* config/tc-aarch64.c: Add support for Samsung Exynos M1.
* doc/c-aarch64.texi (-mcpu=): Add "exynos-m1".
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2015-03-26 Evandro Menezes <e.menezes@samsung.com>
gas/
* config/tc-arm.c: Add support for Samsung Exynos M1.
* doc/c-arm.texi (-mcpu=): Add "exynos-m1".
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bfd/
2015-04-01 H.J. Lu <hongjiu.lu@intel.com>
* configure: Regenerated.
binutils/
2015-04-01 H.J. Lu <hongjiu.lu@intel.com>
* configure: Regenerated.
gas/
2015-04-01 H.J. Lu <hongjiu.lu@intel.com>
* configure: Regenerated.
gdb/
2015-04-01 H.J. Lu <hongjiu.lu@intel.com>
* configure: Regenerated.
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The compressed .debug_info section is bigger than the original in 32-bit.
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bfd/
* config.bfd (targ_defvec): Set to x86_64_elf64_cloudabi_vec
for x86_64-*-cloudabi*.
* configure.ac: Handle x86_64_elf64_cloudabi_vec.
* configure: Regenerated.
* elf64-x86-64.c (TARGET_LITTLE_SYM): Support x86_64-*-cloudabi*.
(TARGET_LITTLE_NAME): Likewise.
(ELF_OSABI): Likewise.
(elf64_bed): Likewise.
* targets.c (x86_64_elf64_cloudabi_vec): New.
(_bfd_target_vector): Add x86_64_elf64_cloudabi_vec.
gas/
* configure.tgt (fmt): Set to elf for *-*-cloudabi*.
ld/
* Makefile.am (ALL_64_EMULATION_SOURCES): Add
eelf_x86_64_cloudabi.c.
(eelf_x86_64_cloudabi.c): New.
* configure.tgt (targ_emul): Set to elf_x86_64_cloudabi for
x86_64-*-cloudabi*.
* Makefile.in: Regenerated.
* emulparams/elf_x86_64_cloudabi.sh: New file.
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* configure.ac: Revert the AM_ZLIB change.
* Makefile.in: Regenerated.
* aclocal.m4: Likewise.
* configure: Likewise.
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This patch adds --with-system-zlib and remove --with-zlib in gas.
gas/
* Makefile.am (ZLIBINC): New.
(AM_CFLAGS): Add $(ZLIBINC).
* as.c: (show_usage): Don't check HAVE_ZLIB_H.
(parse_args): Likewise.
* compress-debug.c: Don't check HAVE_ZLIB_H to include <zlib.h>.
(compress_init): Don't check HAVE_ZLIB_H.
(compress_data): Likewise.
(compress_finish): Likewise.
* configure.ac (AM_ZLIB): Removed.
(zlibinc): New. AC_SUBST.
Add --with-system-zlib.
* Makefile.in: Regenerated.
* config.in: Likewise.
* configure: Likewise.
* doc/Makefile.in: Likewise.
gas/testsuite/
* gas/i386/dw2-compress-1.d: Expect .zdebug_info.
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* config/tc-i386.c (cpu_flags_set): Removed.
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gas/ChangeLog:
2015-03-25 Renlin Li <renlin.li@arm.com>
* config/tc-aarch64.c (mapping_state): Remove first MAP_DATA emitting code.
(mapping_state_2): Emit first MAP_DATA symbol here.
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No need to write the zlib header if compression didn't make the section
smaller.
PR gas/18087
* write.c (compress_debug): Don't write the zlib header if
compression didn't make the section smaller.
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gas/ChangeLog:
2015-03-24 Terry Guo <terry.guo@arm.com>
* config/tc-arm.c (no_cpu_selected): Use new macro to compare
features.
(parse_psr): Likewise.
(do_t_mrs): Likewise.
(do_t_msr): Likewise.
(static const arm_feature_set arm_ext_*): Defined with new
macros.
(static const arm_feature_set arm_cext_*): Likewise.
(static const arm_feature_set fpu_fpa_ext_*): Likewise.
(static const arm_feature_set fpu_vfp_ext_*): Likewise.
(deprecated_coproc_regs): Likewise.
(UL_BARRIER): Likewise.
(barrier_opt_names): Likewise.
(arm_cpus): Likewise.
(arm_extensions): Likewise.
include/opcode/ChangeLog:
2015-03-24 Terry Guo <terry.guo@arm.com>
* arm.h (arm_feature_set): Extended to provide more available
* bits.
(ARM_ANY): Updated to follow above new definition.
(ARM_CPU_HAS_FEATURE): Likewise.
(ARM_CPU_IS_ANY): Likewise.
(ARM_MERGE_FEATURE_SETS): Likewise.
(ARM_CLEAR_FEATURE): Likewise.
(ARM_FEATURE): Likewise.
(ARM_FEATURE_COPY): New macro.
(ARM_FEATURE_EQUAL): Likewise.
(ARM_FEATURE_ZERO): Likewise.
(ARM_FEATURE_CORE_EQUAL): Likewise.
(ARM_FEATURE_LOW): Likewise.
(ARM_FEATURE_CORE_LOW): Likewise.
(ARM_FEATURE_CORE_COPROC): Likewise.
opcodes/ChangeLog:
2015-03-24 Terry Guo <terry.guo@arm.com>
* arm-dis.c (opcode32): Updated to use new arm feature struct.
(opcode16): Likewise.
(coprocessor_opcodes): Replace bit with feature struct.
(neon_opcodes): Likewise.
(arm_opcodes): Likewise.
(thumb_opcodes): Likewise.
(thumb32_opcodes): Likewise.
(print_insn_coprocessor): Likewise.
(print_insn_arm): Likewise.
(select_arm_features): Follow new feature struct.
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There is no performance advantage to use multi-byte nop instructions
greater than 10 bytes. This patch limits multi-byte nop instructions
to 10 bytes. Since there is only one way to encode multi-byte nop
instructions now, it also removed redundant nop tests.
gas/
* config/tc-i386.c (i386_align_code): Limit multi-byte nop
instructions to 10 bytes.
gas/testsuite/
* gas/i386/i386.exp: Don't run nops-1-bdver1, nops-1-bdver2,
nops-1-bdver3, nops-1-bdver4, nops-1-znver1, nops-1-btver1
nops-1-btver2, x86-64-nops-1-nocona, x86-64-nops-1-bdver1,
x86-64-nops-1-bdver2, x86-64-nops-1-bdver3, x86-64-nops-1-bdver4,
x86-64-nops-1-znver1, x86-64-nops-1-btver1 nor
x86-64-nops-1-btver2.
* gas/i386/nops-1-core2.d: Updated.
* gas/i386/nops-1-k8.d: Likewise.
* gas/i386/nops-4a-i686.d: Likewise.
* gas/i386/nops-5-i686.d: Likewise.
* gas/i386/nops-5.d: Likewise.
* gas/i386/nops-6.d: Likewise.
* gas/i386/x86-64-nops-1-core2.d: Likewise.
* gas/i386/x86-64-nops-1-g64.d: Likewise.
* gas/i386/x86-64-nops-1-k8.d: Likewise.
* gas/i386/x86-64-nops-1.d: Likewise.
* gas/i386/x86-64-nops-2.d: Likewise.
* gas/i386/x86-64-nops-3.d: Likewise.
* gas/i386/x86-64-nops-4-core2.d: Likewise.
* gas/i386/x86-64-nops-4-k8.d: Likewise.
* gas/i386/x86-64-nops-4.d: Likewise.
* gas/i386/x86-64-nops-5-k8.d: Likewise.
* gas/i386/x86-64-nops-5.d: Likewise.
* gas/i386/ilp32/x86-64-nops-1-core2.d: Likewise.
* gas/i386/ilp32/x86-64-nops-1-k8.d: Likewise.
* gas/i386/ilp32/x86-64-nops-1.d: Likewise.
* gas/i386/ilp32/x86-64-nops-2.d: Likewise.
* gas/i386/ilp32/x86-64-nops-3.d: Likewise.
* gas/i386/ilp32/x86-64-nops-4-core2.d: Likewise.
* gas/i386/ilp32/x86-64-nops-4-k8.d: Likewise.
* gas/i386/ilp32/x86-64-nops-4.d: Likewise.
* gas/i386/ilp32/x86-64-nops-5-k8.d: Likewise.
* gas/i386/ilp32/x86-64-nops-5.d: Likewise.
* gas/i386/nops-1-bdver1.d: Removed.
* gas/i386/nops-1-bdver2.d: Likewise.
* gas/i386/nops-1-bdver3.d: Likewise.
* gas/i386/nops-1-bdver4.d: Likewise.
* gas/i386/nops-1-btver1.d: Likewise.
* gas/i386/nops-1-btver2.d: Likewise.
* gas/i386/nops-1-znver1.d: Likewise.
* gas/i386/x86-64-nops-1-bdver1.d: Likewise.
* gas/i386/x86-64-nops-1-bdver2.d: Likewise.
* gas/i386/x86-64-nops-1-bdver3.d: Likewise.
* gas/i386/x86-64-nops-1-bdver4.d: Likewise.
* gas/i386/x86-64-nops-1-btver1.d: Likewise.
* gas/i386/x86-64-nops-1-btver2.d: Likewise.
* gas/i386/x86-64-nops-1-nocona.d: Likewise.
* gas/i386/x86-64-nops-1-znver1.d: Likewise.
* gas/i386/ilp32/x86-64-nops-1-nocona.d: Likewise.
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inc * rl78.h (E_FLAG_RL78_G10): Redefine.
(E_FLAG_RL78_CPU_MASK, E_FLAG_RL78_ANY_CPU, E_FLAG_RL78_G13
E_FLAG_RL78_G14): New flags.
bin * readelf.c (get_machine_flags): Decode RL78's G13 and G14 flags.
gas * config/tc-rl78.c (enum options): Add G13 and G14.
(md_longopts): Add -mg13 and -mg14.
(md_parse_option): Handle -mg13 and -mg14.
(md_show_usage): List -mg13 and -mg14.
* doc/c-rl78.texi: Add description of -mg13 and -mg14 options.
bfd * elf32-rl78.c (rl78_cpu_name): New function. Prints the name of
the RL78 core based upon the flags.
(rl78_elf_merge_private_bfd_data): Handle merging of G13 and G14
flags.
(rl78_elf_print_private_bfd_data): Use rl78_cpu_name.
(elf32_rl78_machine): Always return bfd_mach_rl78.
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is not available.
PR gas/18087
gas/test * gas/i386/dw2-compress-1.d: Allow the test to pass regardless of
whether the .debug_info section was compressed on not.
bfd * compress.c (bfd_compress_section_contents): Do not define this
function if it is not used.
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PR gas/18087
* gas/i386/dw2-compress-1.d: Revert the last change.
* gas/i386/dw2-compress-3.d: New.
* gas/i386/dw2-compress-3.s: Likewise.
* gas/i386/i386.exp: Run dw2-compress-3 for ELF targets.
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the section smaller.
PR binutils/18087
gas * doc/as.texinfo: Note that when gas compresses debug sections the
compression is only performed if it makes the section smaller.
* write.c (compress_debug): Do not compress a debug section if
doing so would make it larger.
tests * gas/i386/dw2-compress-1.d: Do not expect the .debug_abbrev or
.debug_info sections to be compressed.
binu * doc/binutils.texi: Note that when objcopy compresses debug
sections the compression is only performed if it makes the section
smaller.
bfd * coffgen.c (make_a_section_from_file): Only prepend a z to a
debug section's name if the section was actually compressed.
* elf.c (_bfd_elf_make_section_from_shdr): Likewise.
* compress.c (bfd_init_section_compress_status): Do not compress
the section if doing so would make it bigger. In such cases leave
the section alone and return COMPRESS_SECTION_NONE.
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* dwarf2dbg.c (out_header): Remove spurious #if 1.
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opcodes/
* mips-opc.c (decode_mips_operand): Fix constraint issues
with u and y operands.
gas/testsuite/
* gas/mips/mips.exp: Added branch constraints testcase.
* gas/mips/r6-branch-constraints.s: New test.
* gas/mips/r6-branch-constraints.l: New test.
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opcodes/
* mips-opc.c (mips_builtin_opcodes): Add evp and dvp instructions.
gas/testsuite/
* gas/mips/r6.s: Add evp and dvp instructions.
* gas/mips/r6.d: Likewise.
* gas/mips/r6-n32.d: Likewise.
* gas/mips/r6-n64.d: Likewise.
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2015-03-13 Jiong Wang <jiong.wang@arm.com>
gas/
* config/tc-aarch64.c (warn_unpredictable_ldst): Don't warn on reg number 31.
gas/testsuite/
* gas/aarch64/diagnostic.s: New testcases.
* gas/aarch64/diagnostic.l: New error match.
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2015-03-13 Jiong Wang <jiong.wang@arm.com>
gas/
* config/tc-aarch64.h (SUB_SEGMENT_ALIGN): Define to be zero.
gas/testsuite/
* gas/aarch64/tail_padding.s: New testcase.
* gas/aarch64/tail_padding.d: New expectation file.
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gas/
* config/tc-mips.c (mips_cpu_info_table): Add i6400 entry.
* doc/c-mips.texi: Document i6400 -march option.
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defined in other sections.
PR gas/17444
* config/tc-arm.h (MD_APPLY_SYM_VALUE): Pass the current segment
to arm_apply_sym_value. Update prototype.
* config/tc-arm.c (arm_apply_sym_value): Add segment argument.
Do not apply the value if the symbol is in a different segment to
the current segment.
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* config/tc-ppc.c (md_assemble): Don't abort on 8 byte insn fixups.
(md_apply_fix): Report an error on data-only fixups used with insns.
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opcodes/
2015-03-10 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* s390-opc.c: Add new IBM z13 instructions.
* s390-opc.txt: Likewise.
gas/testsuite/
2015-03-10 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* gas/s390/zarch-z13.d: Add more z13 instructions.
* gas/s390/zarch-z13.s: Likewise.
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gas/
2015-03-10 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* gas/config/tc-s390.c (md_gather_operands): Check for valid
length field operands.
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* config/tc-arm.c (parse_operands): Fix bug setting writeback
values for '^' on OP_REGLSTs.
(do_push_pop): Add new writeback constraint.
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gas/
2015-03-10 Renlin Li <renlin.li@arm.com>
* config/tc-arm.c (mapping_state): Remove first MAP_DATA emitting code.
(mapping_state_2): Emit first MAP_DATA symbol here.
gas/testsuite/
2015-03-05 Renlin Li <renlin.li@arm.com>
* gas/arm/dis-data.d: Adjust the desired output.
* gas/arm/dis-data2.d: Ditto.
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opcodes/ChangeLog:
2015-03-10 Renlin Li <renlin.li@arm.com>
* aarch64-tbl.h (aarch64_opcode_table): Remove strub, ldurb, ldursb,
stur, ldur, sturh, ldurh, ldursh, ldursw, prfum F_HAS_ALIAS flag and
related alias.
* aarch64-asm-2.c: Regenerate.
* aarch64-dis-2.c: Likewise.
* aarch64-opc-2.c: Likewise.
gas/testsuite/ChangeLog:
2015-03-10 Renlin Li <renlin.li@arm.com>
* gas/aarch64/ldst-reg-uns-imm.d: Adjust expected output.
* gas/aarch64/ldst-reg-unscaled-imm.d: Likewise.
* gas/aarch64/reloc-insn.d: Likewise.
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gas/
2015-03-10 Matthew Wahab <matthew.wahab@arm.com>
* config/tc-aarch64.c (mapping_state): Set minimum alignment for
code sections.
gas/testsuite
2015-03-10 Matthew Wahab <matthew.wahab@arm.com>
* gas/aarch64/codealign.d: Add test for code section alignment.
* gas/aarch64/codealign.s: New file.
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CPU_DEFAULT set.
PR gas/17852
* config/tc-arm.c (md_begin): Ensure that selected_cpu is
initialised when CPU_DEFAULT is defined.
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-m4byte-align command line options.
* config/tc-v850.c (md_parse_option): Fix code to set or clear
EF_RH850_DATA_ALIGN8 bit in ELF header, based upon the use of the
-m8byte-align and -m4byte-align command line options.
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bfd/
PR gas/17843
* elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Expect
R_AARCH64_TLSLE_MOVW_TPREL_G0_NC and R_AARCH64_TLSLE_MOVW_TPREL_G1_NC
to be used with MOVK rather than MOVZ.
gas/
PR gas/17843
* config/tc-aarch64.c (process_movw_reloc_info): Allow
R_AARCH64_TLSLE_MOVW_TPREL_G0_NC and R_AARCH64_TLSLE_MOVW_TPREL_G1_NC
for MOVK.
gas/testsuite/
PR gas/17843
* gas/aarch64/tls.s, gas/aarch64/tls.d: Add test for
R_AARCH64_TLSLE_MOVW_TPREL_G0/R_AARCH64_TLSLE_MOVW_TPREL_G1_NC
sequence.
ld/testsuite/
PR gas/17843
* ld-aarch64/tlsle.s, ld-aarch64/tlsle.d: New test.
* ld-aarch64/aarch64-elf.exp: Run it.
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gas/
* write.c (SUB_SEGMENT_ALIGN): Don't pad non-code sections at
end to their alignment.
gas/testsuite/
* gas/sparc/pcrel.d: Update for changed padding in data sections.
* gas/sparc/pcrel64.d: Likewise.
ld/testsuite/
* ld-sparc/gotop32.rd: Update for changed padding in data sections.
* ld-sparc/gotop32.td: Likewise.
* ld-sparc/gotop64.rd: Likewise.
* ld-sparc/gotop64.td: Likewise.
* ld-tilegx/external.s: Align .data.
* ld-tilepro/external.s: Likewise.
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Extend the address modifier parsing to distinguish between the
modifers used in LDR literal and LDR register offset address modes.
The current parser incorrectly accepts the :got: modifier on a
register offset instruction resulting in silent corruption of the
output binary.
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The :got: modifier is not meaningful in a register offset load store
instruction and should result in a diagnostic.
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The current implementation of the :got: assembler modifier does not
distinguish the ADR and ADRP instruction. The :got: modifier does not
make sense on and ADR instruction and should be error'd rather than
the current behavior of applying an inappropriate relocation to the
output and scrambling the underlying instruction silently.
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The modifier :got: does not make sense on an ADR instruction. Add a
test case to ensure we gripe.
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Updated how we merge and display this attribute per the latest
EABI documents.
bfd/ChangeLog
* elf32-arm.c (elf32_arm_merge_eabi_attributes): Update how we
merge Tag_ABI_HardFP_use.
binutils/ChangeLog
* readelf.c (arm_attr_tag_ABI_HardFP_use): Update how we
display it.
ld/testsuite/ChangeLog
* ld-arm/attr-merge-3.attr: Remove Tag_ABI_HardFP_use.
* ld-arm/attr-merge-vfp-10.d: Likewise.
* ld-arm/attr-merge-vfp-10r.d: Likewise.
* ld-arm/attr-merge-vfp-12.d: Likewise.
* ld-arm/attr-merge-vfp-12r.d: Likewise.
* ld-arm/attr-merge-vfp-13.d: Likewise.
* ld-arm/attr-merge-vfp-13r.d: Likewise.
* ld-arm/attr-merge-vfp-14.d: Likewise.
* ld-arm/attr-merge-vfp-14r.d: Likewise.
* ld-arm/attr-merge-vfp-6.d: Likewise.
* ld-arm/attr-merge-vfp-6r.d: Likewise.
* ld-arm/attr-merge-vfp-7.d: Likewise.
* ld-arm/attr-merge-vfp-7r.d: Likewise.
* ld-arm/attr-merge-vfp-8.d: Likewise.
* ld-arm/attr-merge-vfp-8r.d: Likewise.
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Add support to objdump for dumping the .avr.prop section in a structured
way.
binutils/ChangeLog:
* od-elf32_avr.c: Add elf32-avr.h include.
(OPT_AVRPROP): Define.
(options[]): Add 'avr-prop' entry.
(elf32_avr_help): Add avr-prop help text.
(elf32_avr_dump_avr_prop): New function.
(elf32_avr_dump): Add check for avr-prop.
bfd/ChangeLog:
* elf32-avr.h (struct avr_property_header): New strucure.
(avr_elf32_load_property_records): Declare.
(avr_elf32_property_record_name): Declare.
* elf32-avr.c: Add bfd_stdint.h include.
(retrieve_local_syms): New function.
(get_elf_r_symndx_section): New function.
(get_elf_r_symndx_offset): New function.
(internal_reloc_compare): New function.
(struct avr_find_section_data): New structure.
(avr_is_section_for_address): New function.
(avr_find_section_for_address): New function.
(avr_elf32_load_records_from_section): New function.
(avr_elf32_load_property_records): New function.
(avr_elf32_property_record_name): New function.
gas/testsuite/ChangeLog:
* gas/avr/avr-prop-1.d: New file.
* gas/avr/avr-prop-1.s: New file.
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Adds support to the assembler to write out data for tracking the use of
.org and .align directives. This data is collected within the assembler
and written out to a section ".avr.prop" (if there's anything to write
out).
This patch does not add any tests. The next patch in this series will
add a better mechanism for visualising the contents of .avr.prop which
will make writing tests much easier.
This patch also does not make any use of this collected data, that will
also come along in a later patch; the intended consumer is the linker,
during linker relaxation this information will be used to ensure that
the .org and .align directives are honoured.
bfd/ChangeLog:
* elf32-avr.h (AVR_PROPERTY_RECORD_SECTION_NAME): Define.
(AVR_PROPERTY_RECORDS_VERSION): Define.
(AVR_PROPERTY_SECTION_HEADER_SIZE): Define.
(struct avr_property_record): New structure.
gas/ChangeLog:
* config/tc-avr.c: Add elf32-avr.h include.
(struct avr_property_record_link): New structure.
(avr_output_property_section_header): New function.
(avr_record_size): New function.
(avr_output_property_record): New function.
(avr_create_property_section): New function.
(avr_handle_align): New function.
(exclude_section_from_property_tables): New function.
(create_record_for_frag): New function.
(append_records_for_section): New function.
(avr_create_and_fill_property_section): New function.
(avr_post_relax_hook): New function.
* config/tc-avr.h (md_post_relax_hook): Define.
(avr_post_relax_hook): Declare.
(HANDLE_ALIGN): Define.
(avr_handle_align): Declare.
(strut avr_frag_data): New structure.
(TC_FRAG_TYPE): Define.
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