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2006-03-172006-03-17 Paul Brook <paul@codesourcery.com>Paul Brook5-0/+32
gas/ * config/tc-arm.c (insns): Add ldm and stm. gas/testsuite/ * gas/arm/thumb32.d: Add ldm and stm tests. * gas/arm/thumb32.s: Ditto.
2006-03-17 PR gas/2446Ben Elliston2-4/+13
* doc/as.texinfo (Ident): Document this directive more thoroughly.
2006-03-16 * gas/bfin/shift2.s: Add new tests.Bernd Schmidt5-60/+128
* gas/bfin/shift.d: Match changed disassembler behaviour. * gas/bfin/parallel2.d: Likewise. * gas/bfin/shift2.d: Likewise; also match new tests.
2006-03-162006-03-16 Paul Brook <paul@codesourcery.com>Paul Brook9-7/+49
gas/ * config/tc-arm.c (insns): Add "svc". gas/testsuite/ * gas/arm/svc.d: New test. * gas/arm/svc.s: New test. * gas/arm/inst.d: Accept svc mnemonic. * gas/arm/thumb.d: Ditto. * gas/arm/wince_inst.d: Ditto. opcodes/ * arm-dis.c (arm_opcodes): Rename swi to svc. (thumb_opcodes): Ditto.
2006-03-13 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbarBob Wilson2-7/+7
flag and avoid double underscore prefixes.
2006-03-102006-03-10 Paul Brook <paul@codesourcery.com>Paul Brook3-3/+12
bfd/ * elf32-arm.c (INTERWORK_FLAG): Handle EABIv5. (elf32_arm_print_private_bfd_data): Ditto. binutils/ * readelf.c (decode_ARM_machine_flags): Handle EABIv5. gas/ * config/tc-arm.c (md_begin): Handle EABIv5. (arm_eabis): Add EF_ARM_EABI_VER5. * doc/c-arm.texi: Document -meabi=5. include/elf/ * arm.h (EF_ARM_EABI_VER5): Define.
2006-03-10 * app.c (do_scrub_chars): Simplify string handling.Ben Elliston2-20/+7
2006-03-092006-03-09 Paul Brook <paul@codesourcery.com>Paul Brook3-0/+32
bfd/ * cpu-arm.c (bfd_is_arm_mapping_symbol_name): Recognise additional mapping symbols. gas/testsuite/ * gas/arm/nomapping.d: New test. * gas/arm/nomapping.s: New test.
2006-03-07gas/testsuite/H.J. Lu12-4/+301
2006-03-07 H.J. Lu <hongjiu.lu@intel.com> PR binutils/2428 * gas/i386/i386.exp: Add rep, rep-suffix, x86-64-rep and x86-64-rep-suffix. * gas/i386/naked.d: Replace repz with rep. * gas/i386/x86_64.d: Likewise. * gas/i386/rep-suffix.d: New file. * gas/i386/rep-suffix.s: Likewise. * gas/i386/rep.d: Likewise. * gas/i386/rep.s: Likewise. * gas/i386/x86-64-rep-suffix.d: Likewise. * gas/i386/x86-64-rep-suffix.s: Likewise. * gas/i386/x86-64-rep.d: Likewise. * gas/i386/x86-64-rep.s: Likewise. opcodes/ 2006-03-07 H.J. Lu <hongjiu.lu@intel.com> PR binutils/2428 * i386-dis.c (REP_Fixup): New function. (AL): Remove duplicate. (Xbr): New. (Xvr): Likewise. (Ybr): Likewise. (Yvr): Likewise. (indirDXr): Likewise. (ALr): Likewise. (eAXr): Likewise. (dis386): Updated entries of ins, outs, movs, lods and stos.
2006-03-07bfd/Richard Sandiford8-17/+101
* configure.in (bfd_elf32_bigarm_vec): Include elf-vxworks.lo. (bfd_elf32_bigarm_symbian_vec): Likewise. (bfd_elf32_bigarm_vxworks_vec): Likewise. (bfd_elf32_littlearm_vec): Likewise. (bfd_elf32_littlearm_symbian_vec): Likewise. (bfd_elf32_littlearm_vxworks_vec): Likewise. * configure: Regenerate. * elf32-arm.c: Include libiberty.h and elf-vxworks.h. (RELOC_SECTION, RELOC_SIZE, SWAP_RELOC_IN, SWAP_RELOC_OUT): New macros. (elf32_arm_vxworks_bed): Add forward declaration. (elf32_arm_howto_table_1): Fix the masks for R_ASM_ABS12. (elf32_arm_vxworks_exec_plt0_entry): New table. (elf32_arm_vxworks_exec_plt_entry): Likewise. (elf32_arm_vxworks_shared_plt_entry): Likewise. (elf32_arm_link_hash_table): Add vxworks_p and srelplt2 fields. (reloc_section_p): New function. (create_got_section): Use RELOC_SECTION. (elf32_arm_create_dynamic_sections): Likewise. Call elf_vxworks_create_dynamic_sections for VxWorks targets. Choose between the two possible values of plt_header_size and plt_entry_size. (elf32_arm_link_hash_table_create): Initialize vxworks_p and srelplt2. (elf32_arm_abs12_reloc): New function. (elf32_arm_final_link_relocate): Call it. Allow the creation of dynamic R_ARM_ABS12 relocs on VxWorks. Use reloc_section_p, RELOC_SIZE, SWAP_RELOC_OUT and RELOC_SECTION. Initialize the r_addend fields of relocs. On rela targets, skip any code that adjusts in-place addends. When using _bfd_link_final_relocate to perform a final relocation, pass rel->r_addend as the addend argument. (elf32_arm_merge_private_bfd_data): If one of the bfds is a VxWorks object, ignore flags that are not standard on VxWorks. (elf32_arm_check_relocs): Allow the creation of dynamic R_ARM_ABS12 relocs on VxWorks. Use reloc_section_p. (elf32_arm_adjust_dynamic_symbol): Use RELOC_SECTION and RELOC_SIZE. (allocate_dynrelocs): Use RELOC_SIZE. Account for the size of .rela.plt.unloaded relocs on VxWorks targets. (elf32_arm_size_dynamic_sections): Use RELOC_SIZE. Check for .rela.plt.unloaded as well as .rel(a).plt. Add DT_RELA* tags instead of DT_REL* tags on RELA targets. (elf32_arm_finish_dynamic_symbol): Use RELOC_SECTION, RELOC_SIZE and SWAP_RELOC_OUT. Initialize r_addend fields. Handle VxWorks PLT entries. Do not make _GLOBAL_OFFSET_TABLE_ absolute on VxWorks. (elf32_arm_finish_dynamic_sections): Use RELOC_SECTION, RELOC_SIZE and SWAP_RELOC_OUT. Initialize r_addend fields. Handle DT_RELASZ like DT_RELSZ. Handle the VxWorks form of initial PLT entry. Correct the .rela.plt.unreloaded symbol indexes. (elf32_arm_output_symbol_hook): Call the VxWorks version of this hook on VxWorks targets. (elf32_arm_vxworks_link_hash_table_create): Set vxworks_p to true. Minor formatting tweak. (elf32_arm_vxworks_final_write_processing): New function. (elf_backend_add_symbol_hook): Override for VxWorks and reset for Symbian. (elf_backend_final_write_processing): Likewise. (elf_backend_emit_relocs): Likewise. (elf_backend_want_plt_sym): Likewise. (ELF_MAXPAGESIZE): Likewise. (elf_backend_may_use_rel_p): Minor formatting tweak. (elf_backend_may_use_rela_p): Likewise. (elf_backend_default_use_rela_p): Likewise. (elf_backend_rela_normal): Likewise. * Makefile.in (elf32-arm.lo): Depend on elf-vxworks.h. gas/ * config/tc-arm.c (md_apply_fix): Install a value of zero into a BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA R_ARM_ABS12 reloc. (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets. gas/testsuite/ * gas/arm/abs12.s, gas/arm/abs12.d: New test. * gas/arm/pic.d: Skip for *-*-vxworks*... * gas/arm/pic_vxworks.d: ...use this version instead. * gas/arm/unwind_vxworks.d: Fix expected output. ld/ * emulparams/armelf_vxworks.sh: Include vxworks.sh. (MAXPAGESIZE): Define. * emulparams/vxworks.sh: Undefine. * Makefile.am (earmelf_vxworks.c): Depend on vxworks.sh and vxworks.em. * Makefile.in: Regenerate. ld/testsuite/ * ld-arm/vxworks1.dd, ld-arm/vxworks1.ld, ld-arm/vxworks1-lib.dd, * ld-arm/vxworks1-lib.nd, ld-arm/vxworks1-lib.rd, * ld-arm/vxworks1-lib.s, ld-arm/vxworks1.rd, ld-arm/vxworks1.s, * ld-arm/vxworks1-static.d, ld-arm/vxworks2.s, ld-arm/vxworks2.sd, * ld-arm/vxworks2-static.sd: New tests. * ld-arm/arm-elf.exp: Run them.
2006-03-06 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tablesBob Wilson2-5/+9
even when using the text-section-literals option.
2006-03-06 bfd:Nathan Sidwell5-59/+126
* archures.c (bfd_mach_mcf_isa_a_nodiv, bfd_mach_mcf_isa_b_nousp): New. Adjust other variants. (bfd_default_scan): Update. * bfd-in2.h: Rebuilt. * cpu-m68k.c: Adjust. (bfd_m68k_compatible): New. Use it for architectures. * elf32-m68k.c (elf32_m68k_object_p): Adjust. (elf32_m68k_merge_private_bfd_data): Adjust. Correct isa-a/b mismatch. (elf32_m68k_print_private_bfd_data): Adjust. * ieee.c (ieee_write_processor): Adjust. binutils: * readelf.c (get_machine_flags): Adjust. gas: * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k and cf. (m68k_ip): <case 'J'> Check we have some control regs. (md_parse_option): Allow raw arch switch. (m68k_init_arch): Better detection of arch/cpu mismatch. Detect whether 68881 or cfloat was meant by -mfloat. (md_show_usage): Adjust extension display. (m68k_elf_final_processing): Adjust. gas/testsuite: * gas/m68k/arch-cpu-1.s: Tweak. * gas/m68k/arch-cpu-1.d: Tweak. include/elf: * m68k.h (EF_M68K_ISA_MASK, EF_M68K_ISA_A, EF_M68K_ISA_A_PLUS, EF_M68K_ISA_B, EF_M68K_ISA_C): Adjust. (EF_M68K_ISA_A_NODIV, EF_M68K_ISA_B_NOUSP): New. (EF_M68K_HW_DIV, EF_M68K_USP): Remove. (EF_M68K_MAC, EF_M68K_EMAC, EF_M68K_FLOAT): Adjust. (EF_M68K_EMAC_B): New. ld/testsuite: * ld-m68k: New tests.
2006-03-03Add linker relaxation support for the AVRNick Clifton2-12/+43
2006-03-03Fix problem with double-stop-bit after itc.i instruction.Jim Wilson2-0/+9
* config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we change the template, then clear md.slot[curr].end_of_insn_group.
2006-02-28gas/Jan Beulich5-6/+14
2006-02-28 Jan Beulich <jbeulich@novell.com> * macro.c (get_any_string): Don't insert quotes for <>-quoted input. gas/testsuite/ 2006-02-28 Jan Beulich <jbeulich@novell.com> * gas/all/altmacro.s: Adjust. * gas/all/altmac2.s: Adjust.
2006-02-28gas/Jan Beulich6-37/+80
2006-02-28 Jan Beulich <jbeulich@novell.com> PR/1070 * macro.c (getstring): Don't treat parentheses special anymore. (get_any_string): Don't consider '(' and ')' as quoting anymore. Special-case '(', ')', '[', and ']' when dealing with non-quoting characters. gas/testsuite/ 2006-02-28 Jan Beulich <jbeulich@novell.com> * gas/macros/paren[sd]: New. * gas/macros/macros.exp: Run new test.
2006-02-28 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.Alan Modra2-2/+7
2006-02-27Fix up ChangeLog entry.Jakub Jelinek1-2/+2
2006-02-27bfd/Jakub Jelinek3-2/+29
* elf-eh-frame.c (_bfd_elf_discard_section_eh_frame): Handle S flag. (_bfd_elf_write_section_eh_frame): Likewise. gas/ * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame field. (CFI_signal_frame): Define. (cfi_pseudo_table): Add .cfi_signal_frame. (dot_cfi): Handle CFI_signal_frame. (output_cie): Handle cie->signal_frame. (select_cie_for_fde): Don't share CIE if signal_frame flag is different. Copy signal_frame from FDE to newly created CIE. * doc/as.texinfo: Document .cfi_signal_frame.
2006-02-27bfd/doc/Carlos O'Donell4-5/+11
2006-10-14 Carlos O'Donell <carlos@codesourcery.com> * Makefile.am: Add html target. * Makefile.in: Regenerate. bfd/ 2006-10-14 Carlos O'Donell <carlos@codesourcery.com> * po/Make-in: Add html target. binutils/ 2006-10-14 Carlos O'Donell <carlos@codesourcery.com> * po/Make-in: Add html target. gas/ 2006-10-14 Carlos O'Donell <carlos@codesourcery.com> * doc/Makefile.am: Add html target. * doc/Makefile.in: Regenerate. * po/Make-in: Add html target. gprof/ 2006-10-14 Carlos O'Donell <carlos@codesourcery.com> * po/Make-in: Add html target. ld/ 2006-10-14 Carlos O'Donell <carlos@codesourcery.com> * Makefile.am: Add html target. * Makefile.in: Regenerate. * po/Make-in: Add html target. opcodes/ 2006-10-14 Carlos O'Donell <carlos@codesourcery.com> * po/Make-in: Add html target. etc/ 2006-10-14 Carlos O'Donell <carlos@codesourcery.com> * Makefile.in: TEXI2HTML uses makeinfo. Define HTMLFILES. Add html targets. * configure.texi: Use ifnottex. Add alternative image format specifier as jpg. * standards.texi: Use ifnottex. intl/ 2006-10-14 Carlos O'Donell <carlos@codesourcery.com> * intl/Makefile.in: Add html target.
2006-02-27gas/H.J. Lu9-10/+330
2006-02-27 H.J. Lu <hongjiu.lu@intel.com> * gas/config/tc-i386.c (output_insn): Support Intel Merom New Instructions. * gas/config/tc-i386.h (CpuMNI): New. (CpuUnknownFlags): Add CpuMNI. gas/testsuite/ 2006-02-27 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/i386.exp: Add merom and x86-64-merom. * gas/i386/merom.d: New file. * gas/i386/merom.s: Likewise. * gas/i386/x86-64-merom.d: Likewise. * gas/i386/x86-64-merom.s: Likewise. include/opcode/ 2006-02-27 H.J. Lu <hongjiu.lu@intel.com> * i386.h (i386_optab): Support Intel Merom New Instructions. opcodes/ 2006-02-27 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (IS_3BYTE_OPCODE): New for 3-byte opcodes used by Intel Merom New Instructions. (THREE_BYTE_0): Likewise. (THREE_BYTE_1): Likewise. (three_byte_table): Likewise. (dis386_twobyte): Use THREE_BYTE_0 for entry 0x38. Use THREE_BYTE_1 for entry 0x3a. (twobyte_has_modrm): Updated. (twobyte_uses_SSE_prefix): Likewise. (print_insn): Handle 3-byte opcodes used by Intel Merom New Instructions.
2006-02-26missing from 2006-02-07 Nathan Sidwell <nathan@codesourcery.com> commitNathan Sidwell2-0/+15
2006-02-252006-02-24 David S. Miller <davem@sunset.davemloft.net>David S. Miller12-2/+90
* gas/sparc/rdhpr.s: New test. * gas/sparc/rdhpr.d: New test. * gas/sparc/wrhpr.s: New test. * gas/sparc/wrhpr.d: New test. * gas/sparc/window.s: New test. * gas/sparc/window.d: New test. * gas/sparc/rdpr.s: Add case for reading %gl register. * gas/sparc/rdpr.d: Likewise. * gas/sparc/wrpr.s: Add case for writing %gl register. * gas/sparc/wrpr.d: Likewise. * gas/sparc/sparc.exp: Update for new tests.
2006-02-252006-02-24 David S. Miller <davem@sunset.davemloft.net>David S. Miller2-1/+56
* config/tc-sparc.c (priv_reg_table): Add entry for "gl". (hpriv_reg_table): New table for hyperprivileged registers. (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged register encoding.
2006-02-24[include/elf]DJ Delorie3-8/+217
* m32c.h: Add relax relocs. [cpu] * m32c.cpu (RL_TYPE): New attribute, with macros. (Lab-8-24): Add RELAX. (unary-insn-defn-g, binary-arith-imm-dst-defn, binary-arith-imm4-dst-defn): Add 1ADDR attribute. (binary-arith-src-dst-defn): Add 2ADDR attribute. (jcnd16-5, jcnd16, jcnd32, jmp16.s, jmp16.b, jmp16.w, jmp16.a, jmp32.s, jmp32.b, jmp32.w, jmp32.a, jsr16.w, jsr16.a): Add JUMP attribute. (jsri16, jsri32): Add 1ADDR attribute. (jsr32.w, jsr32.a): Add JUMP attribute. [opcodes] * m32c-desc.c: Regenerate with linker relaxation attributes. * m32c-desc.h: Likewise. * m32c-dis.c: Likewise. * m32c-opc.c: Likewise. [gas] * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix. (tc_gen_reloc): Don't define. * config/tc-m32c.c (rl_for, relaxable): New convenience macros. (OPTION_LINKRELAX): New. (md_longopts): Add it. (m32c_relax): New. (md_parse_options): Set it. (md_assemble): Emit relaxation relocs as needed. (md_convert_frag): Emit relaxation relocs as needed. (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16. (m32c_apply_fix): New. (tc_gen_reloc): New. (m32c_force_relocation): Force out jump relocs when relaxing. (m32c_fix_adjustable): Return false if relaxing. [bfd] * elf32-m32c.c (m32c_elf_howto_table): Add relaxation relocs. (m32c_elf_relocate_section): Don't relocate them. (compare_reloc): New. (relax_reloc): Remove. (m32c_offset_for_reloc): New. (m16c_addr_encodings): New. (m16c_jmpaddr_encodings): New. (m32c_addr_encodings): New. (m32c_elf_relax_section): Relax jumps and address displacements. (m32c_elf_relax_delete_bytes): Adjust for internal syms. Fix up short jumps. * reloc.c: Add m32c relax relocs. * libbfd.h: Regenerate.
2006-02-24Check in correct version of previous patch.Paul Brook1-5/+5
2006-02-242006-02-24 Paul Brook <paul@codesourcery.com>Paul Brook10-57/+513
gas/ * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7, arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables. (struct asm_barrier_opt): Define. (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables. (parse_psr): Accept V7M psr names. (parse_barrier): New function. (enum operand_parse_code): Add OP_oBARRIER. (parse_operands): Implement OP_oBARRIER. (do_barrier): New function. (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions. (do_t_cpsi): Add V7M restrictions. (do_t_mrs, do_t_msr): Validate V7M variants. (md_assemble): Check for NULL variants. (v7m_psrs, barrier_opt_names): New tables. (insns): Add V7 instructions. Mark V6 instructions absent from V7M. (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh. (arm_cpu_option_table): Add Cortex-M3, R4 and A8. (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m. (struct cpu_arch_ver_table): Define. (cpu_arch_ver): New. (aeabi_set_public_attributes): Use cpu_arch_ver. Set Tag_CPU_arch_profile. * doc/c-arm.texi: Document new cpu and arch options. gas/testsuite/ * gas/arm/thumb32.d: Fix expected msr and mrs output. * gas/arm/arch7.d: New test. * gas/arm/arch7.s: New test. * gas/arm/arch7m-bad.l: New test. * gas/arm/arch7m-bad.d: New test. * gas/arm/arch7m-bad.s: New test. include/opcode/ * arm.h: Add V7 feature bits. opcodes/ * arm-dis.c (arm_opcodes): Add V7 instructions. (thumb32_opcodes): Ditto. Handle V7M MSR/MRS variants. (print_arm_address): New function. (print_insn_arm): Use it. Add 'P' and 'U' cases. (psr_name): New function. (print_insn_thumb32): Add 'U', 'C' and 'D' cases.
2006-02-23bfd/H.J. Lu7-3/+115
2006-02-23 H.J. Lu <hongjiu.lu@intel.com> * cpu-ia64-opc.c (ins_immu5b): New. (ext_immu5b): Likewise. (elf64_ia64_operands): Add IMMU5b. gas/ 2006-02-23 H.J. Lu <hongjiu.lu@intel.com> * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b. gas/testsuite/ 2006-02-23 H.J. Lu <hongjiu.lu@intel.com> * gas/ia64/opc-i.s: Add tests for tf. * gas/ia64/pseudo.s: Likewise. * gas/ia64/opc-i.d: Updated. * gas/ia64/pseudo.d: Likewise. include/opcode/ 2006-02-23 H.J. Lu <hongjiu.lu@intel.com> * ia64.h (ia64_opnd): Add IA64_OPND_IMMU5b. opcodes/ 2006-02-23 H.J. Lu <hongjiu.lu@intel.com> * ia64-opc-i.c (bXc): New. (mXc): Likewise. (OpX2TaTbYaXcC): Likewise. (TF). Likewise. (TFCM). Likewise. (ia64_opcodes_i): Add instructions for tf. * ia64-opc.h (IMMU5b): New. * ia64-asmtab.c: Regenerated.
2006-02-23Update copyright years.H.J. Lu2-1/+5
2006-02-23gas/H.J. Lu7-5/+33
2006-02-22 H.J. Lu <hongjiu.lu@intel.com> * config/tc-ia64.c (specify_resource): Add the rule 17 from SDM 2.2. gas/testsuite/ 2006-02-22 H.J. Lu <hongjiu.lu@intel.com> * gas/ia64/dv-raw-err.s: Add check for vmsw.0. * gas/ia64/dv-raw-err.l: Updated. * gas/ia64/opc-b.s: Add vmsw.0 and vmsw.1. * gas/ia64/opc-b.d: Updated. opcodes/ 2006-02-22 H.J. Lu <hongjiu.lu@intel.com> * ia64-gen.c (lookup_regindex): Handle ".vm". (print_dependency_table): Handle '\"'. * ia64-ic.tbl: Updated from SDM 2.2. * ia64-raw.tbl: Likewise. * ia64-waw.tbl: Likewise. * ia64-asmtab.c: Regenerated. * ia64-opc-b.c (ia64_opcodes_b): Add vmsw.0 and vmsw.1.
2006-02-222005-02-22 Paul Brook <paul@codesourcery.com>Paul Brook4-5/+14
gas/ * config/tc-arm.c (do_pld): Remove incorrect write to inst.instruction. (encode_thumb32_addr_mode): Use correct operand. gas/testsuite/ * gas/arm/thumb32.d: Fix expected pld opcode.
2006-02-212006-02-21 Paul Brook <paul@codesourcery.com>Paul Brook2-4/+8
* config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
2006-02-17Add support for the Infineon XC16X.Nick Clifton58-11/+2898
2006-02-16 bfd:Nick Hudson2-1/+5
* config.bfd (mips*el-*-netbsd*, mips*-*-netbsd*): Use traditional MIPS ELF targets. gas: * configure.tgt: set emulation for mips-*-netbsd* ld: * configure.tgt (mips*el-*-netbsd*, mips*-*-netbsd*): Use the traditional target.
2006-02-14gas/Jakub Jelinek2-0/+8
* config.in: Rebuilt. binutils/ * config.in: Rebuilt.
2006-02-14 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands startingBob Wilson2-21/+16
from 1, not 0, in error messages. (md_assemble): Simplify special-case check for ENTRY instructions. (tinsn_has_invalid_symbolic_operands): Do not include opcode and operand in error message.
2006-02-13gas:Joseph Myers2-1/+6
* configure.tgt (arm-*-linux-gnueabi*): Change to arm-*-linux-*eabi*. ld: * configure.tgt (arm*b-*-linux-gnueabi): Change to arm*b-*-linux-*eabi. (arm*-*-linux-gnueabi): Change to arm*-*-linux-*eabi.
2006-02-122006-02-12 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu2-0/+5
* gas/i386/x86-64-crx-suffix.d: Undo the last change.
2006-02-11gas/testsuite/H.J. Lu6-1/+71
2006-02-11 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/i386.exp: Add "x86-64-drx" and "x86-64-drx-suffix". * gas/i386/x86-64-crx-suffix.d: Minor update. * gas/i386/x86-64-drx-suffix.d: New file. * gas/i386/x86-64-drx.d: Likewise. * gas/i386/x86-64-drx.s: Likewise. opcodes/ 2006-02-11 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (dis386_twobyte): Use "movZ" for debug register moves.
2006-02-11gas/testsuite/H.J. Lu5-0/+70
2006-02-11 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/i386.exp: Add "x86-64-crx" and "x86-64-crx-suffix". * gas/i386/x86-64-crx-suffix.d: New file. * gas/i386/x86-64-crx.d: Likewise. * gas/i386/x86-64-crx.s: Likewise. opcodes/ 2006-02-11 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c ('Z'): Add a new macro. (dis386_twobyte): Use "movZ" for control register moves.
2006-02-10(check_range): Ensure that the sign bit of a 32-bit value is propagated intoNick Clifton2-0/+9
the upper bits of a 64-bit long.
2006-02-10Fix casts to allow for a 64-bit host.Nick Clifton2-7/+13
2006-02-10 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken forBob Wilson2-1/+6
each relaxation step.
2006-02-09Add missing ChangeLog entries.H.J. Lu1-0/+10
2006-02-092006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>Eric Botcazou4-35/+113
* configure.in (CHECK_DECLS): Add vsnprintf. * configure: Regenerate. * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not include/declare here, but... * as.h: Move code detecting VARARGS idiom to the top. (errno.h, stdarg.h, varargs.h, va_list): ...here. (vsnprintf): Declare if not already declared.
2006-02-092006-02-08 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu2-4/+19
* as.c (close_output_file): New. (main): Register close_output_file with xatexit before dump_statistics. Don't call output_file_close.
2006-02-07 * bfd/archures.c (bfd_mach_mcf5200, bfd_mach_mcf5206e,Nathan Sidwell6-291/+655
bfd_mach_mcf5307, bfd_mach_mcf5407, bfd_mach_mcf528x, bfd_mach_mcfv4e, bfd_mach_mcf521x, bfd_mach_mcf5249, bfd_mach_mcf547x, bfd_mach_mcf548x): Remove. (bfd_mach_mcf_isa_a, bfd_mach_mcf_isa_a_div, bfd_mach_mcf_isa_a_div_mac, bfd_mach_mcf_isa_a_div_emac, bfd_mach_mcf_isa_aplus, bfd_mach_mcf_isa_aplus_mac, bfd_mach_mcf_isa_aplus_emac, bfd_mach_mcf_isa_aplus_usp, bfd_mach_mcf_isa_aplus_usp_mac, bfd_mach_mcf_isa_aplus_usp_emac, bfd_mach_mcf_isa_b, bfd_mach_mcf_isa_b_mac, bfd_mach_mcf_isa_b_emac, bfd_mach_mcf_isa_b_usp_float, bfd_mach_mcf_isa_b_usp_float_mac, bfd_mach_mcf_isa_b_usp_float_emac): New. (bfd_default_scan): Update coldfire mapping. * bfd/bfd-in.h (bfd_m68k_mach_to_features, bfd_m68k_features_to_mach): Declare. * bfd/bfd-in2.h: Rebuilt. * bfd/cpu-m68k.c (arch_info_struct): Add new coldfire machines, adjust legacy names. (m68k_arch_features): New. (bfd_m68k_mach_to_features, bfd_m68k_features_to_mach): Define. * bfd/elf32-m68k.c (elf32_m68k_object_p): New. (elf32_m68k_merge_private_bfd_data): Merge the CF EF flags. (elf32_m68k_print_private_bfd_data): Print the CF EF flags. (elf_backend_object_p): Define. * bfd/ieee.c (ieee_write_processor): Update coldfire machines. * bfd/libbfd.h: Rebuilt. * gas/config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs, mcf5329_control_regs): New. (not_current_architecture, selected_arch, selected_cpu): New. (m68k_archs, m68k_extensions): New. (archs): Renamed to ... (m68k_cpus): ... here. Adjust. (n_arches): Remove. (md_pseudo_table): Add arch and cpu directives. (find_cf_chip, m68k_ip): Adjust table scanning. (no_68851, no_68881): Remove. (md_assemble): Lazily initialize. (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329. (md_init_after_args): Move functionality to m68k_init_arch. (mri_chip): Adjust table scanning. (md_parse_option): Reimplement 'm' processing to add -march & -mcpu options with saner parsing. (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension, m68k_init_arch): New. (s_m68k_cpu, s_m68k_arch): New. (md_show_usage): Adjust. (m68k_elf_final_processing): Set CF EF flags. * gas/config/tc-m68k.h (m68k_init_after_args): Remove. (tc_init_after_args): Remove. * gas/doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options. (M68k-Directives): Document .arch and .cpu directives. * gas/testsuite/gas/m68k/all.exp: Add arch-cpu-1 test. * gas/testsuite/gas/m68k/arch-cpu-1.[sd]: New. * include/elf/m68k.h (EF_CPU32, EF_M68000, EF_CFV4E): Rename to ... (EF_M68K_CPU32, EF_M68K_M68000, EF_M68K_CFV4E): ... here. (EF_M68K_ISA_MASK, EF_M68K_ISA_A, EF_M68K_M68K_ISA_A_PLUS, EF_M68K_ISA_B, EF_M68K_HW_DIV, EF_M68K_MAC_MASK, EF_M68K_MAC, EF_M68K_EMAC, EF_M68K_USP, EF_M68K_FLOAT): New. * include/opcode/m68k.h (m68008, m68ec030, m68882): Remove. (m68k_mask): New. (cpu_m68k, cpu_cf): New. (mcf5200, mcf5206e, mcf521x, mcf5249, mcf528x, mcf5307, mcf5407, mcf5470, mcf5480): Rename to cpu_<foo>. Add m680x0 variants. * opcodes/m68k-dis.c (print_insn_m68k): Use bfd_m68k_mach_to_features. * binutils/readelf.c (get_machine_flags): Add logic for EF_M68K flags.
2006-02-05Cleanup of pseudo-ops for constants and new def24,def32 pseudo-ops on z80Arnold Metselaar4-72/+135
2006-02-022006-02-02 Paul Brook <paul@codesourcery.com>Paul Brook2-2/+4
* config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
2006-02-022005-02-02 Paul Brook <paul@codesourcery.com>Paul Brook5-1/+139
gas/ * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND, T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR, T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB, T2_OPCODE_RSB): Define. (thumb32_negate_data_op): New function. (md_apply_fix): Use it. gas/testsuite/ * gas/arm/thumb2_invert.d: New test. * gas/arm/thumb2_invert.s: New test.
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