Age | Commit message (Collapse) | Author | Files | Lines |
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failures seen in output as fails. Also record output being
matched for fails.
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* gas/mips/eret-2.d: Likewise.
* gas/mips/eret-3.d: Likewise.
* gas/mips/eret-1.s: Reformat for readability. Add a label
at the beginning.
* gas/mips/eret-2.s: Add a label at the beginning.
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* gas/mips/eret-2.s: Likewise.
* gas/mips/eret-3.s: Likewise.
* gas/mips/eret-1.d: Adjust accordingly. Force a 32-bit ABI.
* gas/mips/eret-2.d: Likewise.
* gas/mips/eret-3.d: Likewise.
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* config/tc-ppc.c (md_show_usage): Document -mpcca2.
* doc/c-ppc.texi (PowerPC-Opts): Document -mppca2.
gas/testsuite/
* gas/ppc/a2.s: New.
* gas/ppc/a2.d: Likewise.
* gas/ppc/ppc.exp: Run the a2 dump test.
include/opcode/
* ppc.h (PPC_OPCODE_PPCA2): New.
opcodes/
* ppc-dis.c (ppc_opts): Add "ppca2" entry.
* ppc-opc.c (powerpc_opcodes): Add eratilx, eratsx, eratsx.,
eratre, wchkall, eratwe, ldawx., mdfcrx., mfdcr. mtdcrx., icswx,
icswx., mtdcr., dci, wclrone, wclrall, wclr, erativax, tlbsrx.,
ici mnemonics.
(ERAT_T): New operand.
(XWC_MASK): New mask.
(XOPL2): New macro.
(PPCA2): Define.
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* config/tc-i386.c (offset_in_range): Sign extend offset only
if BFD64 is defined.
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2009-09-15 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386-intel.c (i386_intel_operand): Initialize
intel_state.has_offset to 0.
gas/testsuite/
2009-09-15 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/disp.s: Add an offset test.
* gas/i386/x86-64-disp.s: Likewise.
* gas/i386/intelbad.s: Comment out "byte ptr [1]" test.
* gas/i386/disp.d: Updated.
* gas/i386/disp-intel.d: Likewise.
* gas/i386/intelbad.l: Likewise.
* gas/i386/x86-64-disp.d: Likewise.
* gas/i386/x86-64-disp-intel.d: Likewise.
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* config/tc-i386.c (offset_in_range): Sign extend offset only
for 32bit address mode.
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* makefile.vms (OBJS): Compile te-vms.c only on Itanium.
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2009-09-14 H.J. Lu <hongjiu.lu@intel.com>
PR gas/10637
* config/tc-i386-intel.c (intel_state): Add has_offset.
(i386_intel_simplify): Set intel_state.has_offset to 1 for
O_offset.
(i386_intel_operand): Turn on intel_state.is_mem if
intel_state.has_offset is 0 and the last char is ']'.
gas/testsuite/
2009-09-14 H.J. Lu <hongjiu.lu@intel.com>
PR gas/10637
* gas/i386/disp.s: Add tests for Intel syntax.
* gas/i386/x86-64-disp.s: Likewise.
* gas/i386/disp.d: Updated.
* gas/i386/intelok.d: Likewise.
* gas/i386/x86-64-disp.d: Likewise.
* gas/i386/disp-intel.d: New.
* gas/i386/x86-64-disp-intel.d: Likewise.
* gas/i386/i386.exp: Run disp-intel and x86-64-disp-intel.
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* gas/i386/merom.[ds]: Renamed to ...
* gas/i386/ssse3.[ds]: This.
* gas/i386/nops-1-merom.d: Renamed to ...
* gas/i386/nops-1-core2.d: This.
* gas/i386/nops-2-merom.d: Renamed to ...
* gas/i386/nops-2-core2.d: This.
* gas/i386/prescott.[ds]: Renamed to ...
* gas/i386/sse3.[ds]: This.
* gas/i386/x86-64-merom.[ds]: Renamed to ...
* gas/i386/x86-64-ssse3.[ds]: This.
* gas/i386/x86-64-nops-1-merom.d: Renamed to ...
* gas/i386/x86-64-nops-1-core2.d: This.
* gas/i386/x86-64-prescott.[ds]: Renamed to ...
* gas/i386/x86-64-sse3.[ds]: This.
* gas/i386/i386.exp: Updated.
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2009-09-14 H.J. Lu <hongjiu.lu@intel.com>
PR gas/10636
* config/tc-i386.c (optimize_disp): Set disp32 for 64bit only
if there is an ADDR_PREFIX.
(i386_finalize_displacement): Repor error if signed 32bit
displacement is out of range.
gas/testsuite/
2009-09-14 H.J. Lu <hongjiu.lu@intel.com>
PR gas/10636
* gas/i386/disp.d: New.
* gas/i386/disp.s: Likewise.
* gas/i386/x86-64-disp.d: Likewise.
* gas/i386/x86-64-disp.s: Likewise.
* gas/i386/i386.exp: Run disp and x86-64-disp.
* gas/i386/x86-64-addr32.s: Add high 32bit displacement tests.
* gas/i386/x86-64-addr32.d: Updated.
* gas/i386/x86-64-addr32-intel.d: Likewise.
* gas/i386/x86-64-inval.l: Likewise.
* gas/i386/x86-64-prescott.d: Likewise.
* gas/i386/x86-64-inval.s: Add invalid displacement tests.
* gas/i386/x86-64-prescott.s: Replace 0x90909090 displacement
with 0x909090.
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* config/tc-mips.c (MIPS_JALR_HINT_P): Take an expr argument.
Require the target to be a bare symbol on targets with
in-place addends.
(macro_build_jalr): Update accordingly.
(mips_fix_adjustable): Don't reduce R_MIPS_JALRs on targets
with in-place addends.
gas/testsuite/
* gas/mips/jalr2.s, gas/mips/jalr2.d: New test.
* gas/mips/jal-svr4pic.d: Don't expect R_MIPS_JALRs to be reduced.
* gas/mips/jal-xgot.d: Likewise.
* gas/mips/mips-abi32-pic2.d: Likewise.
* gas/mips/mips.exp: Run it.
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* gas/mips/mips16-dwarf2-n32.d: Expect odd addresses.
ld/testsuite/
* ld-mips-elf/eh-frame1-n32.d: Change "the section \.eh_frame"
to "the \.eh_frame section".
* ld-mips-elf/eh-frame1-n64.d: Likewise.
* ld-mips-elf/eh-frame2-n32.d: Likewise.
* ld-mips-elf/eh-frame2-n64.d: Likewise.
* ld-mips-elf/eh-frame3.d: Likewise.
* ld-mips-elf/eh-frame4.d: Likewise.
* ld-mips-elf/elf-rel-got-n32.d: Expect bals.
* ld-mips-elf/elf-rel-xgot-n32.d: Likewise.
* ld-mips-elf/mips-elf.exp: Force the MIPS16 PIC tests to use -mips1.
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* po/binutils.pot: Updated by the Translation project.
* po/gold.pot: Updated by the Translation project.
* po/gold.pot: Updated by the Translation project.
* po/gprof.pot: Updated by the Translation project.
* po/sv.po: Updated Swedish translation.
* po/ld.pot: Updated by the Translation project.
* po/fi.po: Updated Finnish translation.
* po/ld.pot: Updated by the Translation project.
* po/fi.po: Updated Finnish translation.
Updated sources to compile cleanly with -Wc++-compat:
* basic_blocks.c: Add casts.
* cg_dfn.c: Add cast.
* corefile.c: Add casts.
* gmon_io.c: Add casts.
* hist.c: Add cast.
* source.c: Add cast.
* sym_ids.c (struct match): Moved to top level.
Updated soruces in ld/* to compile cleanly with -Wc++-compat:
* ld.h (enum endian_enum,enum symbolic_enum,enum dynamic_list_enum): Move to top level.
* ldcref.c: Add casts.
* ldctor.c: Add casts.
* ldexp.c
* ldexp.h (enum node_tree_enum,enum phase_enum): Move to top level.
* ldlang.c: Add casts. (lang_insert_orphan): Use enum name instead of integer.
* ldlang.h (enum statement_enum): Move to top level.
* ldmain.c: Add casts.
* ldwrite.c: Add casts.
* lexsup.c: Add casts. (enum control_enum): Move to top level.
* mri.c: Add casts. (mri_draw_tree): Use enum name instead of integer.
Updated sources to compile cleanly with -Wc++-compat:
* basic_blocks.c: Add casts.
* cg_dfn.c: Add cast.
* corefile.c: Add casts.
* gmon_io.c: Add casts.
* hist.c: Add cast.
* source.c: Add cast.
* sym_ids.c (struct match): Moved to top level.
* as.c (main): Call dwarf2_init.
* config/obj-elf.c (struct group_list): New field.
(build_group_lists): Use hash lookup.
(free_section_idx): New function.
(elf_frob_file): Adjust.
* dwarf2dbg.c (all_segs_hash, last_seg_ptr): New variables.
(get_line_subseg): Adjust.
(dwarf2_init): New function.
* dwarf2dbg.h (dwarf2_init): New declaration.
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* gas/mmix/err-swym1.s, gas/mmix/swym-opreg1.d,
gas/mmix/swym-opreg1.s, gas/mmix/swym-opreg2.d,
gas/mmix/swym-opreg2.s: New tests.
* gas/mmix/odd-1.d: Adjust for reloc change.
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* config/tc-mmix.c (md_assemble) <case mmix_operands_xyz_opt>:
Allow register operands for SWYM as for TRIP and TRAP. Correct
operand handling and error checking. Never emit
BFD_RELOC_MMIX_REG_OR_BYTE for operands to these insns.
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* config/tc-d10v.c: Include dwarf2dbg.h.
(write_long, write_1_short, write_2_short): Call dwarf2_emit_insn.
(d10v_frob_label): New function.
* config/tc-d10v.h (d10v_frob_label): Declare.
(tc_frob_label): Define as d10v_frob_label.
gas/testsuite/
* gas/lns/lns-common-1.s: Use two nops between each .loc.
* gas/lns/lns.exp: Don't exclude d10v.
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* config/tc-frv.c (frv_frob_label): Likewise.
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* config/obj-coff.c (weak_uniquify): Use an_external_name when TE_PE.
* symbols.c (an_external_name): Define when TE_PE.
(S_SET_EXTERNAL): Assign an_external_name when TE_PE.
* tc.h (an_external_name): Declare when TE_PE.
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* gas/sh/basic.exp: Add -big to ASFLAGS for sh*l*-*-netbsdelf*.
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* gas/lns/lns-common-1-alt.d: Match 2009-04-24 change.
* gas/mt/ms1-16-003.d: Correct reloc name.
* gas/mt/relocs.d: Elide incorrect file format strings.
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* config/tc-avr.c (md_assemble): Call dwarf2_emit_insn.
* config/tc-d30v.c (write_long, write_1_short,
write_2_short, md_assemble): Likewise.
* config/tc-dlx.c (md_assemble): Likewise.
* config/tc-i860.c (md_assemble): Likewise.
* config/tc-mn10200.c (md_assemble): Likewise.
* config/tc-pj.c (md_assemble): Likewise.
* config/tc-vax.c (md_assemble): Likewise.
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* gas/all/align.d: Likewise.
* gas/all/incbin.d: Likewise.
* gas/macros/semi.d: Likewise.
* gas/elf/ifunc-1.d: Don't run on alpha.
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* config/tc-arm.c (arm_cpus): cortex-r4f CPU added.
* doc/c-arm.texi: cortex-r4f CPU added.
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2009-09-07 Tristan Gingold <gingold@adacore.com>
* po/SRC-POTFILES.in: Regenerate.
* po/bfd.pot: Regenerate.
binutils
2009-09-07 Tristan Gingold <gingold@adacore.com>
* po/binutils.pot: Regenerate.
gas
2009-09-07 Tristan Gingold <gingold@adacore.com>
* po/POTFILES.in: Regenerate.
* po/gas.pot: Regenerate.
gprof
2009-09-07 Tristan Gingold <gingold@adacore.com>
* po/gprof.pot: Regenerate.
ld
2009-09-07 Tristan Gingold <gingold@adacore.com>
* po/ld.pot: Regenerate.
opcodes
2009-09-07 Tristan Gingold <gingold@adacore.com>
* po/opcodes.pot: Regenerate.
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2009-09-07 Tristan Gingold <gingold@adacore.com>
* bfd.m4 (BFD_HAVE_TIME_TYPE_MEMBER,
BFD_HAVE_SYS_STAT_TYPE_MEMBER): Moved to gas/acinclude.m4
* configure.in: Move tests for tm_gmtoff, st_mtim.tv_sec and
st_mtim.tv_nsec to gas/configure.in
(bfd_elf64_ia64_vms_vec): Remove vmsutil.lo
* configure: Regenerate.
* config.in: Regenerate.
* vmsutil.c: Moved to gas/config/te-vms.c
* vmsutil.h: Removed.
* Makefile.am (BFD32_BACKENDS_CFILES): Remove vmsutil.c
(BFD32_BACKENDS): Remove vmsutil.lo
* Makefile.in: Regenerate.
gas/:
2009-09-07 Tristan Gingold <gingold@adacore.com>
* Makefile.am (TARG_ENV_CFILES): New variable. Set to te-vms.c
(POTFILES): Add $(TARG_ENV_CFILES) in definition.
(EXTRA_as_new_SOURCES): Ditto.
* Makefile: Regenerate.
* acinclude.m4 (BFD_HAVE_TIME_TYPE_MEMBER,
BFD_HAVE_SYS_STAT_TYPE_MEMBER): New macro created from bfd/bfd.m4.
* configure.in: Add Tests for tm_gmtoff, st_mtim.tv_sec and
st_mtim.tv_nsec (from bfd/configure.in). Check for time.h and
sys/stat.h headers.
Add te-vms.o in extra_objects if te_file is vms.
* configure: Regenerate.
* config.in: Regenerate.
* config/te-vms.c: New file, from bfd/vmsutil.c
(vms_dwarf2_file_time_name, vms_dwarf2_file_size_name)
(vms_dwarf2_file_name): New functions.
(vms_file_stats_name): Make it static, add a dirname parameter to
locally create the full pathname.
* config/te-vms.h: Add a copyright header.
Declare the above functions.
(DWARF2_FILE_TIME_NAME, DWARF2_FILE_SIZE_NAME, DWARF2_FILE_NAME): Use
the above functions in the definition.
* makefile.vms (OBJS): Add te-vms.obj.
(te-vms.obj): Create a specific target.
* configure.com: Create targ-env.h using a per target value.
Compile te-vms.c for ia64.
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* doc/as.texinfo: Document that Blackfin GAS does not
accept SYMBOL = VALUE.
ld/testsuite/
* ld-elf/sec64k.exp: Use ".set" instead of "=" for bfin-*-*.
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(record_thumb_to_arm_glue, bfd_arm_process_before_allocation):
Change member name class to symbol_class.
* bfd/coff-i960.c (coff_i960_relocate_section) Rename variable
class to class_val. Change member name class to symbol_class.
* bfd/coff-rs6000.c (_bfd_xcoff_swap_aux_in)
(_bfd_xcoff_swap_aux_out): Rename arguments class to in_class.
* bfd/coff-stgo32.c (adjust_aux_in_post)
(adjust_aux_out_pre, adjust_aux_out_post): Rename arguments class
to in_class.
* bfd/coff64-rs6000.c (_bfd_xcoff64_swap_aux_in)
(_bfd_xcoff64_swap_aux_out): Rename arguments class to in_class.
* bfd/coffcode.h (coff_pointerize_aux_hook): Rename variable class
to n_sclass.
* bfd/coffgen.c (coff_write_symbol, coff_pointerize_aux): Rename
variables named class to n_sclass. (coff_write_symbols): Rename
variable class to sym_class. (bfd_coff_set_symbol_class): Rename
argument class to symbol_class.
* bfd/cofflink.c (_bfd_coff_link_hash_newfunc)
(coff_link_add_symbols, _bfd_coff_link_input_bfd)
(_bfd_coff_write_global_sym, _bfd_coff_generic_relocate_section):
Update code to use renamed members.
* bfd/coffswap.h (coff_swap_aux_in, coff_swap_aux_out): Rename
argument class to in_class.
* bfd/libcoff-in.h (struct coff_link_hash_entry, struct
coff_debug_merge_type) Renamed members class to symbol_class and
type_class.
* bfd/libcoff.h Regenerated.
* bfd/peXXigen.c: (_bfd_XXi_swap_aux_in, _bfd_XXi_swap_aux_out):
Rename argument class to in_class.
* bfd/pef.c (bfd_pef_parse_imported_symbol): Update code to use
renamed members.
* bfd/pef.h (struct bfd_pef_imported_symbol): Changed name of
member class to symbol_class.
* binutils/ieee.c (ieee_read_cxx_misc, ieee_read_cxx_class)
(ieee_read_reference): Rename variables named class to cxxclass.
* gas/config/tc-arc.c (struct syntax_classes): Rename member class
to s_class. (arc_extinst): Rename variable class to
s_class. Update code to use renamed members.
* gas/config/tc-mips.c (insn_uses_reg): Rename argument class to
regclass.
* gas/config/tc-ppc.c (ppc_csect, ppc_change_csect, ppc_function)
(ppc_tc, ppc_is_toc_sym, ppc_symbol_new_hook, ppc_frob_label)
(ppc_fix_adjustable, md_apply_fix): Update code to use renamed
members.
* gas/config/tc-ppc.h (struct ppc_tc_sy): Change name of member
from class to symbol_class. (OBJ_COPY_SYMBOL_ATTRIBUTES): Update
code to use renamed members.
* gas/config/tc-score.c (s3_adjust_paritybit): Rename argument
class to i_class.
* gas/config/tc-score7.c (s7_adjust_paritybit): Rename argument
class to i_class.
* gprof/corefile.c (core_create_function_syms): Rename variable
class to cxxclass.
* include/coff/ti.h (GET_LNSZ_SIZE, PUT_LNSZ_SIZE): Updated name
of class variable to in_class to match changes in function that
use this macro.
* include/opcode/ia64.h (struct ia64_operand): Renamed member
class to op_class
* ld/emultempl/elf32.em (gld${EMULATION_NAME}_load_symbols)
(gld${EMULATION_NAME}_try_needed): Rename variable class to
link_class
* opcodes/ia64-dis.c (print_insn_ia64): Update code to use renamed
member.
* opcodes/m88k-dis.c (m88kdis): Rename variable class to in_class.
* opcodes/tic80-opc.c (tic80_symbol_to_value)
(tic80_value_to_symbol): Rename argument class to symbol_class.
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2009-09-04 Tristan Gingold <gingold@adacore.com>
* NEWS: Add marker for 2.20.
gas/
2009-09-04 Tristan Gingold <gingold@adacore.com>
* NEWS: Add marker for 2.20.
ld/
2009-09-04 Tristan Gingold <gingold@adacore.com>
* NEWS: Add marker for 2.20.
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* config/bfin-parse.y (asm_1): Implement HLT instruction.
Fix comments for DBGA, DBGAH and DBGAL.
* config/tc-bfin.c (bfin_gen_pseudodbg_assert): Change according
to the new encoding of DBGA, DBGAH, and DBGAL.
include/
* opcode/bfin.h (PseudoDbg_Assert): Add bits_grp and mask_grp.
(PseudoDbg_Assert_grp_bits, PseudoDbg_Assert_grp_mask): Define.
(PseudoDbg_Assert_dbgop_bits, PseudoDbg_Assert_dbgop_mask,
PseudoDbg_Assert_dontcare_bits, PseudoDbg_Assert_dontcare_mask):
Adjust accordingly.
(init_PseudoDbg_Assert): Add PseudoDbg_Assert_grp_bits and
PseudoDbg_Assert_grp_mask.
opcodes/
* bfin-dis.c (decode_pseudodbg_assert_0): Change according
to the new encoding of DBGA, DBGAH, and DBGAL.
(_print_insn_bfin): Likewise.
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for (IU) option for multiply and multiply-accumulate to
data register instructon.
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* doc/as.texinfo: Likewise.
* doc/c-bfin.texi: Likewise.
* doc/asconfig.texi: Likewise.
* doc/c-bfin.texi: Update -mcpu= option with bf512, bf514,
bf516 and bf518.
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the prerequisite. Add $(srcdir)/config/bfin-aux.h to the
prerequisite.
(bfin-defs.h, $(srcdir)/config/bfin-defs.h): Rename to ...
(bfin-parse.h, $(srcdir)/config/bfin-parse.h): ... these.
(bfin-lex.o): Add bfin-parse.h and $(srcdir)/config/bfin-defs.h
to the prerequisite.
* Makefile.in: Regenerate.
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gas/:
* Makefile.am (itbl-lex.o): Depend on itbl-parse.h.
(itbl-ops.o, itbl-tops.o): Likewise.
(itbl-parse.h): Use separate rule.
* Makefile.in: Regenerate.
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-mcpu= option.
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* config/bfin-parse.y: Remove trailing whitespace.
(ccstat): Indent.
* config/tc-bfin.c (struct bfin_reg_entry): Remove.
(bfin_reg_info[]): Remove.
opcodes/
* bfin-dis.c (_print_insn_bfin): Don't declare.
(print_insn_bfin): Don't declare.
(dregs_pair): Remove.
(ignore_bits): Remove.
(ccstat): Remove.
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(F_REG_HIGH): Redefine.
(F_REG_NONE): New macro.
(F_REG_LOW): New macro.
(REG_CLASS): Enclose macro argument in parentheses when used.
(REG_EVEN): Likewise.
(IS_H): Use flags.
(IS_HCOMPL): Use flags.
* config/bfin-lex.l (SP.L, SP.H, FP.L, FP.H): Set flags.
(parse_reg): Set flags.
(parse_halfreg): Set flags.
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05000074 only when both slot1 and slot2 are filled.
testsuite/
* gas/bfin/parallel5.s: New test.
* gas/bfin/error.exp: New test.
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EOL in the instruction.
testsuite/
* gas/bfin/line_number.l, gas/bfin/line_number.s: New test.
* gas/bfin/bfin.exp: Add the new test.
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* config/bfin-defs.h (IS_GENREG): Define.
(IS_DAGREG): Define.
(IS_SYSREG): Define.
* config/bfin-parse.y (asm_1): Check illegal register move
instructions.
gas/testsuite/
* gas/bfin/expected_move_errors.s,
gas/bfin/expected_move_errors.l: Add "LC1 = I0;".
* gas/bfin/move.s, gas/bfin/move.d: Remove "CYCLES = A0.W".
opcodes/
* bfin-dis.c (IS_DREG): Define.
(IS_PREG): Define.
(IS_AREG): Define.
(IS_GENREG): Define.
(IS_DAGREG): Define.
(IS_SYSREG): Define.
(decode_REGMV_0): Check illegal register move instructions.
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testsuite/
* gas/bfin/expected_comparison_errors.l: Expect error on Line 13.
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* config/tc-bfin.c (bfin_start_line_hook): Remove.
(bfin_loop_beginend): New.
* config/tc-bfin.h (bfin_start_line_hook): Don't declare.
(md_start_line_hook): Don't define.
* config/bfin-aux.h (bfin_loop_beginend): Declare.
testsuite/
* gas/bfin/loop.s, gas/bfin/loop.d: New test.
* gas/bfin/loop2.s, gas/bfin/loop2.d: New test.
* gas/bfin/loop3.s, gas/bfin/loop3.d: New test.
* gas/bfin/bfin.exp: Add the new tests.
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* config/tc-ia64.c (ia64_vms_note): Use lbasename instead of basename.
Call xstrdup on the result and free the buffer after use.
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