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* gas/i386/opcode-intel.d: Undo the last change.
* gas/i386/opcode-suffix.d: Likewise.
* gas/i386/opcode.d: Likewise.
* gas/i386/opcode.s: Likewise.
* gas/i386/prefix.s: Add test for fwait with prefix.
* gas/i386/prefix.d: Updated.
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0x9b (fwait) is both an instruction and an opcode prefix. When 0x9b is
treated as an instruction, we need to handle any prefixes before it.
This patch handles it properly.
gas/testsuite/
PR binutils/16891
* gas/i386/opcode.s: Add test for fwait with prefix.
* gas/i386/opcode-intel.d: Updated.
* gas/i386/opcode-suffix.d: Likewise.
* gas/i386/opcode.d: Likewise.
opcodes/
PR binutils/16891
* i386-dis.c (print_insn): Handle prefixes before fwait.
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The problem was that references to weak function symbols were being
incorrectly biased by definition's offset.
PR gas/16858
* config/tc-i386.c (md_apply_fix): Do not adjust value of
pc-relative fixes against weak symbols.
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bfd/
* po/SRC-POTFILES.in: Regenerate.
* configure: Regenerate.
gas/
* po/POTFILES.in: Regenerate.
opcodes/
* po/POTFILES.in: Regenerate.
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* config/tc-arm.c (s_ltorg): Only create a mapping symbol for ELF
based targets.
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Fix various places where endianness needed to be taken into account
in the gas testsuite for ARM.
gas/testsuite/ChangeLog:
2014-04-23 Will Newton <will.newton@linaro.org>
* gas/arm/backslash-at.d: Fix dump output regexps for
armeb-linux-eabi configuration.
* gas/arm/got_prel.d: Likewise.
* gas/arm/inst-po.d: Likewise.
* gas/arm/unwind.d: Likewise.
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If there is a a trailing align statement in a code section we may
output data padding with a data mapping followed by a code alignment
with a code mapping. The literal pool may then be output with a code
mapping symbol which will cause it to be endian swapped in a big-endian
configuration. When outputting a literal pool make sure that a data
mapping symbol is output in all cases.
gas/ChangeLog:
2014-04-23 Will Newton <will.newton@linaro.org>
* config/tc-arm.c (s_ltorg): Call make_mapping_symbol
directly instead of mapping_state.
gas/testsuite/ChangeLog:
2014-04-23 Will Newton <will.newton@linaro.org>
* gas/arm/mapmisc.d: Check literal pool mapping with
a trailing .align statement.
* gas/arm/mapmisc.s: Likewise.
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ChangeLog:
binutils/
* doc/binutils.texi: Document the disassemble MIPS XPA instructions
command line option.
gas/
* config/tc-mips.c (options): Add OPTION_XPA and OPTION_NO_XPA.
(md_longopts): Add xpa and no-xpa command line options.
(mips_ases): Add MIPS XPA ASE.
(mips_cpu_info_table): Update p5600 entry to allow the XPA ASE.
* doc/as.texinfo: Document the MIPS XPA command line options.
* doc/c-mips.texi: Document the MIPS XPA command line options,
and assembler directives.
gas/testsuite/
* gas/mips/mips.exp: Add xpa tests.
* gas/mips/xpa.s: New test.
* gas/mips/xpa.d: Likewise.
include/
* opcode/mips.h (ASE_XPA): New define.
opcodes/
* mips-dis.c (mips_arch_choices): Update mips32r2 and mips64r2
to allow the MIPS XPA ASE.
(parse_mips_dis_option): Process the -Mxpa option.
* mips-opc.c (XPA): New define.
(mips_builtin_opcodes): Add MIPS XPA instructions and move the
locations of the ctc0 and cfc0 instructions.
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Linking object files produced by partial linking with link-time
relaxation enabled sometimes fails with the following error message:
dangerous relocation: call8: misaligned call target: (.text.unlikely+0x63)
This happens because no basic block with an XTENSA_PROP_ALIGN flag in the
property table is generated for the first basic block, even if the
.align directive is present.
It was believed that the first frag alignment could be derived from the
section alignment, but this was not implemented for the partial linking
case: after partial linking first frag of a section may become not
first, but no additional alignment frag is inserted before it.
Basic block for such frag may be merged with previous basic block into
extended basic block during relaxation pass losing its alignment
restrictions.
Fix this by always recording alignment for the first section frag.
2014-04-22 Max Filippov <jcmvbkbc@gmail.com>
gas/
* config/tc-xtensa.c (xtensa_handle_align): record alignment for the
first section frag.
gas/testsuite/
* gas/xtensa/all.exp: Add test for the first section frag alignment.
* gas/xtensa/first_frag_align.d: First section frag alignment expected
dump.
* gas/xtensa/first_frag_align.s: First section frag alignment test
source.
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2014-04-22 Sandra Loosemore <sandra@codesourcery.com>
gas/
* config/tc-nios2.c (nios2_consume_arg): Add case for 'E' to
unbreak self-test mode.
gas/testsuite/
* gas/nios2/selftest.s: New.
* gas/nios2/selftest.d: New.
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with support for the new or1k configuration.
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* config/tc-tilegx.h (TC_CONS_FIX_NEW): Add RELOC arg.
* config/tc-tilepro.h (TC_CONS_FIX_NEW): Likewise.
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* elf32-avr.c: Add DIFF relocations for AVR.
(avr_final_link_relocate): Handle the DIFF relocs.
(bfd_elf_avr_diff_reloc): New.
(elf32_avr_is_diff_reloc): New.
(elf32_avr_adjust_diff_reloc_value): Reduce difference value.
(elf32_avr_relax_delete_bytes): Recompute difference after deleting
bytes.
* reloc.c: Add BFD_RELOC_AVR_DIFF8/16/32 relocations
gas/ChangeLog
* config/tc-avr.c: Add new flag mlink-relax.
(md_show_usage): Add flag and help text.
(md_parse_option): Record whether link relax is turned on.
(relaxable_section): New.
(avr_validate_fix_sub): New.
(avr_force_relocation): New.
(md_apply_fix): Generate DIFF reloc.
(avr_allow_local_subtract): New.
* config/tc-avr.h (TC_LINKRELAX_FIXUP): Define to 0.
(TC_FORCE_RELOCATION): Define.
(TC_FORCE_RELOCATION_SUB_SAME): Define.
(TC_VALIDATE_FIX_SUB): Define.
(avr_force_relocation): Declare.
(avr_validate_fix_sub): Declare.
(md_allow_local_subtract): Define.
(avr_allow_local_subtract): Declare.
gas/testsuite/ChangeLog
* gas/avr/diffreloc_withrelax.d: New testcase.
* gas/avr/noreloc_withoutrelax.d: Likewise.
* gas/avr/relax.s: Likewise.
include/ChangeLog
* elf/avr.h: Add new DIFF relocs.
ld/testsuite/ChangeLog
* ld-avr/norelax_diff.d: New testcase.
* ld-avr/relax_diff.d: Likewise.
* ld-avr/relax.s: Likewise.
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ChangeLog:
2014-04-10 Andrew Bennett <andrew.bennett@imgtec.com>
* config/tc-mips.c (mips_cpu_info_table): Add P5600
configuation.
* doc/c-mips.texi: Document p5600.
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* config/tc-rl78.h (TC_CONS_FIX_NEW): Add RELOC parameter.
* config/tc-z80.h (TC_CONS_FIX_NEW): Discard RELOC parameter.
* config/tc-aarch64.h (TC_CONS_FIX_NEW): Discard RELOC parameter.
* read.c (emit_expr_fix): Mark the r parameter as potentially
unused.
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* config/tc-ppc.c (warn_476, last_insn, last_seg, last_subseg):
New static vars.
(md_longopts, md_parse_option, md_show_usage): Add --ppc476-workaround.
(ppc_elf_cons_fix_check): New function.
(md_assemble): Set last_insn, last_seg, last_subseg.
(ppc_byte, md_apply_fix): Handle warn_476.
* config/tc-ppc.h (TC_CONS_FIX_CHECK): Define.
(ppc_elf_cons_fix_check): Declare.
* read.c (cons_worker): Invoke TC_CONS_FIX_CHECK.
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A number of targets pass extra information from TC_PARSE_CONS_EXPRESSION
to TC_CONS_FIX_NEW via static variables. That's OK, but not best
practice. tc-ppc.c goes further in implementing its own replacement
for cons(), because the generic one doesn't allow relocation modifiers
on constants. This patch fixes both of these warts.
* gas/config/tc-alpha.h (TC_CONS_FIX_NEW): Add RELOC parameter.
* gas/config/tc-arc.c (arc_cons_fix_new): Add reloc parameter.
* gas/config/tc-arc.h (arc_cons_fix_new): Update prototype.
(TC_CONS_FIX_NEW): Add RELOC parameter.
* gas/config/tc-arm.c (cons_fix_new_arm): Similarly
* gas/config/tc-arm.h (cons_fix_new_arm, TC_CONS_FIX_NEW): Similarly.
* gas/config/tc-cr16.c (cr16_cons_fix_new): Similarly.
* gas/config/tc-cr16.h (cr16_cons_fix_new, TC_CONS_FIX_NEW): Similarly.
* gas/config/tc-crx.h (TC_CONS_FIX_NEW): Similarly.
* gas/config/tc-m32c.c (m32c_cons_fix_new): Similarly.
* gas/config/tc-m32c.h (m32c_cons_fix_new, TC_CONS_FIX_NEW): Similarly.
* gas/config/tc-mn10300.c (mn10300_cons_fix_new): Similarly.
* gas/config/tc-mn10300.h (mn10300_cons_fix_new, TC_CONS_FIX_NEW):
Similarly.
* gas/config/tc-ns32k.c (cons_fix_new_ns32k): Similarly.
* gas/config/tc-ns32k.h (cons_fix_new_ns32k): Similarly.
* gas/config/tc-pj.c (pj_cons_fix_new_pj): Similarly.
* gas/config/tc-pj.h (pj_cons_fix_new_pj, TC_CONS_FIX_NEW): Similarly.
* gas/config/tc-rx.c (rx_cons_fix_new): Similarly.
* gas/config/tc-rx.h (rx_cons_fix_new, TC_CONS_FIX_NEW): Similarly.
* gas/config/tc-sh.c (sh_cons_fix_new): Similarly.
* gas/config/tc-sh.h (sh_cons_fix_new, TC_CONS_FIX_NEW): Similarly.
* gas/config/tc-tic54x.c (tic54x_cons_fix_new): Similarly.
* gas/config/tc-tic54x.h (tic54x_cons_fix_new, TC_CONS_FIX_NEW):
Similarly.
* gas/config/tc-tic6x.c (tic6x_cons_fix_new): Similarly.
* gas/config/tc-tic6x.h (tic6x_cons_fix_new, TC_CONS_FIX_NEW):
Similarly.
* gas/config/tc-arc.c (arc_parse_cons_expression): Return reloc.
* gas/config/tc-arc.h (arc_parse_cons_expression): Update proto.
* gas/config/tc-avr.c (exp_mod_data): Make global.
(pexp_mod_data): Delete.
(avr_parse_cons_expression): Return exp_mod_data pointer.
(avr_cons_fix_new): Add exp_mod_data_t pointer param.
(exp_mod_data_t): Move typedef..
* gas/config/tc-avr.h: ..to here.
(exp_mod_data): Declare.
(TC_PARSE_CONS_RETURN_TYPE, TC_PARSE_CONS_RETURN_NONE): Define.
(avr_parse_cons_expression, avr_cons_fix_new): Update prototype.
(TC_CONS_FIX_NEW): Update.
* gas/config/tc-hppa.c (hppa_field_selector): Delete static var.
(cons_fix_new_hppa): Add hppa_field_selector param.
(fix_new_hppa): Adjust.
(parse_cons_expression_hppa): Return field selector.
* gas/config/tc-hppa.h (parse_cons_expression_hppa): Update proto.
(cons_fix_new_hppa): Likewise.
(TC_PARSE_CONS_RETURN_TYPE, TC_PARSE_CONS_RETURN_NONE): Define.
* gas/config/tc-i386.c (got_reloc): Delete static var.
(x86_cons_fix_new): Add reloc param.
(x86_cons): Return got reloc.
* gas/config/tc-i386.h (x86_cons, x86_cons_fix_new): Update proto.
(TC_CONS_FIX_NEW): Add RELOC param.
* gas/config/tc-ia64.c (ia64_cons_fix_new): Add reloc param. Adjust
calls.
* gas/config/tc-ia64.h (ia64_cons_fix_new): Update prototype.
(TC_CONS_FIX_NEW): Add reloc param.
* gas/config/tc-microblaze.c (parse_cons_expression_microblaze):
Return reloc.
(cons_fix_new_microblaze): Add reloc param.
* gas/config/tc-microblaze.h: Formatting.
(parse_cons_expression_microblaze): Update proto.
(cons_fix_new_microblaze): Likewise.
* gas/config/tc-nios2.c (nios2_tls_ldo_reloc): Delete static var.
(nios2_cons): Return ldo reloc.
(nios2_cons_fix_new): Delete.
* gas/config/tc-nios2.h (nios2_cons): Update prototype.
(nios2_cons_fix_new, TC_CONS_FIX_NEW): Delete.
* gas/config/tc-ppc.c (md_pseudo_table): Remove quad, long, word,
short. Make llong use cons.
(ppc_elf_suffix): Return BFD_RELOC_NONE rather than BFD_RELOC_UNUSED.
(ppc_elf_cons): Delete.
(ppc_elf_parse_cons): New function.
(ppc_elf_validate_fix): Don't check for BFD_RELOC_UNUSED.
(md_assemble): Use BFD_RELOC_NONE rather than BFD_RELOC_UNUSED.
* gas/config/tc-ppc.h (TC_PARSE_CONS_EXPRESSION): Define
(ppc_elf_parse_cons): Declare.
* gas/config/tc-sparc.c (sparc_cons_special_reloc): Delete static var.
(sparc_cons): Return reloc specifier.
(cons_fix_new_sparc): Add reloc specifier param.
(sparc_cfi_emit_pcrel_expr): Use emit_expr_with_reloc.
* gas/config/tc-sparc.h (TC_PARSE_CONS_RETURN_TYPE): Define.
(TC_PARSE_CONS_RETURN_NONE): Define.
(sparc_cons, cons_fix_new_sparc): Update prototype.
* gas/config/tc-v850.c (hold_cons_reloc): Delete static var.
(v850_reloc_prefix): Use BFD_RELOC_NONE rather than BFD_RELOC_UNUSED.
(md_assemble): Likewise.
(parse_cons_expression_v850): Return reloc.
(cons_fix_new_v850): Add reloc parameter.
* gas/config/tc-v850.h (parse_cons_expression_v850): Update proto.
(cons_fix_new_v850): Likewise.
* gas/config/tc-vax.c (vax_cons_special_reloc): Delete static var.
(vax_cons): Return reloc.
(vax_cons_fix_new): Add reloc parameter.
* gas/config/tc-vax.h (vax_cons, vax_cons_fix_new): Update proto.
* gas/config/tc-xstormy16.c (xstormy16_cons_fix_new): Add reloc param.
* gas/config/tc-xstormy16.h (xstormy16_cons_fix_new): Update proto.
* gas/dwarf2dbg.c (TC_PARSE_CONS_RETURN_NONE): Provide default.
(emit_fixed_inc_line_addr): Adjust exmit_expr_fix calls.
* gas/read.c (TC_PARSE_CONS_EXPRESSION): Return value.
(do_parse_cons_expression): Adjust.
(cons_worker): Pass return value from TC_PARSE_CONS_EXPRESSION
to emit_expr_with_reloc.
(emit_expr_with_reloc): New function handling reloc, mostly
extracted from..
(emit_expr): ..here.
(emit_expr_fix): Add reloc param. Adjust TC_CONS_FIX_NEW invocation.
Handle reloc.
(parse_mri_cons): Convert to ISO.
* gas/read.h (TC_PARSE_CONS_RETURN_TYPE): Define.
(TC_PARSE_CONS_RETURN_NONE): Define.
(emit_expr_with_reloc): Declare.
(emit_expr_fix): Update prototype.
* gas/write.c (write_object_file): Update TC_CONS_FIX_NEW invocation.
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Add Intel SGX instructions support to assembler and disassembler.
gas/
* config/tc-i386.c (cpu_arch): Add .se1.
* doc/c-i386.texi: Document .se1/se1.
gas/testsuite/
* gas/i386/i386.exp: Run SE1 tests.
* gas/i386/se1.d: New file.
* gas/i386/se1.s: Ditto.
* gas/i386/x86-64-se1.d: Ditto.
* gas/i386/x86-64-se1.s: Ditto.
opcodes/
* i386-dis.c (rm_table): Add encls, enclu.
* i386-gen.c (cpu_flag_init): Add CPU_SE1_FLAGS,
(cpu_flags): Add CpuSE1.
* i386-opc.h (enum): Add CpuSE1.
(i386_cpu_flags): Add cpuse1.
* i386-opc.tbl: Add encls, enclu.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
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Check 8 and 16 bit PCREL fixes for overflow, since we bypass the
later overflow checks in write.c. Direct relocs are left alone,
as gcc has been known to take advantage of the silent overflows
when comparing addresses to constant ranges.
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PR 16765.
The problem was that gcc was generating assembler with missing unwind directives in it,
so that a gas_assert was being triggered. The patch replaces the assert with an error
message.
* config/tc-arm.c (create_unwind_entry): Report an error if an
attempt to recreate an unwind directive is encountered.
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(enum options): add OPTION_RMW_ISA for -mrmw option.
(struct option md_longopts): Add mrmw option.
(md_show_usage): add -mrmw option description.
(md_parse_option): Update isa details if -mrmw option specified.
* doc/c-avr.texi: Add doc for new option -mrmw.
* gas/avr/avr.exp: Run new tests.
* gas/avr/rmw.d: Add test for additional ISA support.
* gas/avr/rmw.s: Ditto.
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* gas/config/tc-avr.c: Revert
* gas/doc/c-avr.texi: Revert
* gas/testsuite/ChangeLog: Revert
* gas/testsuite/gas/avr/avr.exp: Revert
* gas/testsuite/gas/avr/rmw.d: Revert
* gas/testsuite/gas/avr/rmw.s: Revert
This reverts commit d24e46e3e247e46eb2f5e7ebb5efd0f9fcc5fcdd.
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(enum options): add OPTION_RMW_ISA for -mrmw option.
(struct option md_longopts): Add mrmw option.
(md_show_usage): add -mrmw option description.
(md_parse_option): Update isa details if -mrmw option specified.
* doc/c-avr.texi: Add doc for new option -mrmw.
* gas/avr/avr.exp: Run new tests.
* gas/avr/rmw.d: Add test for additional ISA support.
* gas/avr/rmw.s: Ditto.
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a call to sprintf was being made with a non-constant formatting string.
* config/tc-score.c (s3_parse_pce_inst): Add "%s" parameter to
sprintf in order to avoid a compile time warning.
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* config/tc-rl78.c (rl78_op): Issue an error message if a 16-bit
relocation is used on an 8-bit operand or vice versa.
(tc_gen_reloc): Use the RL78_16U relocation for RL78_CODE.
(md_apply_fix): Add support for RL78_HI8, RL78_HI16 and RL78_LO16.
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suite of ops. It changes the current section back to the code section of the
current function. This is helpful because the code section may not be .text.
* config/obj-coff-seh.c (obj_coff_seh_code): New function -
switches the current segment back to the code segment recorded
when seh_proc was last invoked.
* config/obj-coff-seh.h (SEH_CMDS): Add seh_code.
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It turns out that glibc's sysdeps/powerpc/powerpc64/start.S uses this
feature. :-(
* config/tc-ppc.c (ppc_is_toc_sym): Revert 2014-03-05.
(md_assemble): Likewise. Warn.
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branches.
* tc-xtensa.c (xtensa_check_frag_count, xtensa_create_trampoline_frag)
(xtensa_maybe_create_trampoline_frag, init_trampoline_frag)
(find_trampoline_seg, search_trampolines, get_best_trampoline)
(check_and_update_trampolines, add_jump_to_trampoline)
(dump_trampolines): New function.
(md_parse_option): Add cases for --[no-]trampolines options.
(md_assemble, finish_vinsn, xtensa_end): Add call to
xtensa_check_frag_count.
(xg_assemble_vliw_tokens): Add call to
xtensa_maybe_create_trampoline_frag.
(xtensa_relax_frag): Relax fragments with RELAX_TRAMPOLINE state.
(relax_frag_immed): Relax jump instructions that cannot reach its
target.
* tc-xtensa.h (xtensa_relax_statesE::RELAX_TRAMPOLINE): New relax
state.
* as.texinfo: Document --[no-]trampolines command-line options.
* c-xtensa.texi: Document trampolines relaxation and command line
options.
* frags.c (get_frag_count, clear_frag_count): New function.
(frag_alloc): Increment totalfrags counter.
* frags.h (get_frag_count, clear_frag_count): New function.
* all.exp: Add test for trampoline relaxation.
* trampoline.d: Trampoline relaxation expected dump.
* trampoline.s: Trampoline relaxation test source.
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This patch adds initial in-gas opcode relaxation for the rl78
backend. Specifically, it checks for conditional branches that
are too far and replaces them with inverted branches around longer
fixed branches.
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* config/tc-mips.h (DIFF_EXPR_OK, CFI_DIFF_EXPR_OK): Define.
* config/tc-mips.c (md_pcrel_from): Remove error message.
(md_apply_fix): Convert PC-relative BFD_RELOC_32s to
BFD_RELOC_32_PCREL. Report a specific error message for unhandled
PC-relative expressions. Handle BFD_RELOC_8.
gas/testsuite/
* gas/all/gas.exp: Remove XFAIL of forward.d for MIPS.
* gas/mips/pcrel-1.s, gas/mips/pcrel-1.d, gas/mips/pcrel-2.s,
gas/mips/pcrel-2.d, gas/mips/pcrel-3.s, gas/mips/pcrel-3.l,
gas/mips/pcrel-4.s, gas/mips/pcrel-4-32.d, gas/mips/pcrel-4-n32.d,
gas/mips/pcrel-4-64.d: New tests.
* gas/mips/mips.exp: Run them.
* gas/mips/lui-2.l: Tweak error message for line 7.
ld/testsuite/
* ld-elf/merge.d: Remove MIPS XFAIL.
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For gathers with indices larger than elements (e. g.)
vpgatherqd ymm6{k1}, ZMMWORD PTR [ebp+zmm7*8-123]
We currently treat memory size as a size of index register, while it is
actually should be size of destination register:
vpgatherqd ymm6{k1}, YMMWORD PTR [ebp+zmm7*8-123]
This patch fixes it.
opcodes/
* i386-opc.tbl: Change memory size for vgatherpf0qps, vgatherpf1qps,
vscatterpf0qps, vscatterpf1qps, vgatherqps, vpgatherqd, vpscatterqd,
vscatterqps.
* i386-tbl.h: Regenerate.
gas/testsuite/
* gas/i386/avx512pf-intel.d: Change memory size for vgatherpf0qps,
vgatherpf1qps, vscatterpf0qps, vscatterpf1qps.
* gas/i386/avx512pf.s: Ditto.
* gas/i386/x86-64-avx512pf-intel.d: Ditto.
* gas/i386/x86-64-avx512pf.s: Ditto.
* gas/i386/avx512f-intel.d: Change memory size for vgatherqps,
vpgatherqd, vpscatterqd, vscatterqps.
* gas/i386/avx512f.s: Ditto.
* gas/i386/x86-64-avx512f-intel.d: Ditto.
* gas/i386/x86-64-avx512f.s: Ditto.
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and %hstick_enable to the Sparc assembler.
* config/tc-sparc.c (hpriv_reg_table): Added entries for
%hstick_offset and %hstick_enable.
* doc/c-sparc.texi (Sparc-Regs): Document the %hstick_offset and
%hstick_enable hyperprivileged registers.
* sparc-dis.c (v9_hpriv_reg_names): Names for %hstick_offset and
%hstick_enable added.
* gas/sparc/rdhpr.s: Test rd %hstick_offset and %hstick_enable.
* gas/sparc/rdhpr.d: Likewise.
* gas/sparc/wrhpr.s: Test wr %hstick_offset and %hstick_enable.
* gas/sparc/wrhpr.d: Likewise.
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* gas/sparc/ldd_std.d: Fix objdump invocation in order to get
the old opcodes for the ldtw, ldtwa, stw and stwa instructions.
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* config/tc-arm.c (codecomposer_syntax): New flag that states whether the
CCS syntax compatibility mode is on or off.
(asmfunc_states): New enum to represent the asmfunc directive state.
(asmfunc_state): New variable holding the asmfunc directive state.
(comment_chars): Rename to arm_comment_chars.
(line_separator_chars): Rename to arm_line_separator_chars.
(s_ccs_ref): New function that handles the .ref directive.
(asmfunc_debug): New function.
(s_ccs_asmfunc): New function that handles the .asmfunc directive.
(s_ccs_endasmfunc): New function that handles the .endasmfunc directive.
(s_ccs_def): New function that handles the .def directive.
(tc_start_label_without_colon): New function.
(md_pseudo_table): Added new CCS directives.
(arm_ccs_mode): New function that handles the -mccs command line option.
(arm_long_opts): Added new -mccs command line option.
* config/tc-arm.h (LABELS_WITHOUT_COLONS): New macro.
(TC_START_LABEL_WITHOUT_COLON): New macro.
(tc_start_label_without_colon): Added extern function declaration.
(tc_comment_chars): Define.
(tc_line_separator_chars): Define.
* app.c (do_scrub_begin): Use tc_line_separator_chars, if defined.
* read.c (read_begin): Likewise.
* doc/as.texinfo: Add documentation for the -mccs command line
option.
* doc/c-arm.texi: Likewise.
* doc/internals.texi: Document tc_line_separator_chars.
* NEWS: Mention the new feature.
* gas/arm/ccs.s: New test case.
* gas/arm/ccs.d: New expected disassembly.
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disassembler's output.
* rx-decode.opc (bwl): Allow for bogus instructions with a size
field of 3.
(sbwl, ubwl, SCALE): Likewise.
* rx-decode.c: Regenerate.
* gas/rx/mov.d: Update expected disassembly.
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gas/
* config/tc-aarch64.c (aarch64_opts): Add new option
"mno-verbose-error".
(verbose_error_p): Initialize to 1.
* doc/c-aarch64.texi (AArch64 Options): Document -mverbose-error
and -mno-verbose-error.
gas/testsuite/
* gas/aarch64/illegal.d: Pass -mno-verbose-error.
* gas/aarch64/verbose-error.s: Add more verbose message testcases.
* gas/aarch64/verbose-error.l: Ditto.
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PR gas/16694
* config/tc-arm.c (tc_arm_regname_to_dw2regnum): Parse VFP
registers as well.
* gas/cfi/cfi-arm-1.s: Add checks of VFP registers.
* gas/cfi/cfi-arm-1.d: Update expected output.
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2014-03-13 Richard Earnshaw <rearnsha@arm.com>
Jiong Wang <Jiong.Wang@arm.com>
* doc/c-aarch64.texi: Clean up some formatting issues.
(AArch64 Options): Document -mcpu and -march.
(AArch64 Extensions): New node.
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* gas/aarch64/litpool.s: Make the test endian agnostic.
* gas/aarch64/litpool.d: Update expected disassembly.
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bfd/
* peicode.h (pe_ILF_object_p): Adjust, as the version number
has been read.
(pe_bfd_object_p): Also read version number to detect ILF.
* pe-x86_64.c (COFF_WITH_PE_BIGOBJ): Define.
(x86_64pe_bigobj_vec): Define
* coffcode.h (bfd_coff_backend_data): Add _bfd_coff_max_nscns field.
(bfd_coff_max_nscns): New macro.
(coff_compute_section_file_positions): Use unsigned int for
target_index. Compare with bfd_coff_max_nscns.
(bfd_coff_std_swap_table, ticoff0_swap_table, ticoff1_swap_table):
Set a value for _bfd_coff_max_nscns.
(header_bigobj_classid): New constant.
(coff_bigobj_swap_filehdr_in, coff_bigobj_swap_filehdr_out)
(coff_bigobj_swap_sym_in, coff_bigobj_swap_sym_out)
(coff_bigobj_swap_aux_in, coff_bigobj_swap_aux_out): New
functions.
(bigobj_swap_table): New table.
* libcoff.h: Regenerate.
* coff-sh.c (bfd_coff_small_swap_table): Likewise.
* coff-alpha.c (alpha_ecoff_backend_data): Add value for
_bfd_coff_max_nscns.
* coff-mips.c (mips_ecoff_backend_data): Likewise.
* coff-rs6000.c (bfd_xcoff_backend_data)
(bfd_pmac_xcoff_backend_data): Likewise.
* coff64-rs6000.c (bfd_xcoff_backend_data)
(bfd_xcoff_aix5_backend_data): Likewise.
* targets.c (x86_64pe_bigobj_vec): Declare.
* configure.in (x86_64pe_bigobj_vec): New vector.
* configure: Regenerate.
* config.bfd: Add bigobj object format for Windows targets.
gas/
* config/tc-i386.c (use_big_obj): Declare.
(OPTION_MBIG_OBJ): Define.
(md_longopts): Add -mbig-obj option.
(md_parse_option): Handle it.
(md_show_usage): Display help for this option.
(i386_target_format): Use bigobj for x86-64 if -mbig-obj.
* doc/c-i386.texi: Document the option.
gas/testsuite/
* gas/pe/big-obj.d, gas/pe/big-obj.s: Add test.
* gas/pe/pe.exp: Add test.
include/coff/
* pe.h (struct external_ANON_OBJECT_HEADER_BIGOBJ): Declare.
(FILHSZ_BIGOBJ): Define.
(struct external_SYMBOL_EX): Declare.
(SYMENT_BIGOBJ, SYMESZ_BIGOBJ): Define.
(union external_AUX_SYMBOL_EX): Declare.
(AUXENT_BIGOBJ, AUXESZ_BIGOBJ): Define.
* internal.h (struct internal_filehdr): Change type
of f_nscns.
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that if multiple bignum values are encountered only the most recent is valid.
If such expressions are cached, eg to be emitted into a literal pool later on
in the assembly, then only one expression - the last - will be correct. This
patch fixes the problem for the AArch64 target by caching each bignum value
locally.
PR gas/16688
* config/tc-aarch64.c (literal_expression): New structure.
(literal_pool): Replace exp array with literal_expression array.
(add_to_lit_pool): When adding a bignum cache the big value.
(s_ltorg): When emitting a bignum initialise the global bignum
array from the cached value.
* gas/aarch64/litpool.s: New test case.
* gas/aarch64/litpool.d: Expected disassembly.
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Regenerate Makefile.in in bfd, binutils, gas, gold, gprof, ld, opcodes.
Regenerate gas/config.in.
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avr25: ata5272, attiny828
avr35: ata5505, attiny1634
avr4: atmega8a, ata6285, ata6286, atmega48pa
avr5: at90pwm161, ata5790, ata5795, atmega164pa, atmega165pa,
atmega168pa, atmega32a, atmega64rfr2, atmega644rfr2, atmega64a,
atmega16hva2
avr51: atmega128a, atmega1284
avrxmega2: atxmega16a4u, atxmega16c4, atxmega32a4u, atxmega32c4,
atxmega32e5, atxmega16e5, atxmega8e5
avrxmega4: atxmega64a3u, atxmega64a4u, atxmega64b1, atxmega64b3,
atxmega64c3, atxmega64d4
avrxmega6: atxmega128a3u, atxmega128b3, atxmega128c3,
atxmega128d4, atxmega192a3u, atxmega192c3, atxmega256a3u,
atxmega256c3, atxmega384c3, atxmega384d3
avrxmega7: atxmega128a4u
* doc/c-avr.texi: Ditto.
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This adds support for "func@localentry", an expression that returns the
ELFv2 local entry point address of function "func". I've excluded
dynamic relocation support because that obviously would require glibc
changes.
include/elf/
* ppc64.h (R_PPC64_REL24_NOTOC, R_PPC64_ADDR64_LOCAL): Define.
bfd/
* elf64-ppc.c (ppc64_elf_howto_raw): Add R_PPC64_ADDR64_LOCAL entry.
(ppc64_elf_reloc_type_lookup): Support R_PPC64_ADDR64_LOCAL.
(ppc64_elf_check_relocs): Likewise.
(ppc64_elf_relocate_section): Likewise.
* Add BFD_RELOC_PPC64_ADDR64_LOCAL.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
gas/
* config/tc-ppc.c (ppc_elf_suffix): Support @localentry.
(md_apply_fix): Support R_PPC64_ADDR64_LOCAL.
ld/testsuite/
* ld-powerpc/elfv2-2a.s, ld-powerpc/elfv2-2b.s: New files.
* ld-powerpc/elfv2-2exe.d, ld-powerpc/elfv2-2so.d: New files.
* ld-powerpc/powerpc.exp: Run new test.
elfcpp/
* powerpc.h (R_PPC64_REL24_NOTOC, R_PPC64_ADDR64_LOCAL): Define.
gold/
* powerpc.cc (Target_powerpc::Scan::local, global): Support
R_PPC64_ADDR64_LOCAL.
(Target_powerpc::Relocate::relocate): Likewise.
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This patch allows gas to assemble a testcase like
li 3,ext_sym
which oddly was not accepted while the following is OK:
li 3,ext_sym@l
* config/tc-ppc.c (md_assemble): Move code adjusting reloc types
later. Merge absolute and relative branch reloc selection.
Generate 16-bit relocs for most 16-bit insn fields given a
non-constant expression.
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The XCOFF assembler does some wierd things with instructions like
`lwz 9,sym(30'. See the comment in md_apply_fix. From an ELF
perspective, it's weird even to magically select a TOC16 reloc
when a symbol is in the TOC/GOT. ELF assemblers generally use
modifiers like @toc to select relocs, so remove this "feature"
for ELF. I believe this was to support gcc -m32 -mcall-aixdesc
but that combination of gcc options has been broken for a long
time.
* config/tc-ppc.c (ppc_is_toc_sym): Remove OBJ_ELF support.
(md_assemble): Don't call ppc_is_toc_sym for ELF.
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