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the section smaller.
PR binutils/18087
gas * doc/as.texinfo: Note that when gas compresses debug sections the
compression is only performed if it makes the section smaller.
* write.c (compress_debug): Do not compress a debug section if
doing so would make it larger.
tests * gas/i386/dw2-compress-1.d: Do not expect the .debug_abbrev or
.debug_info sections to be compressed.
binu * doc/binutils.texi: Note that when objcopy compresses debug
sections the compression is only performed if it makes the section
smaller.
bfd * coffgen.c (make_a_section_from_file): Only prepend a z to a
debug section's name if the section was actually compressed.
* elf.c (_bfd_elf_make_section_from_shdr): Likewise.
* compress.c (bfd_init_section_compress_status): Do not compress
the section if doing so would make it bigger. In such cases leave
the section alone and return COMPRESS_SECTION_NONE.
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* dwarf2dbg.c (out_header): Remove spurious #if 1.
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opcodes/
* mips-opc.c (decode_mips_operand): Fix constraint issues
with u and y operands.
gas/testsuite/
* gas/mips/mips.exp: Added branch constraints testcase.
* gas/mips/r6-branch-constraints.s: New test.
* gas/mips/r6-branch-constraints.l: New test.
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opcodes/
* mips-opc.c (mips_builtin_opcodes): Add evp and dvp instructions.
gas/testsuite/
* gas/mips/r6.s: Add evp and dvp instructions.
* gas/mips/r6.d: Likewise.
* gas/mips/r6-n32.d: Likewise.
* gas/mips/r6-n64.d: Likewise.
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2015-03-13 Jiong Wang <jiong.wang@arm.com>
gas/
* config/tc-aarch64.c (warn_unpredictable_ldst): Don't warn on reg number 31.
gas/testsuite/
* gas/aarch64/diagnostic.s: New testcases.
* gas/aarch64/diagnostic.l: New error match.
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2015-03-13 Jiong Wang <jiong.wang@arm.com>
gas/
* config/tc-aarch64.h (SUB_SEGMENT_ALIGN): Define to be zero.
gas/testsuite/
* gas/aarch64/tail_padding.s: New testcase.
* gas/aarch64/tail_padding.d: New expectation file.
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gas/
* config/tc-mips.c (mips_cpu_info_table): Add i6400 entry.
* doc/c-mips.texi: Document i6400 -march option.
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defined in other sections.
PR gas/17444
* config/tc-arm.h (MD_APPLY_SYM_VALUE): Pass the current segment
to arm_apply_sym_value. Update prototype.
* config/tc-arm.c (arm_apply_sym_value): Add segment argument.
Do not apply the value if the symbol is in a different segment to
the current segment.
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* config/tc-ppc.c (md_assemble): Don't abort on 8 byte insn fixups.
(md_apply_fix): Report an error on data-only fixups used with insns.
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opcodes/
2015-03-10 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* s390-opc.c: Add new IBM z13 instructions.
* s390-opc.txt: Likewise.
gas/testsuite/
2015-03-10 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* gas/s390/zarch-z13.d: Add more z13 instructions.
* gas/s390/zarch-z13.s: Likewise.
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gas/
2015-03-10 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* gas/config/tc-s390.c (md_gather_operands): Check for valid
length field operands.
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* config/tc-arm.c (parse_operands): Fix bug setting writeback
values for '^' on OP_REGLSTs.
(do_push_pop): Add new writeback constraint.
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gas/
2015-03-10 Renlin Li <renlin.li@arm.com>
* config/tc-arm.c (mapping_state): Remove first MAP_DATA emitting code.
(mapping_state_2): Emit first MAP_DATA symbol here.
gas/testsuite/
2015-03-05 Renlin Li <renlin.li@arm.com>
* gas/arm/dis-data.d: Adjust the desired output.
* gas/arm/dis-data2.d: Ditto.
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opcodes/ChangeLog:
2015-03-10 Renlin Li <renlin.li@arm.com>
* aarch64-tbl.h (aarch64_opcode_table): Remove strub, ldurb, ldursb,
stur, ldur, sturh, ldurh, ldursh, ldursw, prfum F_HAS_ALIAS flag and
related alias.
* aarch64-asm-2.c: Regenerate.
* aarch64-dis-2.c: Likewise.
* aarch64-opc-2.c: Likewise.
gas/testsuite/ChangeLog:
2015-03-10 Renlin Li <renlin.li@arm.com>
* gas/aarch64/ldst-reg-uns-imm.d: Adjust expected output.
* gas/aarch64/ldst-reg-unscaled-imm.d: Likewise.
* gas/aarch64/reloc-insn.d: Likewise.
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gas/
2015-03-10 Matthew Wahab <matthew.wahab@arm.com>
* config/tc-aarch64.c (mapping_state): Set minimum alignment for
code sections.
gas/testsuite
2015-03-10 Matthew Wahab <matthew.wahab@arm.com>
* gas/aarch64/codealign.d: Add test for code section alignment.
* gas/aarch64/codealign.s: New file.
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CPU_DEFAULT set.
PR gas/17852
* config/tc-arm.c (md_begin): Ensure that selected_cpu is
initialised when CPU_DEFAULT is defined.
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-m4byte-align command line options.
* config/tc-v850.c (md_parse_option): Fix code to set or clear
EF_RH850_DATA_ALIGN8 bit in ELF header, based upon the use of the
-m8byte-align and -m4byte-align command line options.
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bfd/
PR gas/17843
* elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Expect
R_AARCH64_TLSLE_MOVW_TPREL_G0_NC and R_AARCH64_TLSLE_MOVW_TPREL_G1_NC
to be used with MOVK rather than MOVZ.
gas/
PR gas/17843
* config/tc-aarch64.c (process_movw_reloc_info): Allow
R_AARCH64_TLSLE_MOVW_TPREL_G0_NC and R_AARCH64_TLSLE_MOVW_TPREL_G1_NC
for MOVK.
gas/testsuite/
PR gas/17843
* gas/aarch64/tls.s, gas/aarch64/tls.d: Add test for
R_AARCH64_TLSLE_MOVW_TPREL_G0/R_AARCH64_TLSLE_MOVW_TPREL_G1_NC
sequence.
ld/testsuite/
PR gas/17843
* ld-aarch64/tlsle.s, ld-aarch64/tlsle.d: New test.
* ld-aarch64/aarch64-elf.exp: Run it.
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gas/
* write.c (SUB_SEGMENT_ALIGN): Don't pad non-code sections at
end to their alignment.
gas/testsuite/
* gas/sparc/pcrel.d: Update for changed padding in data sections.
* gas/sparc/pcrel64.d: Likewise.
ld/testsuite/
* ld-sparc/gotop32.rd: Update for changed padding in data sections.
* ld-sparc/gotop32.td: Likewise.
* ld-sparc/gotop64.rd: Likewise.
* ld-sparc/gotop64.td: Likewise.
* ld-tilegx/external.s: Align .data.
* ld-tilepro/external.s: Likewise.
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Extend the address modifier parsing to distinguish between the
modifers used in LDR literal and LDR register offset address modes.
The current parser incorrectly accepts the :got: modifier on a
register offset instruction resulting in silent corruption of the
output binary.
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The :got: modifier is not meaningful in a register offset load store
instruction and should result in a diagnostic.
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The current implementation of the :got: assembler modifier does not
distinguish the ADR and ADRP instruction. The :got: modifier does not
make sense on and ADR instruction and should be error'd rather than
the current behavior of applying an inappropriate relocation to the
output and scrambling the underlying instruction silently.
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The modifier :got: does not make sense on an ADR instruction. Add a
test case to ensure we gripe.
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Updated how we merge and display this attribute per the latest
EABI documents.
bfd/ChangeLog
* elf32-arm.c (elf32_arm_merge_eabi_attributes): Update how we
merge Tag_ABI_HardFP_use.
binutils/ChangeLog
* readelf.c (arm_attr_tag_ABI_HardFP_use): Update how we
display it.
ld/testsuite/ChangeLog
* ld-arm/attr-merge-3.attr: Remove Tag_ABI_HardFP_use.
* ld-arm/attr-merge-vfp-10.d: Likewise.
* ld-arm/attr-merge-vfp-10r.d: Likewise.
* ld-arm/attr-merge-vfp-12.d: Likewise.
* ld-arm/attr-merge-vfp-12r.d: Likewise.
* ld-arm/attr-merge-vfp-13.d: Likewise.
* ld-arm/attr-merge-vfp-13r.d: Likewise.
* ld-arm/attr-merge-vfp-14.d: Likewise.
* ld-arm/attr-merge-vfp-14r.d: Likewise.
* ld-arm/attr-merge-vfp-6.d: Likewise.
* ld-arm/attr-merge-vfp-6r.d: Likewise.
* ld-arm/attr-merge-vfp-7.d: Likewise.
* ld-arm/attr-merge-vfp-7r.d: Likewise.
* ld-arm/attr-merge-vfp-8.d: Likewise.
* ld-arm/attr-merge-vfp-8r.d: Likewise.
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Add support to objdump for dumping the .avr.prop section in a structured
way.
binutils/ChangeLog:
* od-elf32_avr.c: Add elf32-avr.h include.
(OPT_AVRPROP): Define.
(options[]): Add 'avr-prop' entry.
(elf32_avr_help): Add avr-prop help text.
(elf32_avr_dump_avr_prop): New function.
(elf32_avr_dump): Add check for avr-prop.
bfd/ChangeLog:
* elf32-avr.h (struct avr_property_header): New strucure.
(avr_elf32_load_property_records): Declare.
(avr_elf32_property_record_name): Declare.
* elf32-avr.c: Add bfd_stdint.h include.
(retrieve_local_syms): New function.
(get_elf_r_symndx_section): New function.
(get_elf_r_symndx_offset): New function.
(internal_reloc_compare): New function.
(struct avr_find_section_data): New structure.
(avr_is_section_for_address): New function.
(avr_find_section_for_address): New function.
(avr_elf32_load_records_from_section): New function.
(avr_elf32_load_property_records): New function.
(avr_elf32_property_record_name): New function.
gas/testsuite/ChangeLog:
* gas/avr/avr-prop-1.d: New file.
* gas/avr/avr-prop-1.s: New file.
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Adds support to the assembler to write out data for tracking the use of
.org and .align directives. This data is collected within the assembler
and written out to a section ".avr.prop" (if there's anything to write
out).
This patch does not add any tests. The next patch in this series will
add a better mechanism for visualising the contents of .avr.prop which
will make writing tests much easier.
This patch also does not make any use of this collected data, that will
also come along in a later patch; the intended consumer is the linker,
during linker relaxation this information will be used to ensure that
the .org and .align directives are honoured.
bfd/ChangeLog:
* elf32-avr.h (AVR_PROPERTY_RECORD_SECTION_NAME): Define.
(AVR_PROPERTY_RECORDS_VERSION): Define.
(AVR_PROPERTY_SECTION_HEADER_SIZE): Define.
(struct avr_property_record): New structure.
gas/ChangeLog:
* config/tc-avr.c: Add elf32-avr.h include.
(struct avr_property_record_link): New structure.
(avr_output_property_section_header): New function.
(avr_record_size): New function.
(avr_output_property_record): New function.
(avr_create_property_section): New function.
(avr_handle_align): New function.
(exclude_section_from_property_tables): New function.
(create_record_for_frag): New function.
(append_records_for_section): New function.
(avr_create_and_fill_property_section): New function.
(avr_post_relax_hook): New function.
* config/tc-avr.h (md_post_relax_hook): Define.
(avr_post_relax_hook): Declare.
(HANDLE_ALIGN): Define.
(avr_handle_align): Declare.
(strut avr_frag_data): New structure.
(TC_FRAG_TYPE): Define.
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opcodes/
* sh-opc.h (clrs, sets): Mark as arch_sh3_nommu_up instead of
arch_sh_up.
(pref): Mark as arch_sh2a_nofpu_or_sh3_nommu_up instead of
arch_sh2a_nofpu_or_sh4_nommu_nofpu_up.
gas/testsuite/
* gas/sh/arch/arch.exp: Replace dead code to generate expected .s files
with ...
* gas/sh/arch/sh-opc-gen-as.pl: ... this new script.
* gas/sh/arch/arch_expected.txt: Regenerate.
* gas/sh/arch/sh-dsp.s: Likewise.
* gas/sh/arch/sh-opc-gen-as.pl: Likewise.
* gas/sh/arch/sh.s: Likewise.
* gas/sh/arch/sh2.s: Likewise.
* gas/sh/arch/sh2a-nofpu-or-sh3-nommu.s: Likewise.
* gas/sh/arch/sh2a-nofpu-or-sh4-nommu-nofpu.s: Likewise.
* gas/sh/arch/sh2a-nofpu.s: Likewise.
* gas/sh/arch/sh2a-or-sh3e.s: Likewise.
* gas/sh/arch/sh2a-or-sh4.s: Likewise.
* gas/sh/arch/sh2a.s: Likewise.
* gas/sh/arch/sh2e.s: Likewise.
* gas/sh/arch/sh3-dsp.s: Likewise.
* gas/sh/arch/sh3-nommu.s: Likewise.
* gas/sh/arch/sh3.s: Likewise.
* gas/sh/arch/sh3e.s: Likewise.
* gas/sh/arch/sh4-nofpu.s: Likewise.
* gas/sh/arch/sh4-nommu-nofpu.s: Likewise.
* gas/sh/arch/sh4.s: Likewise.
* gas/sh/arch/sh4a-nofpu.s: Likewise.
* gas/sh/arch/sh4a.s: Likewise.
* gas/sh/arch/sh4al-dsp.s: Likewise.
ld/testsuite/
* ld-sh/arch/arch_expected.txt: Regenerate.
* ld-sh/arch/sh-dsp.s: Likewise.
* ld-sh/arch/sh.s: Likewise.
* ld-sh/arch/sh2.s: Likewise.
* ld-sh/arch/sh2a-nofpu-or-sh3-nommu.s: Likewise.
* ld-sh/arch/sh2a-nofpu-or-sh4-nommu-nofpu.s: Likewise.
* ld-sh/arch/sh2a-nofpu.s: Likewise.
* ld-sh/arch/sh2a-or-sh3e.s: Likewise.
* ld-sh/arch/sh2a-or-sh4.s: Likewise.
* ld-sh/arch/sh2a.s: Likewise.
* ld-sh/arch/sh2e.s: Likewise.
* ld-sh/arch/sh3-dsp.s: Likewise.
* ld-sh/arch/sh3-nommu.s: Likewise.
* ld-sh/arch/sh3.s: Likewise.
* ld-sh/arch/sh3e.s: Likewise.
* ld-sh/arch/sh4-nofpu.s: Likewise.
* ld-sh/arch/sh4-nommu-nofpu.s: Likewise.
* ld-sh/arch/sh4.s: Likewise.
* ld-sh/arch/sh4a-nofpu.s: Likewise.
* ld-sh/arch/sh4a.s: Likewise.
* ld-sh/arch/sh4al-dsp.s: Likewise.
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2015-02-25 Matthew Wahab <matthew.wahab@arm.com>
* doc/c-arm.texi (-mcpu=): Add cortex-a53, cortex-a57 and
cortex-a72.
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bfd * elf32-v850.c (v850_set_note): New function. Creates a Renesas
style note entry.
(v850_elf_make_note_section): New function. Creates a note
section.
(v850_elf_create_sections): New function. Create a note section
if one is not already present.
(v850_elf_set_note): New function. Adds a note to a bfd.
(v850_elf_copy_private_bfd_data): New function. Copies V850
notes.
(v850_elf_merge_notes): New function. Merges V850 notes.
(print_v850_note): New function. Displays a V850 note.
(v850_elf_print_notes): New function. Displays all notes attached
to a bfd.
(v850_elf_merge_private_bfd_data): Call v850_elf_merge_notes.
(v850_elf_print_private_bfd_data): Call v850_elf_print_notes.
(v850_elf_fake_sections): Set the type of the V850 note section.
* bfd-in.h (v850_elf_create_sections): Add prototype.
(v850_elf_set_note): Add prototype.
* bfd-in2.h: Regenerate.
binutils* readelf.c (get_machine_flags): Remove deprecated V850 machine
flags.
(get_v850_section_type_name): New function. Handles V850 special
sections.
(get_section_type_name): Add support for V850.
(get_v850_elf_note_type): New function. Returns the name of a
V850 note.
(print_v850_note): New function. Prints a V850 note.
(process_v850_notes): New function. Prints V850 notes.
(process_note_sections): Add support for V850.
binutils/testsute
* binutils-all/objcopy.exp: Skip the strip-10 test for the V850.
gas * config/tc-v850.c (soft_float): New variable.
(v850_data_8): New variable.
(md_show_usage): Add -msoft-float/-mhard-float.
(md_parse_option): Likewise.
(md_begin): Set the default value of soft_float.
(v850_md_end): New function. Creates a note section.
* config/tc-v850.h (md_end): Define.
* doc/c-v850.texi: Document -msoft-float/-mhard-float.
gas/testsuite
* gas/elf/elf.exp: Add special version of the section2 test for
the V850.
* gas/elf/section2.e-v850: New file.
include/elf
* v850.h (EF_RH850_SIMD): Delete deprecated flag.
(EF_RH850_CACHE): Likewise.
(EF_RH850_MMU): Likewise.
(EF_RH850_DATA_ALIGN8): Likewise.
(SHT_RENESAS_IOP): Fix typo in name.
(SHT_RENESAS_INFO): Define.
(V850_NOTE_SECNAME): Define.
(SIZEOF_V850_NOTE): Define.
(V850_NOTE_NAME): Define.
(enum v850_notes): New enum.
(NUM_V850_NOTES): Define.
ld/ChangeLog
2015-02-24 Nick Clifton <nickc@redhat.com>
* Makefile.am (ev850.c): Add dependency upon
$(srcdir)/emultempl/v850elf.em.
(ev850_rh850.c): Likewise.
* Makefile.in: Regenerate.
* emultempl/v850elf.em: New file.
* emulparams/v850.sh (EXTRA_EM_FILE): Define.
* emulparams/v850_rh850.sh (EXTRA_EM_FILE): Define.
* scripttempl/v850.sc: Add .note.renesas section.
* scripttempl/v850_rh850.sc: Likewise.
ld/testsuite
* ld-elf/extract-symbol-1sec.d: Expect to fail on the V850.
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ld * Makefile.am: (ALL_EMULATION_SOURCES): Add new emulations.
* Makefile.in: Regenerate.
* configure.tgt: Add h8300-*-linux
* emulparams/h8300elf_linux.sh: Add new emulation.
* emulparams/h8300helf_linux.sh: Likewise.
* emulparams/h8300self_linux.sh: Likewise.
* emulparams/h8300sxelf_linux.sh: Likewise.
bfd * config.bfd: Add h8300-*-linux.
* configure.ac: Add h8300_elf32_linux_vec.
* configure: Regenerate.
* elf32-h8300.c: Likewise.
* targets.c(_bfd_target_vector): Likewise.
gas * config/tc-h8300.c (line_separater_chars): Add a version for
h8300-linux that includes a separator.
(default_mach): New variable.
(md_main): Use it.
(md_longopts): Add '--march' option.
(md_parse_option): Parse the new option.
* config/tc-h8300.h (TARGET_FORMAT): Add elf32-h8300-linux.
* configure.tgt: Add h8300-*-linux
* doc/c-h8300.texi: Document --march.
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the presence of function sections and linker garbage collection.
PR 17940
* dwarf2dbg.c (out_header): When generating dwarf sections use
real symbols not temps for the start and end symbols.
* config/tc-msp430.h (TC_FORCE_RELOCATION_SUB_SAME): Also prevent
adjustments to relocations in debug sections.
(TC_LINKRELAX_FIXUP): Likewise.
* elf32-msp430.c (msp430_elf_relax_delete_bytes): Adjust debug
symbols at end of sections. Adjust function sizes.
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* doc/as.texinfo (Local Symbol Names): Don't use ':' in pxref.
* doc/c-i386.texi: Reorder i386-Bugs after i386-Arch.
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2015-02-11 Matthew Wahab <matthew.wahab@arm.com>
* config/tc-aarch64.c (aarch64_cpus): Fix code formatting.
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2015-02-11 Matthew Wahab <matthew.wahab@arm.com>
* config/tc-arm.c: Add support for Cortex-A72.
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* config/tc-arm.c (warn_deprecated_sp): Use as_tsktsk instead
of as_warn for deprecation messages.
(encode_arm_addr_mode_2): Likewise.
(check_obsolete): Likewise.
(do_rd_rm_rn): Likewise.
(do_co_reg): Likewise.
(do_setend): Likewise.
(do_t_mov_cmp): Likewise.
(do_neon_ldr_str): Likewise.
(opcode_lookup): Likewise.
(if_fsm_post_encode): Likewise.
(md_assemble): Likewise.
* gas/arm/armv1.l: Remove 'Warning: ' from expected messages
for deprecations.
* gas/arm/armv8-a-bad.l: Likewise.
* gas/arm/armv8-a-it-bad.l: Likewise.
* gas/arm/depr-swp.l: Likewise.
* gas/arm/ldsgeb.l: Likewise.
* gas/arm/ldsgeh.l: Likewise.
* gas/arm/thumb2_bad_reg.l: Likewise.
* gas/arm/thumb32.l: Likewise.
* gas/arm/udf.l: Likewise.
* gas/arm/vstr-arm-bad.l: Likewise.
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While actually starting to use that new directive, I noticed a few
oversights of the original commit.
gas/
2015-02-06 Jan Beulich <jbeulich@suse.com>
* dw2gencfi.c (select_cie_for_fde): Also bail on CFI_label.
(cfi_change_reg_numbers): Also do nothing for CFI_label.
(cfi_pseudo_table): Also handle .cfi_label when not supporting
CFI directives.
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gcc-5 correctly complains "loop exit may only be reached after
undefined behavior". I was going to correct this by checking the
index before dereferencing the array rather than the other way around,
but then I noticed it is possible for extract_cmd to write the
terminating zero one past the end of "cmd". Fixing that means no
index check is needed in md_assemble.
* config/tc-msp430.c (md_assemble): Correct size passed to
extract_cmd. Remove index check.
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2015-02-04 Matthew Wahab <matthew.wahab@arm.com>
* config/tc-aarch64.c (aarch64_cpus): Add support for Cortex-A72.
* doc/c-aarch64.texi (-mcpu=): Add "cortex-a72".
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* config/rl78-parse.y (addsubw): Fix encoding of [HL] variant of
these instructions.
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2015-02-03 Renlin Li <renlin.li@arm.com>
gas/
* doc/c-aarch64.texi (.arch): Document the directive.
(.arch_extension): Likewise.
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* config/tc-rl78.h (TC_PARSE_CONS_EXPRESSION): Define.
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Relaxable fragments can be relaxed when there are alignment requirements.
Besides, insert a dummy fragment in the final to make sure that all
alignment is traversed. Finally, convert these fragments
in md_convert_frag with relax_table.
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FT32 is a new 32-bit RISC core developed by FTDI for embedded applications.
* configure.ac: Add FT32 support.
* configure: Regenerate.
bfd/
* Makefile.am: Add FT32 files.
* archures.c (enum bfd_architecture): Add bfd_arch_ft32.
(bfd_mach_ft32): Define.
(bfd_ft32_arch): Declare.
(bfd_archures_list): Add bfd_ft32_arch.
* config.bfd: Handle FT32.
* configure.ac: Likewise.
* cpu-ft32.c: New file.
* elf32-ft32.c: New file.
* reloc.c (BFD_RELOC_FT32_10, BFD_RELOC_FT32_20, BFD_RELOC_FT32_17,
BFD_RELOC_FT32_18): Define.
* targets.c (_bfd_target_vector): Add ft32_elf32_vec.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
* Makefile.in: Regenerate.
* configure: Regenerate.
* po/SRC-POTFILES.in: Regenerate.
binutils/
* readelf.c: Add FT32 support.
gas/
* Makefile.am: Add FT32 files.
* config/tc-ft32.c: New file.
* config/tc-ft32.h: New file.
* configure.tgt: Add FT32 support.
* Makefile.in: Regenerate.
* po/POTFILES.in: Regenerate.
gas/testsuite/
* gas/ft32/ft32.exp: New file.
* gas/ft32/insn.d: New file.
* gas/ft32/insn.s: New file.
include/
* dis-asm.h (print_insn_ft32): Declare.
include/elf/
* common.h (EM_FT32): Define.
* ft32.h: New file.
include/opcode/
* ft32.h: New file.
ld/
* Makefile.am: Add FT32 files.
* configure.tgt: Handle FT32 target.
* emulparams/elf32ft32.sh: New file.
* scripttempl/ft32.sc: New file.
* Makefile.in: Regenerate.
opcodes/
* Makefile.am: Add FT32 files.
* configure.ac: Handle FT32.
* disassemble.c (disassembler): Call print_insn_ft32.
* ft32-dis.c: New file.
* ft32-opc.c: New file.
* Makefile.in: Regenerate.
* configure: Regenerate.
* po/POTFILES.in: Regenerate.
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