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2016-06-30ChangeLog entry for the --with-cpu patch for ARC configuration.Andrew Burgess1-0/+8
2016-06-30MIPS16/GAS: Fix delay slot filling across fragsMatthew Fortune10-7/+186
Fix an assertion failure like: test.s: Assembler messages: test.s:3: Internal error! Assertion failure in append_insn at .../gas/config/tc-mips.c:7523. Please report this bug. triggered by assembling MIPS16 code like: hello: addiu $4, $4, 4 jr $31 with the generation of a listing file enabled, e.g.: $ as -mips16 -O2 -aln=test.lst The cause of the problem is the lack of support for moving instructions across frags in MIPS16 jump swapping, which triggers more easily with listing enabled as in that case every instruction gets placed in its own frag. It would trigger even with listing disabled though if the instruction to swap a MIPS16 jump with was unfortunately enough placed as last in a frag that became full. This scenario is already handled correctly with branch swapping in regular MIPS and microMIPS code, so reuse it for MIPS16 code as well, and now that all MIPS16 handling has become the same as the regular MIPS and microMIPS cases remove MIPS16 special casing altogether. This effectively complements: commit 464ab0e55ade01d2bb0b4fa45c429af7a2f85a26 Author: Maciej W. Rozycki <macro@linux-mips.org> Date: Mon Aug 6 20:33:00 2012 +0000 <https://sourceware.org/ml/binutils/2012-08/msg00043.html>, ("MIPS/GAS: Correct microMIPS branch swapping assertion") for the MIPS16 case. The assertion itself was introduced with: commit 1e91584932efd70020c8c98037d0cb93a0552a20 Author: Richard Sandiford <rdsandiford@googlemail.com> Date: Wed Mar 9 09:17:02 2005 +0000 <https://sourceware.org/ml/binutils/2005-03/msg00217.html>, ("Rework MIPS nop-insertion code, add -mfix-vr4130 [5/11]"), but its introduction merely noted our existing lack of support for MIPS16 jump swapping across frags. gas/ * config/tc-mips.c (append_insn) <APPEND_SWAP>: Do not special case MIPS16 handling. * testsuite/gas/mips/branch-swap-3.d: New test. * testsuite/gas/mips/branch-swap-4.d: New test. * testsuite/gas/mips/mips16@branch-swap-3.d: New test. * testsuite/gas/mips/mips16@branch-swap-4.d: New test. * testsuite/gas/mips/micromips@branch-swap-3.d: New test. * testsuite/gas/mips/micromips@branch-swap-4.d: New test. * testsuite/gas/mips/branch-swap-3.s: New test source. * testsuite/gas/mips/mips.exp: Run the new tests.
2016-06-30MIPS/GAS: Simplify non-MIPS16 branch swapping sequenceMaciej W. Rozycki2-3/+9
Simplify non-MIPS16 branch swapping by copying the MIPS16 variant, which sets the new position for the current instruction first and reduces the calculation of the new position of the previous instruction. Also refer to previous instruction's frag and position via `delay' for consistency. Reintroduce an explanatory comment, updated, previously removed with: commit 1e91584932efd70020c8c98037d0cb93a0552a20 Author: Richard Sandiford <rdsandiford@googlemail.com> Date: Wed Mar 9 09:17:02 2005 +0000 <https://sourceware.org/ml/binutils/2005-03/msg00217.html>, ("Rework MIPS nop-insertion code, add -mfix-vr4130 [5/11]"). gas/ * config/tc-mips.c (append_insn): Simplify non-MIPS16 branch swapping sequence.
2016-06-30PR gas/20312: Do not pad sections to alignment on failed assemblyMaciej W. Rozycki5-16/+33
Correct a regression from commit 85024cd8bcb9 ("Run write_object_file after errors") causing unsuccessful assembly, which may be due to any reason, such as supplying a valid source like this: .text .byte 0 .err to terminate with an assertion failure like: test.s: Assembler messages: test.s:3: Error: .err encountered ../as-new: BFD (GNU Binutils) 2.24.51.20140628 internal error, aborting at .../gas/write.c line 608 in size_seg ../as-new: Please report this bug. on targets whose default text section alignment is above 0, typically RISC machines. This is due to an attempt to set last text section's frag alignment to 0, requested from `subsegs_finish_section' where `frag_align_code (alignment, 0)' is called with `alignment' set to 0 rather than the section alignment if `had_errors' has returned true. The call to `subsegs_finish_section' is made from `subsegs_finish' from `write_object_file' at unsuccessful completion, which previously wasn't made. Always set last section's frag alignment from the section alignment then, forcing no section padding instead if completing unsuccessfully, so that in that case alignment padding is still suppressed from any listing generated, fixing assertion failures for these targets: alpha-linuxecoff -FAIL: all pr20312 arm-aout -FAIL: all pr20312 mips-freebsd -FAIL: all pr20312 mips-img-linux -FAIL: all pr20312 mips-linux -FAIL: all pr20312 mips-mti-linux -FAIL: all pr20312 mips-netbsd -FAIL: all pr20312 mips-sgi-irix5 -FAIL: all pr20312 mips-sgi-irix6 -FAIL: all pr20312 mips-vxworks -FAIL: all pr20312 mips64-freebsd -FAIL: all pr20312 mips64-img-linux -FAIL: all pr20312 mips64-linux -FAIL: all pr20312 mips64-mti-linux -FAIL: all pr20312 mips64-openbsd -FAIL: all pr20312 mips64el-freebsd -FAIL: all pr20312 mips64el-img-linux -FAIL: all pr20312 mips64el-linux -FAIL: all pr20312 mips64el-mti-linux -FAIL: all pr20312 mips64el-openbsd -FAIL: all pr20312 mipsel-freebsd -FAIL: all pr20312 mipsel-img-linux -FAIL: all pr20312 mipsel-linux -FAIL: all pr20312 mipsel-mti-linux -FAIL: all pr20312 mipsel-netbsd -FAIL: all pr20312 mipsel-vxworks -FAIL: all pr20312 mipsisa32-linux -FAIL: all pr20312 mipsisa32el-linux -FAIL: all pr20312 mipsisa64-linux -FAIL: all pr20312 mipsisa64el-linux -FAIL: all pr20312 sh-pe -FAIL: all pr20312 sparc-aout -FAIL: all pr20312 gas/ PR gas/20312 * write.c (subsegs_finish_section): Force no section padding to alignment on failed assembly, always set last frag's alignment from section. * testsuite/gas/all/pr20312.l: New list test. * testsuite/gas/all/pr20312.s: New test source. * testsuite/gas/all/gas.exp: Run the new test
2016-06-30Allow ARC target to be configured with --with-cpu=<cpu-name>.Andrew Burgess6-4/+46
gas * config.in (TARGET_WITH_CPU): Undefine. * configure.ac: Add --with-cpu support, and define in config.h. * configure: Regenerate. * config/tc-arc.c: Use TARGET_WITH_CPU to select default CPU. * NEWS: Mention new configure option.
2016-06-30[ARM][GAS] ARMv8.2 should enable ARMv8.1 NEON instructions.Matthew Wahab2-0/+83
GAS fails to recognize march=armv8.2-a as a superset of march=armv8.1-a when assembling NEON instructions. The patch corrects this, making -march=armv8.2-a -mfpu=neon-fp-armv8 enable the NEON intructions introduced with ARMv8.1-A. include/ 2016-06-30 Matthew Wahab <matthew.wahab@arm.com> * opcode/arm.h (ARM_ARCH_V8_2a): Add FPU_NEON_EXT_RDMA to the set of enabled FPU features. gas/ 2016-06-30 Matthew Wahab <matthew.wahab@arm.com> * testsuite/gas/arm/armv8_2+rdma.d: New.
2016-06-29Default to --enable-compressed-debug-sections=gas for Linux/x86H.J. Lu3-0/+18
--enable-compressed-debug-sections=gas added to binutils 2.26. Make it default for Linux/x86 targets in 2.27. * NEWS: Mention --enable-compressed-debug-sections=gas is the default for Linux/x86 targets. * configure.tgt (ac_default_compressed_debug_sections): Default to yes for Linux/x86 targets.
2016-06-29Correct fix for typoNick Clifton1-1/+1
2016-06-29Fix typoNick Clifton1-1/+1
2016-06-29GAS: Fix `abort' expansion in write.cMaciej W. Rozycki2-1/+4
Remove an internal diagnostic regression introduced with the inclusion of "libbfd.h" from write.c, added with: commit e7ff5c732e7b95aafccd0910ea1a5cb8251a1033 Author: Alan Modra <amodra@gmail.com> Date: Fri Feb 16 03:40:17 2007 +0000 That change made "libbfd.h" override the `abort' definition provided by "as.h" earlier on, making the message produced by any calls reached from write.c, which is a part of the GAS proper, look like they came from BFD, e.g.: .../gas/testsuite/gas/elf/type.s: Assembler messages: .../gas/testsuite/gas/elf/type.s:30: Error: symbol type "gnu_unique_object" is supported only by GNU targets ../as-new: BFD (GNU Binutils) 2.26.51.20160628 internal error, aborting at .../gas/write.c:608 in size_seg ../as-new: Please report this bug. vs: .../gas/testsuite/gas/elf/type.s: Assembler messages: .../gas/testsuite/gas/elf/type.s:30: Error: symbol type "gnu_unique_object" is supported only by GNU targets .../gas/testsuite/gas/elf/type.s: Internal error, aborting at .../gas/write.c:602 in size_seg Please report this bug. With the removal of "libbfd.h" restore the latter message format. gas/ * write.c: Remove "libbfd.h" inclusion.
2016-06-28Use `supports_gnu_unique' with the `unique_symbol' and `type' testsMaciej W. Rozycki2-2/+7
Complement commit a43942db49b0 ("LD/ELF: Unify STB_GNU_UNIQUE handling") and use `supports_gnu_unique' with the `unique_symbol' and `type' tests, fixing failures like: .../binutils/testsuite/binutils-all/unique.s: Assembler messages: .../binutils/testsuite/binutils-all/unique.s:2: Error: symbol type "gnu_unique_object" is supported only by GNU targets ERROR: .../binutils/testsuite/binutils-all/unique.s: assembly failed UNRESOLVED: ar unique symbol in archive .../binutils/ar -s -r -c tmpdir/artest.a tmpdir/unique.o Executing on host: .../binutils/ar -s -r -c tmpdir/artest.a tmpdir/unique.o (timeout = 300) .../binutils/ar: tmpdir/unique.o: No such file or directory FAIL: ar unique symbol in archive and: .../gas/testsuite/gas/elf/type.s: Assembler messages: .../gas/testsuite/gas/elf/type.s:30: Error: symbol type "gnu_unique_object" is supported only by GNU targets ../as-new: BFD (GNU Binutils) 2.26.51.20160628 internal error, aborting at .../gas/write.c:608 in size_seg ../as-new: Please report this bug. .../gas/testsuite/../../binutils/readelf -s dump.o | grep "1 *\[FIONTCU\]" > dump.out Executing on host: sh -c {.../gas/testsuite/../../binutils/readelf -s dump.o >readelf.out 2>gas.stderr} /dev/null (timeout = 300) readelf: Error: dump.o: Failed to read file's magic number FAIL: elf type list on MIPS/FreeBSD targets: mips-freebsd -FAIL: ar unique symbol in archive mips-freebsd -FAIL: elf type list mips64-freebsd -FAIL: ar unique symbol in archive mips64-freebsd -FAIL: elf type list mips64el-freebsd -FAIL: ar unique symbol in archive mips64el-freebsd -FAIL: elf type list mipsel-freebsd -FAIL: ar unique symbol in archive mipsel-freebsd -FAIL: elf type list binutils/ * testsuite/binutils-all/ar.exp: Use `supports_gnu_unique' with the `unique_symbol' test. gas/ * testsuite/gas/elf/elf.exp: Use `supports_gnu_unique' with the `type' test.
2016-06-28Fix new testcase for hppa64Alan Modra2-12/+14
Anything in first column is a label on hppa64. PR gas/20247 * testsuite/gas/elf/section11.s: Don't start directives in first column.
2016-06-28[AArch64] Make register indices be full 64-bit valuesRichard Sandiford3-0/+77
aarch64_opnd_info used bitfields to hold vector element indices, but values were stored into those bitfields before their ranges had been checked. This meant large invalid indices could be silently truncated to smaller valid indices. The two obvious fixes were to do the range checking earlier or use a full 64-bit field for the index. I went for the latter for two reasons: - Doing the range checking in operand_general_constraint_met_p seems structurally cleaner than doing it while parsing. - The bitfields didn't really buy us anything. The imm field of the union is already 128 bits, so we can use a full int64_t index without growing the structure. The patch also adds missing range checks for the elements in a register list index. include/ * opcode/aarch64.h (aarch64_opnd_info): Change index fields to int64_t. opcodes/ * aarch64-opc.c (operand_general_constraint_met_p): Check the range of ldst_elemlist operands. (print_register_list): Use PRIi64 to print the index. (aarch64_print_operand): Likewise. gas/ * testsuite/gas/aarch64/diagnostic.s, testsuite/gas/aarch64/diagnostic.l: Add tests for out-of-range indices.
2016-06-28MIPS16: Add R_MIPS16_PC16_S1 branch relocation supportMaciej W. Rozycki17-45/+209
For R_MIPS16_PC16_S1 the calculation is `(sign_extend(A) + S - P) >> 1' and the usual MIPS16 bit shuffling applies to relocated field handling, as per the encoding of the branch target in the extended form of the MIPS16 B, BEQZ, BNEZ, BTEQZ and BTNEZ instructions. include/ * elf/mips.h (R_MIPS16_PC16_S1): New relocation. bfd/ * elf32-mips.c (elf_mips16_howto_table_rel): Add R_MIPS16_PC16_S1. (mips16_reloc_map): Likewise. * elf64-mips.c (mips16_elf64_howto_table_rel): Likewise. (mips16_elf64_howto_table_rela): Likewise. (mips16_reloc_map): Likewise. * elfn32-mips.c (elf_mips16_howto_table_rel): Likewise. (elf_mips16_howto_table_rela): Likewise. (mips16_reloc_map): Likewise. * elfxx-mips.c (mips16_branch_reloc_p): New function. (mips16_reloc_p): Handle R_MIPS16_PC16_S1. (b_reloc_p): Likewise. (mips_elf_calculate_relocation): Likewise. (_bfd_mips_elf_check_relocs): Likewise. * reloc.c (BFD_RELOC_MIPS16_16_PCREL_S1): New relocation. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. gas/ * config/tc-mips.c (mips16_reloc_p): Handle BFD_RELOC_MIPS16_16_PCREL_S1. (b_reloc_p): Likewise. (limited_pcrel_reloc_p): Likewise. (md_pcrel_from): Likewise. (md_apply_fix): Likewise. (tc_gen_reloc): Likewise. (md_convert_frag): Likewise. (mips_fix_adjustable): Update comment. * testsuite/gas/mips/mips16-branch-reloc-2.d: Remove error output, add dump patterns. * testsuite/gas/mips/mips16-branch-reloc-3.d: Remove error output, add dump patterns. * testsuite/gas/mips/mips16-branch-addend-2.d: Remove error output, add dump patterns. * testsuite/gas/mips/mips16-branch-addend-3.d: Remove error output, add dump patterns. * testsuite/gas/mips/mips16-branch-absolute.d: Remove error output, add dump patterns. * testsuite/gas/mips/mips16-branch-reloc-2.l: Remove file. * testsuite/gas/mips/mips16-branch-reloc-3.l: Remove file. * testsuite/gas/mips/mips16-branch-addend-2.l: Remove file. * testsuite/gas/mips/mips16-branch-addend-3.l: Remove file. * testsuite/gas/mips/mips16-branch-absolute.l: Remove file. * testsuite/gas/mips/mips16-branch-addend-2.s: Add padding. * testsuite/gas/mips/branch-weak.s: Adjust alignment, avoid implicit instruction padding, avoid MIPS16 JR->JRC conversion. * testsuite/gas/mips/branch-weak-6.d: New test. * testsuite/gas/mips/branch-weak-7.d: New test. * testsuite/gas/mips/mips.exp: Run the new tests. ld/ * testsuite/ld-mips-elf/mips16-branch-2.d: New test. * testsuite/ld-mips-elf/mips16-branch-3.d: New test. * testsuite/ld-mips-elf/mips16-branch-addend-2.d: New test. * testsuite/ld-mips-elf/mips16-branch-addend-3.d: New test. * testsuite/ld-mips-elf/mips16-branch.s: New test source. * testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
2016-06-27Make the kernel dwarf stack unwinder work for ARC targets.Vineet Gupta3-3/+8
* config//tc-arc.c (tc_arc_frame_initial_instructions): Use cfi_add_CFA_def_cfa to generate default CFA with offset * testsuite/gas/cfi/cfi-arc-1.d: Update expected output.
2016-06-27oops - omitted from previous deltaNick Clifton1-0/+15
2016-06-27Add command line option to stop the assembler from padding the end of ↵Nick Clifton8-6/+69
sections to their alignment boundary. PR gas/20247 * as.h (do_not_pad_sections_to_alignment): New global variable. * as.c (show_usage): Add --no-pad-sections. (parse_args): Likewise. * write.c (size_seg): Skip padding the end of the section if requested from the command line. (SUB_SEGMENT_ALIGN): Likewise. * doc/as.texinfo: Document the new option. * NEWS: Mention the new feature. * testsuite/gas/elf/section11.s: New test. * testsuite/gas/elf/section11.d: New test driver. * testsuite/gas/elf/elf.exp: Run the new test.
2016-06-27add ChangeLog entriesTrevor Saunders1-0/+5
2016-06-27dlx: move prototype of dlx_set_skip_hi16 to elf/dlx.hTrevor Saunders2-1/+2
bfd/ChangeLog: 2016-06-27 Trevor Saunders <tbsaunde+binutils@tbsaunde.org> * elf32-dlx.h: New file. * elf32-dlx.c: Adjust. gas/ChangeLog: 2016-06-27 Trevor Saunders <tbsaunde+binutils@tbsaunde.org> * config/tc-dlx.c: Include bfd/elf32-dlx.h. * config/tc-dlx.h: Remove prototype of dlx_set_skip_hi16.
2016-06-27xtensa: remove a sentinalTrevor Saunders2-15/+21
gas/ChangeLog: 2016-06-27 Trevor Saunders <tbsaunde+binutils@tbsaunde.org> * config/tc-xtensa.c (xtensa_elf_suffix): Use ARRAY_SIZE instead of a sentinal element. (map_suffix_reloc_to_operator): Likewise. (map_operator_to_reloc): Likewise.
2016-06-27nds32: remove a sentinalTrevor Saunders2-14/+10
gas/ChangeLog: 2016-06-27 Trevor Saunders <tbsaunde+binutils@tbsaunde.org> * config/tc-nds32.c (md_begin): Use ARRAY_SIZE instead of a sentinal element in relax_table.
2016-06-25aarch64: make the type of reg_entry::type aarch64_reg_typeTrevor Saunders2-10/+15
gas/ChangeLog: 2016-06-25 Trevor Saunders <tbsaunde+binutils@tbsaunde.org> * config/tc-aarch64.c: Make the type of reg_entry::type aarch_reg_type.
2016-06-25remove a few sentinalsTrevor Saunders5-30/+35
gas/ChangeLog: 2016-06-25 Trevor Saunders <tbsaunde+binutils@tbsaunde.org> * config/tc-bfin.c (bfin_cpus): Remove sentinal. (md_parse_option): Adjust. * config/tc-aarch64.c (aarch64_parse_abi): Replace use of a sentinal with iteration from 0 to ARRAY_SIZE. * config/tc-mcore.c (md_begin): Likewise. * config/tc-visium.c (visium_parse_arch): Likewise. opcodes/ChangeLog: 2016-06-25 Trevor Saunders <tbsaunde+binutils@tbsaunde.org> * mcore-opc.h: Remove sentinal. * mcore-dis.c (print_insn_mcore): Adjust.
2016-06-25simplify tic54x_set_default_include ()Trevor Saunders2-14/+16
its only called with an argument of 0, so we might as well remove the code supporting other values. gas/ChangeLog: 2016-06-25 Trevor Saunders <tbsaunde+binutils@tbsaunde.org> * config/tc-tic54x.c (tic54x_set_default_include): remove argument and simplify accordingly. (tic54x_include): Adjust. (tic54x_mlib): Likewise.
2016-06-25xtensa: prototype xtensa_make_property_section in elf/xtensa.hTrevor Saunders2-4/+4
There's no reason to have multiple prototypes for the same function. include/ChangeLog: 2016-06-25 Trevor Saunders <tbsaunde+binutils@tbsaunde.org> * elf/xtensa.h (xtensa_make_property_section): New prototype. gas/ChangeLog: 2016-06-25 Trevor Saunders <tbsaunde+binutils@tbsaunde.org> * config/tc-xtensa.c (xtensa_make_property_section): Remove prototype. bfd/ChangeLog: 2016-06-25 Trevor Saunders <tbsaunde+binutils@tbsaunde.org> * elf32-xtensa.c (xtensa_make_property_section): Remove prototype.
2016-06-25MIPS16/GAS: Restore unsupported relocation diagnosticsMaciej W. Rozycki77-63/+1227
Correct a MIPS16 relocation handling regression in GAS introduced with: commit 177b4a6ad0047c8995fbc55016bc4f4b68d53b4a Author: Alexandre Oliva <aoliva@redhat.com> Date: Mon Mar 18 18:56:18 2002 +0000 discussed at <https://sourceware.org/ml/binutils/2002-03/msg00345.html>, which removed a preparatory call to `mips16_extended_frag' previously made from `md_estimate_size_before_relax'. As a result the function is never called with its `sec' parameter non-NULL and consequently all the unsupported relocation checks within are dead and never trigger, causing any unhandled relocations to silently resolve to 0. Unfortunately there was no sufficient test suite coverage back then to catch this. Remove all dead code then, and all the associated comments. Update the remaining call to `mips16_extended_frag' from `mips_relax_frag' to pass the relocation section as the `sec' parameter and use it to mark frags which require an external relocation, as extended. Finally handle any outstanding MIPS16 relocations in `md_convert_frag' and report an error since we don't support any except with percent operators. gas/ * config/tc-mips.c (append_insn): Use any `O_symbol' expression unchanged with relaxed MIPS16 instructions. (mips16_extended_frag): Adjust accordingly. Return 1 right away if a relocation will be required for the symbol requested. Remove dead first relaxation pass code. (mips_relax_frag): Pass `sec' down to `mips16_extended_frag'. (md_convert_frag): Adjust symbol value calculation. Raise an error if a relocation is required for the symbol requested. * testsuite/gas/mips/mips16@relax-swap3.d: Remove dump patterns, add error output. * testsuite/gas/mips/mips16@relax-swap3.l: New error output. * testsuite/gas/mips/mips16-pcrel-relax-0.d: New test. * testsuite/gas/mips/mips16-pcrel-relax-1.d: New test. * testsuite/gas/mips/mips16-pcrel-relax-2.d: New test. * testsuite/gas/mips/mips16-pcrel-relax-3.d: New test. * testsuite/gas/mips/mips16-pcrel-reloc-0.d: New test. * testsuite/gas/mips/mips16-pcrel-reloc-1.d: New test. * testsuite/gas/mips/mips16-pcrel-reloc-2.d: New test. * testsuite/gas/mips/mips16-pcrel-reloc-3.d: New test. * testsuite/gas/mips/mips16-pcrel-reloc-4.d: New test. * testsuite/gas/mips/mips16-pcrel-reloc-5.d: New test. * testsuite/gas/mips/mips16-pcrel-reloc-6.d: New test. * testsuite/gas/mips/mips16-pcrel-reloc-7.d: New test. * testsuite/gas/mips/mips16-pcrel-addend-0.d: New test. * testsuite/gas/mips/mips16-pcrel-addend-1.d: New test. * testsuite/gas/mips/mips16-pcrel-addend-2.d: New test. * testsuite/gas/mips/mips16-pcrel-addend-3.d: New test. * testsuite/gas/mips/mips16-pcrel-absolute.d: New test. * testsuite/gas/mips/mips16-branch-reloc-0.d: New test. * testsuite/gas/mips/mips16-branch-reloc-1.d: New test. * testsuite/gas/mips/mips16-branch-reloc-2.d: New test. * testsuite/gas/mips/mips16-branch-reloc-3.d: New test. * testsuite/gas/mips/mips16-branch-addend-0.d: New test. * testsuite/gas/mips/mips16-branch-addend-1.d: New test. * testsuite/gas/mips/mips16-branch-addend-2.d: New test. * testsuite/gas/mips/mips16-branch-addend-3.d: New test. * testsuite/gas/mips/mips16-branch-absolute.d: New test. * testsuite/gas/mips/mips16-absolute-reloc-0.d: New test. * testsuite/gas/mips/mips16-absolute-reloc-1.d: New test. * testsuite/gas/mips/mips16-absolute-reloc-2.d: New test. * testsuite/gas/mips/mips16-absolute-reloc-3.d: New test. * testsuite/gas/mips/mips16-pcrel-reloc-2.l: New error output. * testsuite/gas/mips/mips16-pcrel-reloc-3.l: New error output. * testsuite/gas/mips/mips16-pcrel-reloc-6.l: New error output. * testsuite/gas/mips/mips16-pcrel-reloc-7.l: New error output. * testsuite/gas/mips/mips16-pcrel-addend-2.l: New error output. * testsuite/gas/mips/mips16-pcrel-addend-3.l: New error output. * testsuite/gas/mips/mips16-pcrel-absolute.l: New error output. * testsuite/gas/mips/mips16-branch-reloc-2.l: New error output. * testsuite/gas/mips/mips16-branch-reloc-3.l: New error output. * testsuite/gas/mips/mips16-branch-addend-2.l: New error output. * testsuite/gas/mips/mips16-branch-addend-3.l: New error output. * testsuite/gas/mips/mips16-branch-absolute.l: New error output. * testsuite/gas/mips/mips16-absolute-reloc-2.l: New error output. * testsuite/gas/mips/mips16-absolute-reloc-3.l: New error output. * testsuite/gas/mips/mips16-pcrel-relax-0.s: New test source. * testsuite/gas/mips/mips16-pcrel-relax-2.s: New test source. * testsuite/gas/mips/mips16-pcrel-reloc-0.s: New test source. * testsuite/gas/mips/mips16-pcrel-reloc-1.s: New test source. * testsuite/gas/mips/mips16-pcrel-reloc-2.s: New test source. * testsuite/gas/mips/mips16-pcrel-reloc-3.s: New test source. * testsuite/gas/mips/mips16-pcrel-reloc-4.s: New test source. * testsuite/gas/mips/mips16-pcrel-reloc-5.s: New test source. * testsuite/gas/mips/mips16-pcrel-reloc-6.s: New test source. * testsuite/gas/mips/mips16-pcrel-reloc-7.s: New test source. * testsuite/gas/mips/mips16-pcrel-addend-0.s: New test source. * testsuite/gas/mips/mips16-pcrel-addend-1.s: New test source. * testsuite/gas/mips/mips16-pcrel-addend-2.s: New test source. * testsuite/gas/mips/mips16-pcrel-addend-3.s: New test source. * testsuite/gas/mips/mips16-pcrel-absolute.s: New test source. * testsuite/gas/mips/mips16-branch-reloc-0.s: New test source. * testsuite/gas/mips/mips16-branch-reloc-1.s: New test source. * testsuite/gas/mips/mips16-branch-reloc-2.s: New test source. * testsuite/gas/mips/mips16-branch-reloc-3.s: New test source. * testsuite/gas/mips/mips16-branch-addend-0.s: New test source. * testsuite/gas/mips/mips16-branch-addend-1.s: New test source. * testsuite/gas/mips/mips16-branch-addend-2.s: New test source. * testsuite/gas/mips/mips16-branch-addend-3.s: New test source. * testsuite/gas/mips/mips16-branch-absolute.s: New test source. * testsuite/gas/mips/mips16-absolute-reloc-0.s: New test source. * testsuite/gas/mips/mips16-absolute-reloc-1.s: New test source. * testsuite/gas/mips/mips16-absolute-reloc-2.s: New test source. * testsuite/gas/mips/mips16-absolute-reloc-3.s: New test source. * testsuite/gas/mips/mips.exp: Run the new tests.
2016-06-24alpha-openbsd build failureAlan Modra2-2/+5
This target doesn't build, due to a missing gas/config/te-obsd.h file. It's been that way since the commit switching to elf, in 2002. https://lists.gnu.org/archive/html/bug-gnu-utils/2002-07/msg00128.html * configure.tgt (alpha-*-openbsd*): Use em=nbsd.
2016-06-23MIPS/GAS: Keep the original microMIPS symbol reference in branch relocsMaciej W. Rozycki8-13/+161
Keep original microMIPS symbols in references from branch relocations so that the ISA bit is retained and can be verified for validity in static link. No need to update WRT MIPS16 symbols because we keep them all anyway for other reasons. gas/ * config/tc-mips.c (b_reloc_p): New function. (mips_fix_adjustable): Also keep the original microMIPS symbol referred from branch relocations. * testsuite/gas/mips/branch-local-1.d: New test. * testsuite/gas/mips/branch-local-n32-1.d: New test. * testsuite/gas/mips/branch-local-n64-1.d: New test. * testsuite/gas/mips/micromips@branch-misc-4-64.d: Update relocations. * testsuite/gas/mips/branch-local-1.s: New test source. * testsuite/gas/mips/mips.exp: Run the new cases.
2016-06-23[ARC] Misc minor edits/fixesGraham Markall2-36/+44
The code supporting -mspfp, -mdpfp, and -mfpuda options are in sections of code that are commented as being for backward compatibility only, and having no effect. However, they do have an effect, enabling the SPX, DPX, and DPA instruction subclasses respectively. This commit moves the code supporting these options away from the comments indicating that they are dummy options, and also fixes a small issue where -mnps400 had the additional effect of enabling SPX instructions. A couple of other minor edits (that make no functional change) are also included. gas/ChangeLog: * config/tc-arc.c (options, md_longopts, md_parse_option): Move -mspfp, -mdpfp and -mfpuda out of the sections for dummy options. Correct erroneous enabling of SPFP instructions when using -mnps400. include/ChangeLog: * opcode/arc.h: Make insn_class_t alphabetical again. opcodes/ChangeLog: * arc-opc.c: Correct description of availability of NPS400 features.
2016-06-23MIPS/GAS: Handle resolved R6 PC-relative relocations (ChangeLog)Maciej W. Rozycki1-0/+19
Add missing ChangeLog entry for commit 41947d9e38c4 ("MIPS/GAS: Handle resolved R6 PC-relative relocations").
2016-06-22Add support for yet some more new ISA 3.0 instructions.Peter Bergner3-0/+59
opcodes/ * ppc-opc.c (RM, DRM, VXASH, VXASH_MASK, XMMF, XMMF_MASK): New defines. (powerpc_opcodes) <brd, brh, brw, mffsce, mffscdrn, mffscdrni, mffscrn, mffscrni, mffsl, nandxor, rldixor, setbool, xor3>: New mnemonics. <setb>: Change to a VX form instruction. (insert_sh6): Add support for rldixor. (extract_sh6): Likewise. gas/ * testsuite/gas/ppc/power9.d <brd, brh, brw, mffs, mffs., mffsce, mffscdrn, mffscdrni, mffscrn, mffscrni, mffsl, nandxor, rldixor, setbool, xor3>: New tests. * testsuite/gas/ppc/power9.s: Likewise.
2016-06-22xtensa: include elf/xtensa.h in tc-xtensa.cTrevor Saunders2-4/+5
There's no reason to define these macros twice. gas/ChangeLog: 2016-06-22 Trevor Saunders <tbsaunde+binutils@tbsaunde.org> * config/tc-xtensa.c: Include elf/xtensa.h.
2016-06-21MIPS/GAS: Handle resolved R6 PC-relative relocationsMaciej W. Rozycki10-8/+427
Complement commit 7361da2c952e ("Add support for MIPS R6.") and fix internal errors like: foo.s: Assembler messages: foo.s: Internal error! Assertion failure in md_apply_fix at .../gas/config/tc-mips.c:15028. Please report this bug. triggered by resolved R6 PC-relative relocations in sources containing R6 code fragments wrapped into ISA override blocks embedded within code otherwise assembled for an older ISA. gas/ * config/tc-mips.c (calculate_reloc) <BFD_RELOC_HI16_S_PCREL> <BFD_RELOC_LO16_PCREL>: New switch cases. (md_apply_fix) <BFD_RELOC_HI16_S_PCREL, BFD_RELOC_LO16_PCREL>: Move switch cases along `BFD_RELOC_MIPS_JMP'. <BFD_RELOC_MIPS_21_PCREL_S2, BFD_RELOC_MIPS_26_PCREL_S2> <BFD_RELOC_MIPS_18_PCREL_S3, BFD_RELOC_MIPS_19_PCREL_S2>: Handle the resolved case. * testsuite/gas/mips/pcrel-reloc-4.d: New test. * testsuite/gas/mips/pcrel-reloc-4-r6.d: New test. * testsuite/gas/mips/pcrel-reloc-5.d: New test. * testsuite/gas/mips/pcrel-reloc-5-r6.d: New test. * testsuite/gas/mips/pcrel-reloc-6.d: New test. * testsuite/gas/mips/pcrel-reloc-6.l: New list test. * testsuite/gas/mips/pcrel-reloc-4.s: New test source. * testsuite/gas/mips/pcrel-reloc-6.s: New test source. * testsuite/gas/mips/mips.exp: Run the new tests.
2016-06-21MIPS/GAS: Fix null pointer dereferences in R6 PC-relative relocation checksMaciej W. Rozycki2-2/+8
Avoid segmentation faults in alignment checks made in `md_apply_fix' for BFD_RELOC_MIPS_18_PCREL_S3 and BFD_RELOC_MIPS_19_PCREL_S2 relocations caused by dereferencing `fixP->fx_addsy' which will be null if the relocation processed has been fully resolved. gas/ * config/tc-mips.c (md_apply_fix) <BFD_RELOC_MIPS_18_PCREL_S3> <BFD_RELOC_MIPS_19_PCREL_S2>: Avoid null pointer dereferences via `fixP->fx_addsy'.
2016-06-21MIPS/GAS: Correct BFD_RELOC_MIPS_18_PCREL_S3 calculationMaciej W. Rozycki2-1/+21
The PC-relative R_MIPS_PC18_S3 relocation and consequently its BFD internal BFD_RELOC_MIPS_18_PCREL_S3 representation is calculated from the address of the aligned doubleword containing the location being relocated: (sign_extend(A) + S - (P & ~0x7)) >> 3 rather than the address of the location itself. Reflect this in calculations made by GAS so that the relocated field is set correctly if resolved by GAS, such as with local symbols in the same section which do not require relocations to be propagated to the link stage. gas/ * config/tc-mips.c (md_pcrel_from) <BFD_RELOC_MIPS_18_PCREL_S3>: Calculate relocation from the containing aligned doubleword. (tc_gen_reloc) <BFD_RELOC_MIPS_18_PCREL_S3>: Calculate the addend from the containing aligned doubleword.
2016-06-21MIPS/GAS: Use the module level ISA setting for R6 relaxationMaciej W. Rozycki10-2/+112
Use the module level ISA setting rather than the last ISA selected with a `.set' directive in the source file in determination as to whether to keep PC-relative relocations and then with the original symbol referred, for the purpose of R6 linker relaxation. This is so that with e.g. code like this: b foo .set mips32r2 ... it's the command line options or any `.module' directive that decides how to encode any relocation for `foo' rather than the presence of `.set mips32r2'. gas/ * config/tc-mips.c (mips_force_relocation): Use `file_mips_opts' rather than `mips_opts' for the R6 ISA check. (mips_fix_adjustable): Likewise. * testsuite/gas/mips/pcrel-reloc-1.d: New test. * testsuite/gas/mips/pcrel-reloc-1-r6.d: New test. * testsuite/gas/mips/pcrel-reloc-2.d: New test. * testsuite/gas/mips/pcrel-reloc-2-r6.d: New test. * testsuite/gas/mips/pcrel-reloc-3.d: New test. * testsuite/gas/mips/pcrel-reloc-3-r6.d: New test. * testsuite/gas/mips/pcrel-reloc-1.s: New test source. * testsuite/gas/mips/mips.exp: Run the new tests.
2016-06-21Arc assembler: Convert nps400 from a machine type to an extension.Graham Markall16-100/+194
gas * config/tc-arc.c (check_cpu_feature, md_parse_option): Add nps400 option and feature. Add check for nps400 feature. Refactor existing checks to check subclass before feature enablement. (md_show_usage): Document flags for NPS-400 and add some other undocumented flags. (cpu_type): Remove nps400 CPU type entry (check_zol): Remove bfd_mach_arc_nps400 case. (md_show_usage): Add help on -mcpu=nps400. (cpu_types): Add entry for nps400 as arc700 plus nps400 extension set. * doc/c-arc.texi: Document the -mnps400, -mspfp, -mdpfp, and -fpuda flags. Document -mcpu=nps400. * testsuite/gas/arc/nps-400-0.d: Use -mcpu=arc700 -mnps400. Change expected flags to match ARC700 instead of NPS400. * testsuite/gas/arc/nps-400-1.d: Use -mcpu=arc700 -mnps400. * testsuite/gas/arc/nps-400-2.d: Likewise. * testsuite/gas/arc/nps-400-3.d: Likewise. * testsuite/gas/arc/nps-400-4.d: Likewise. * testsuite/gas/arc/nps-400-5.d: Likewise. * testsuite/gas/arc/nps-400-6.d: Likewise. * testsuite/gas/arc/nps-400-7.d: Likewise. * testsuite/gas/arc/textinsn2op01.s: Change opcode of myinsn to avoid clash with cbba instruction. * testsuite/gas/arc/textinsn2op01.d: Likewise. * testsuite/gas/arc/textinsn3op.d: Likewise. * testsuite/gas/arc/textinsn3op.s: Likewise. * testsuite/gas/arc/nps-400-0.d: Test using NPS-400 using -mcpu=nps400 as an alternative to -mcpu=arc700 -mnps400 flags. binutils* readelf.c (decode_ARC_machine_flags): Remove E_ARC_MACH_NPS400 case. ld * testsuite/ld-arc/nps-1a.d: Use -mcpu=arc700 -mnps400. * testsuite/ld-arc/nps-1b.d: Likewise. include * opcode/arc.h: Add nps400 extension and instruction subclass. Remove ARC_OPCODE_NPS400 * elf/arc.h: Remove E_ARC_MACH_NPS400 opcodes * arc-dis.c (arc_insn_length): Add comment on instruction length. Use same method for determining instruction length on ARC700 and NPS-400. (arc_insn_length, print_insn_arc): Remove bfd_mach_arc_nps400. * arc-nps400-tbl.h: Make all nps400 instructions ARC700 instructions with the NPS400 subclass. * arc-opc.c: Likewise. bfd * archures.c: Remove bfd_mach_arc_nps400. * bfd-in2.h: Likewise. * cpu-arc.c (arch_info_struct): Likewise. * elf32-arc.c (arc_elf_object_p, arc_elf_final_write_processing): Likewise.
2016-06-20MIPS/GAS/testsuite: Uniquely identify MIPS64r6 testsMaciej W. Rozycki3-2/+7
gas/ * testsuite/gas/mips/r6-64-n32.d: Change the `name' tag. * testsuite/gas/mips/r6-64-n64.d: Likewise.
2016-06-20MIPS/GAS: Update comment on jump reloc conversionMaciej W. Rozycki2-2/+7
Complement commit 44d3da233815 ("MIPS/GAS: Treat local jump relocs the same no matter if REL or RELA") and update and clarify the comment on jump reloc conversion. gas/ * config/tc-mips.c (mips_fix_adjustable): Update comment on jump reloc conversion.
2016-06-20Update the feature set for the Vulcan AArch64 cpu.Virendra Pathak2-2/+6
gas * config/tc-aarch64.c (aarch64_cpus): Update vulcan feature set.
2016-06-17opcodes,gas: sparc: fix rdasr,wrasr,rdpr,wrpr,rdhpr,wrhpr insns.Jose E. Marchesi14-77/+467
This patch fixes and expands the definition of the read/write instructions for ancillary-state, privileged and hyperprivileged registers in opcodes. It also adds support for three new v9m hyperprivileged registers: %hmcdper, %hmcddfr and %hva_mask_nz. Finally, the patch expands existing tests (and adds several new ones) in order to cover all the read/write instructions in all its variants. opcodes/ChangeLog: 2016-06-17 Jose E. Marchesi <jose.marchesi@oracle.com> * sparc-opc.c (rdasr): New macro. (wrasr): Likewise. (rdpr): Likewise. (wrpr): Likewise. (rdhpr): Likewise. (wrhpr): Likewise. (sparc_opcodes): Use the macros above to fix and expand the definition of read/write instructions from/to asr/privileged/hyperprivileged instructions. * sparc-dis.c (v9_hpriv_reg_names): Add %hmcdper, %hmcddfr and %hva_mask_nz. Prefer softint_set and softint_clear over set_softint and clear_softint. (print_insn_sparc): Support %ver in Rd. gas/ChangeLog: 2016-06-17 Jose E. Marchesi <jose.marchesi@oracle.com> * config/tc-sparc.c (hpriv_reg_table): Add registers %hmcdper, %hmcddfr and %hva_mask_nz. (sparc_ip): New handling of asr/privileged/hyperprivileged registers, adapted to the new form of the sparc opcodes table. * testsuite/gas/sparc/rdasr.s: New file. * testsuite/gas/sparc/rdasr.d: Likewise. * testsuite/gas/sparc/wrasr.s: Likewise. * testsuite/gas/sparc/wrasr.d: Likewise. * testsuite/gas/sparc/sparc.exp (sparc_elf_setup): Add rdasr and wrasr tests. * testsuite/gas/sparc/rdpr.d: Use -Av9m, as some privileged registers require it. * testsuite/gas/sparc/wrpr.s: Complete to cover all privileged registers and write instruction modalities. * testsuite/gas/sparc/wrpr.d: Likewise. * testsuite/gas/sparc/rdhpr.s: Likewise for hyperprivileged registers. * testsuite/gas/sparc/rdhpr.d: Likewise. * testsuite/gas/sparc/wrhpr.s: Likewise. * testsuite/gas/sparc/wrhpr.d: Likewise.
2016-06-17opcodes,gas: adjust sparc insns and make GAS aware of itJose E. Marchesi7-22/+75
This patch marks the SPARC instructions in the opcodes table with their proper opcode architectures, and makes the assembler aware of them. This allows the assembler to properly realize when a new instruction needs a higher architecture (after v9b) and to react accordingly emitting an error message or bumping the architecture. It also expands architecture mismatch tests to cover architectures higher than v9b, and fixes a couple of minor bugs in the GAS testsuite. opcodes/ChangeLog: 2016-06-17 Jose E. Marchesi <jose.marchesi@oracle.com> * sparc-opc.c (sparc_opcodes): Adjust instructions opcode architecture according to the hardware capabilities they require. (sparc_priv_regs): New table. (sparc_hpriv_regs): Likewise. (sparc_asr_regs): Likewise. (v9anotv9m): Define. gas/ChangeLog: 2016-06-17 Jose E. Marchesi <jose.marchesi@oracle.com> * config/tc-sparc.c (sparc_arch_table): adjust the GAS architectures to use the right opcode architecture. (sparc_md_end): Handle v9{c,d,e,v,m}. (sparc_ip): Fix some comments. * testsuite/gas/sparc/ldx_efsr.d: Fix the architecture of this instruction, which is v9d. * testsuite/gas/sparc/mwait.s: Remove the `rd %mwait,%g1' instruction from the test, as %mwait is not readable. * testsuite/gas/sparc/mwait.d: Likewise. * testsuite/gas/sparc/mism-1.s: Expand to check v9b and v9e mismatch architecture errors. * testsuite/gas/sparc/mism-2.s: New file.
2016-06-17gas: sparc: fix collision of registers and pseudo-ops.Jose E. Marchesi2-141/+264
The current sparc assembler breaks when the name of an ancillary-state register, privileged register or hyperprivileged register has a %-pseudo-operation name as a prefix. For example, %hmcdper and %hm(), or %hintp and %hi(). This patch fixes it by introducing a new table `perc_table' (for %-table) that contains an entry for every %name supported by the assembler, other than the general registers. This table is used to detect name collisions when the assembler tries to detect a %-pseudo-op. This patch also fixes a related bug, making sure that v9a_asr_table and hpriv_reg_table are sorted in reverse lexicographic order, as otherwise the search code may fail. gas/ChangeLog: 2016-06-17 Jose E. Marchesi <jose.marchesi@oracle.com> * config/tc-sparc.c (priv_reg_table): Use NULL instead of the empty string to mark the end of the array. (hpriv_reg_table): Likewise. (v9a_asr_table): Likewise. (cmp_reg_entry): Handle entries with NULL names. (F_POP_V9): Define. (F_POP_PCREL): Likewise. (F_POP_TLS_CALL): Likewise. (F_POP_POSTFIX): Likewise. (struct pop_entry): New type. (pop_table): New variable. (enum pop_entry_type): New type. (struct perc_entry): Likewise. (NUM_PERC_ENTRIES): Define. (perc_table): New variable. (cmp_perc_entry): New function. (md_begin): Sort hpriv_reg_table and v9a_asr_table, and initialize perc_table. (sparc_ip): Handle entries with NULL names in priv_reg_table, hpriv_reg_table and v9a_asr_table. Use perc_table to handle %-pseudo-ops.
2016-06-15Fix simple gas testsuite failures.Nick Clifton31-529/+626
binutils* readelf.c (is_24bit_abs_reloc): Add support for R_FT32_20 reloc. gas * config/tc-ft32.c (md_assemble): Call dwarf2_emit_insn with the instruction size. * config/tc-mcore.c (md_assemble): Likewise. * config/tc-mn10200.c (md_assemble): Likewise. * config/tc-moxie.c (md_assemble): Likewise. * config/tc-pj.c (md_apply_fix): Handle BFD_RELOC_PJ_CODE_REL32. * testsuite/gas/all/gas.exp (diff1 test): Alpha sort list of exception targets. Add alpha, hppa, microblaze and rl78 to list of exceptions. (forward): Add microblaze to list of exceptions. (fwdexp): Add alpha to list of exceptions. (redef2): Add arm-epoc-pe and rl78 to list of exceptions. (redef3): Add rl78 and x86_64 cygwin to list of exceptions. (do_930509a): Alpha sort list of exception targets. Add h8300 and mn10200 to list of exceptions. (align2): Expect to fail for nds32. (cond): Add alpha and rl78 to list of exceptions. * testsuite/gas/all/none.d: Skip for ft32 and hppa. * testsuite/gas/all/string.d: Skip for tic4x. * testsuite/gas/alpha/alpha.exp: Note that the alpha-linuxecoff target does not support ELF. * testsuite/gas/arm/blx-bl-convert.dL Skip for the nto target. * testsuite/gas/cfi/cfi-alpha-2.d: All extended format names. * testsuite/gas/cfi/cfi.exp: Alpha sort list of targets. Skip SH tests for sh-pe and sh-rtemscoff targets. * testsuite/gas/elf/elf.exp (redef): Add rl78, xgate and vax to list of exceptions. (type): Run the noifunc version for alpha-freebsd and visium. * testsuite/gas/elf/warn-2.s: Do not expect to fail on the mcore, mn10200 or moxie targets. * testsuite/gas/ft32/insn.d: Update expected disassembly. * testsuite/gas/i386/i386.exp (x86-64-pcrel): Skip for cygwin targets. * testsuite/gas/lns/lns.exp (lns-common-1): No longer skip for mcore and rx targets. * testsuite/gas/macros/macros.exp (dot): Add exceptions for ns32k, rl78 and vax. (purge): Expect to fail on the ns32k and vax. * testsuite/gas/nds32/alu-2.d: Update expected disassembly. * testsuite/gas/nds32/ls.d: Likewise. * testsuite/gas/nds32/sys-reg.d: Likewise. * testsuite/gas/nds32/usr-spe-reg.d: Likewise. * testsuite/gas/pe/aligncomm-d.d: Skip for the sh. * testsuite/gas/pe/section-align-3.d: Likewise. * testsuite/gas/pe/section-exclude.d: Likewise. * testsuite/gas/ppc/test2xcoff32.d: Pass once all the required data has been seen. * testsuite/gas/ppc/textalign-xcoff-001.d: Fix up regexp to allow for variations in whitespace. * testsuite/gas/tilepro/t_constants.d: Pass once all the required data has been seen. * testsuite/gas/tilepro/t_constants.s (.safe_word): New macro. Installs a 32-bit value without generating warnings on 64-bit hosts. Use the new macro to replace the .word directives. opcodes * nds32-dis.c (nds32_parse_audio_ext): Change printing of integer constants to match expected behaviour. (nds32_parse_opcode): Likewise. Also for whitespace.
2016-06-15opcodes/arc: Fix extract for some add_s instructionsAndrew Burgess3-0/+17
The extract function used for some arc_s instructions was not implemented, and instead always returned 0. Fixed in this commit. opcodes/ChangeLog: * arc-opc.c (extract_rhv1): Extract value from insn. gas/ChangeLog: * testsuite/gas/arc/add_s.d: New file. * testsuite/gas/arc/add_s.s: New file.
2016-06-14opcode/gas: Fix incorrect dates on ChangeLog entriesGraham Markall1-3/+3
When committing three recent patches incorrect dates were left on the ChangeLog entries in gas/ChangeLog and opcodes/ChangeLog. Fixed in this commit.
2016-06-14[ARC] Add ldbit for npsGraham Markall3-0/+71
This commit adds the ldbit instruction for the NPS-400. The ldbit instruction uses the same encoding as the ld instruction, but sets the ZZ field to 11 (which is a reserved setting), and sets the AA field to 1 or 2 for the x2 and x4 flags respectively.
2016-06-14[ARC] Add deep packet inspection instructions for npsGraham Markall3-35/+142
With the exception of ldbit, this commit adds implementations of all DPI instructions for the NPS-400. These instructions are: - hash / hash.p[0-3] - tr - utf8 - e4by - addf
2016-06-14[ARC] Add arithmetic and logic instructions for npsGraham Markall3-0/+289
This commit completes the implementation of arithmetic and logic instructions for the NPS-400. These instructions are: - calcbsd / calcbxd - calckey / calcxkey - mxb / imxb - addl, subl, orl, andl, xorl - andab / orab - lbdsize - bdlen - csms, csma, cbba - zncv - hofs
2016-06-14Fix compile time warning building gas for the NDS32 with gcc v6.1.1Nick Clifton2-1/+6
gas * config/tc-nds32.c (nds32_get_align): Avoid left shifting a signed constant.
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