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2016-03-22replace some raw xmalloc / xrealloc with the XNEW* macrosTrevor Saunders4-20/+33
This increases consistancy of how we allocate memory, and always casting the result to the proper type. It also helps make sure we get any use of sizeof on the result type correct. gas/ChangeLog: 2016-03-22 Trevor Saunders <tbsaunde+binutils@tbsaunde.org> * listing.c (listing_message): Use XNEW style allocation macros. * read.c (read_a_source_file): Likewise. (read_symbol_name): Likewise. (s_mri_common): Likewise. (assign_symbol): Likewise. (s_reloc): Likewise. (emit_expr_with_reloc): Likewise. (s_incbin): Likewise. (s_include): Likewise. * sb.c (sb_build): Likewise. (sb_check): Likewise.
2016-03-22Fix tic54x regressionAlan Modra2-3/+4
One of the tic54x testcases looks for a section alignment of 1. After 9136aa49 the alignment became 0. While it happens that an alignment of 0 is treated as an alignment of 1, there is no reason to not apply the explicit alignment. * write.c (record_alignment): Revert 2016-02-18 change.
2016-03-22Remove more alloca callsAlan Modra3-5/+16
* config/tc-alpha.c (load_expression): Replace alloca with xmalloc. (emit_jsrjmp, tc_gen_reloc): Likewise. * config/tc-i370.c (i370_macro): Likewise.
2016-03-22Add -Wstack-usage to the gcc warning flags list, but only if using a ↵Nick Clifton2-1/+23
sufficiently recent version of gcc. bfd * warning.m4 (GCC_WARN_CFLAGS): Only add -Wstack-usage if using a sufficiently recent version of GCC. * configure: Regenerate. others * configure: Regenerate.
2016-03-21arc/nps400: Add first nps400 instructionsAndrew Burgess5-0/+54
Adds the first few nps400 instructions. gas/ChangeLog: * testsuite/gas/arc/nps400-0.d: New file. * testsuite/gas/arc/nps400-0.s: New file. * testsuite/gas/arc/nps400-1.d: New file. * testsuite/gas/arc/nps400-1.s: New file. include/ChangeLog: * opcodes/arc.h (insn_class_t): Add BITOP type. opcodes/ChangeLog: * arc-nps400-tbl.h: New file. * arc-opc.c: Add top level comment. (insert_nps_3bit_dst): New function. (extract_nps_3bit_dst): New function. (insert_nps_3bit_src2): New function. (extract_nps_3bit_src2): New function. (insert_nps_bitop_size): New function. (extract_nps_bitop_size): New function. (arc_flag_operands): Add nps400 entries. (arc_flag_classes): Add nps400 entries. (arc_operands): Add nps400 entries. (arc_opcodes): Add nps400 include.
2016-03-21arc/opcodes: Use flag operand class to handle multiple flag matchesAndrew Burgess5-6/+36
When parsing the operand instruction flags we don't currently detect the case where multiple flags are provided from the same class set, these will be accepted and the bit values merged together, resulting in the wrong instruction being assembled. For example: adc.n.eq r0,r0,r2 Will assemble without error, yet, upon disassembly, the instruction will actually be: adc.c r0,r0,r2 In a later commit the concept of required flags will be introduced. Required flags are just like normal instruction flags, except that they must be present for the instruction to match. Adding this will allow for simpler instructions in the instruction table, and allow for more sharing of operand extraction and insertion functions. To solve both of the above issues (multiple flags being invalid, and required flags), this commit reworks the flag class mechanism. Currently the flag class is never used. Each instruction can reference multiple flag classes, each flag class has a class type and a set of flags. However, at present, the class type is never used. The current values identify the type of instruction that the flag will be used in, but this is not required information. Instead, this commit discards the old flag classes, and introduces 3 new classes. The first F_CLASS_NONE, is just a NULL marker value, and is only used in the NULL marker flag class. The other two flag classes are F_FLAG_OPTIONAL, and F_FLAG_REQUIRED. The class F_FLAG_OPTIONAL has the property that at most one of the flags in the flag set for that class must be present in the instruction. The "at most" one means that no flags being present is fine. The class F_FLAG_REQUIRED is not currently used, but will be soon. With this class, exactly one of the flags from this class must be present in the instruction. If the flag class contains a single flag, then of course that flag must be present. However, if the flag class contained two or more, then one, and only one of them must be present. gas/ChangeLog: * config/tc-arc.c (find_opcode_match): Move lnflg, and i declarations to start of block. Reset code on all flags before attempting to match them. Handle multiple hits on the same flag. Handle flag class. * testsuite/gas/arc/asm-errors.d: New file. * testsuite/gas/arc/asm-errors.err: New file. * testsuite/gas/arc/asm-errors.s: New file. include/ChangeLog: * opcode/arc.h (flag_class_t): Remove all old flag classes, add 3 new classes instead. opcodes/ChangeLog: * arc-opc.c (arc_flag_classes): Convert all flag classes to use the new class enum values.
2016-03-21arc: Add nps400 machine type, and assembler flag.Andrew Burgess2-0/+8
This commit introduces the nps400 machine type as a variant of arc. There's a new flag in the assembler to select this machine type. All other changes are just adding handling of the new machine type into the relevant places. The nps400 is an arc700 variant with some vendor specific instructions added into the instruction set. This commit does not add any of the new instructions, this is just laying the groundwork for future commits. However, in preparation for these new instructions a new opcode define for nps400 has been added to include/opcode/arc.h, this new opcode define is used in the assembler and disassembler along with the existing define for arc700 such that when assembling and disassembling for nps400 the user will have access to all arc700 instructions and all the nps400 vendor extension instructions. bfd/ChangeLog: * archures.c (bfd_mach_arc_nps400): Define. * bfd-in2.h: Regenerate. * cpu-arc.c (arch_info_struct): New entry for nps400, renumber some existing entries to make space. * elf32-arc.c (arc_elf_object_p): Add nps400 case. (arc_elf_final_write_processing): Likewise. binutils/ChangeLog: * readelf.c (decode_ARC_machine_flags): Handle nps400. gas/ChangeLog: * config/tc-arc.c (cpu_types): Add nps400 entry. (check_zol): Handle nps400. include/ChangeLog: * elf/arc.h (E_ARC_MACH_NPS400): Define. * opcode/arc.h (ARC_OPCODE_NPS400): Define. opcodes/ChangeLog: * arc-dis.c (print_insn_arc): Handle nps400.
2016-03-21arc: Remove EF_ARC_CPU_GENERIC constant.Andrew Burgess2-4/+8
The constant EF_ARC_CPU_GENERIC is defined in the include/elf/arc.h file, and is used in a few places in binutils, however, this constant should never make it into the elf header flags; we always set a valid cpu type in the assembler, which should then be copied over during linking. There are some non-gnu arc compilers that don't write an architecture type into the e_flags field, instead leaving the field as 0, which is the EF_ARC_CPU_GENERIC value. This non-gnu compiler uses the machine type to distinguish between the old and newer arc architectures, setting the machine type to EM_ARC_COMPACT for old arc600, arc601, and arc700 architectures, while using EM_ARC_COMPACT2 for newer arcem and archs architectures. Previously when displaying the machine flags for an older EM_ARC_COMPACT machine, if the e_flags had not been filled in, then we relied on the default case statement to display the message "Generic ARCompact", while in the EM_ARC_COMPACT2 case we specifically handled EF_ARC_CPU_GENERIC to print "ARC Generic", leaving the default case to print a message about unrecognised cpu flag. After this commit EF_ARC_CPU_GENERIC has been removed, for both machine types EM_ARC_COMPACT and EM_ARC_COMPACT2 we now rely on the default case statement to handle the situation where the e_flags has not been filled in. The message displayed is now "Unknown ARCompact" (for older arc architectures) and "Unknown ARC" (for the newer architectures). The switch from "Generic" to "Unknown" in the message string is for clarity, calling the file "Generic" can give the impression that the file is compiled for a common sub-set of the architectures, and would therefore run on any type of machine (or at least any type of new or old machine depending on if the machine type is ARC or ARCv2). However, this was not what "Generic" meant, it really meant "Unknown", so that's what we now say. As part of the merging of the readelf flag reading code, I have unified the strings used in displaying the ELF ABI. This means that for older arc machines (arc600, arc601, and arc700) the string used for the original ABI, and ABIv2 have changed, the current ABIv3 remains the same. For the newer architectures (arcem and archs) the abi strings remain unchanged in all cases. bfd/ChangeLog: * elf32-arc.c (arc_elf_print_private_bfd_data): Remove use of EF_ARC_CPU_GENERIC. (arc_elf_final_write_processing): Don't bother setting cpu field in e_flags, this will have been set elsewhere. binutils/ChangeLog: * readelf.c (get_machine_flags): Move arc processing into... (decode_ARC_machine_flags): ... new function. Remove use of EF_ARC_CPU_GENERIC, change default case from "generic arc" to "unknown arc". Merged ABI printing between two machine types. gas/ChangeLog: * config/tc-arc.c (arc_select_cpu): Remove use of EF_ARC_CPU_GENERIC. include/ChangeLog: * elf/arc.h (EF_ARC_CPU_GENERIC): Delete. Update related comment.
2016-03-21arc/gas: default mach is arc700, initialised in md_beginAndrew Burgess2-41/+50
This commit restructures the selection of the default cpu/mach so that the choice is made from md_begin (if the user has not provided a command line choice). This will reduce the amount of change needed in a later patch. At the request of Synopsys, the default architecture changes to ARC700 from this commit, previously the default was a non-existent super-architecture that contained all instructions from all arc variants. There's some clean up associated with removing the default merged architecture, and a small test fix now that the default is ARC700. binutils/ChangeLog: * testsuite/binutils-all/objdump.exp (cpus_expected): Add ARC700 to the architecture list. gas/ChangeLog: * config/tc-arc.c (arc_target): Delay initialisation until arc_select_cpu. (arc_target_name): Likewise. (arc_features): Likewise. (arc_mach_type): Likewise. (cpu_types): Remove "all" entry. (arc_select_cpu): New function, most of the content is from... (md_parse_option): ... here. Call new arc_select_cpu. (md_begin): Call arc_select_cpu if needed, default is now arc700. include/ChangeLog: * opcode/arc.h (ARC_OPCODE_BASE): Delete. opcodes/ChangeLog: * arc-opc.c (BASE): Delete.
2016-03-21gas/arc: Fix test for big-endian arcAndrew Burgess3-0/+15
The inline-data test checks the specific bytes laid down by the assembler, and so relies on the endianness of the target. I could change the expected results to be endian agnostic, however, I worried that a bug in the assembler that gets the endianness wrong would then slip through. Instead I add a new test for big-endian arc, and restrict the existing test to little-endian arc. gas/ChangeLog: * testsuite/gas/arc/inline-data-1.d: Add target restriction. * testsuite/gas/arc/inline-data-2.d: New file.
2016-03-21Remove use of alloca.Nick Clifton24-146/+226
bfd * warning.m4 (GCC_WARN_CFLAGS): Add -Wstack-usage=262144 * configure: Regenerate. * elf32-m68hc1x.c (elf32_m68hc11_relocate_section): Replace use of alloca with call to xmalloc. * elf32-nds32.c: Likewise. * elf64-hppa.c: Likewise. * elfxx-mips.c: Likewise. * pef.c: Likewise. * pei-x86_64.c: Likewise. * som.c: Likewise. * xsym.c: Likewise. binutils * dlltool.c: Replace use of alloca with call to xmalloc. * dllwrap.c: Likewise. * nlmconv.c: Likewise. * objdump.c: Likewise. * resrc.c: Likewise. * winduni.c: Likewise. * configure: Regenerate. gas * atof-generic.c: Replace use of alloca with call to xmalloc. * cgen.c: Likewise. * dwarf2dbg.c: Likewise. * macro.c: Likewise. * remap.c: Likewise. * stabs.c: Likewise. * symbols.c: Likewise. * config/obj-elf.c: Likewise. * config/tc-aarch64.c: Likewise. * config/tc-arc.c: Likewise. * config/tc-arm.c: Likewise. * config/tc-avr.c: Likewise. * config/tc-ia64.c: Likewise. * config/tc-mips.c: Likewise. * config/tc-msp430.c: Likewise. * config/tc-nds32.c: Likewise. * config/tc-ppc.c: Likewise. * config/tc-sh.c: Likewise. * config/tc-tic30.c: Likewise. * config/tc-tic54x.c: Likewise. * config/tc-xstormy16.c: Likewise. * config/te-vms.c: Likewise. * configure: Regenerate. ld * emultempl/msp430.em: Replace use of alloca with call to xmalloc. * plugin.c: Likewise. * pe-dll.c: Likewise.
2016-03-20tc-i386.c: store encoded instructions in unsigned char[]Trevor Saunders2-33/+68
char can be a signed type, and some of the values in these arrays are greater than 0x80 which means they are outside of the range a signed char can store. Fortunately it seems most compilers handle this in the obvious way by storing the same bits as a negative number, but this is wierd and easily fixed. gas/ChangeLog: 2016-03-20 Trevor Saunders <tbsaunde+binutils@tbsaunde.org> * tc-i386.c (f32_1): Change type to unsigned char[]. (f32_2): Likewise. (f32_3): Likewise. (f32_4): Likewise. (f32_5): Likewise. (f32_6): Likewise. (f32_7): Likewise. (f32_8): Likewise. (f32_9): Likewise. (f32_10): Likewise. (f32_11): Likewise. (f32_12): Likewise. (f32_13): Likewise. (f32_14): Likewise. (f16_3): Likewise. (f16_4): Likewise. (f16_5): Likewise. (f16_6): Likewise. (f16_7): Likewise. (f16_8): Likewise. (jump_31): Likewise. (f32_patt): Likewise. (f16_patt): Likewise. (alt_3): Likewise. (alt_4): Likewise. (alt_5): Likewise. (alt_6): Likewise. (alt_7): Likewise. (alt_8): Likewise. (alt_9): Likewise. (alt_10): Likewise. (alt_patt): Likewise.
2016-03-18Update description of AArch64 assembler directives.Nick Clifton2-4/+45
gas * doc/c-aarch64.texi (AArch64 Directives): Add descriptions of .cpu, .dword, .even, .inst. .tlsdescadd, .tlsdesccall, .tlsdescldr and .xword directives.
2016-03-18Fix the disassembly of the AArch64's OOR instruction as a MOV instruction.Nick Clifton3-0/+19
PR target/19721 opcodes * aarch64-tbl.h (aarch64_opcode_table): Fix type of second operand of MOV insn that aliases an ORR insn. gas * testsuite/gas/aarch64/pr19721.s: New test source file. * testsuite/gas/aarch64/pr19721.d: New test driver file.
2016-03-18Fix generation of as.1 manual page so that it can be converted to DocBook ↵Nick Clifton2-0/+7
format. gas * doc/as.texinfo: Place the target specific command line options into their own man page section. etc * texi2pod.pl: Add TARGET to the list of recognised man page sections.
2016-03-17testsuite/ChangeLog is no longer supposed to existAlan Modra2-13/+7
move entries to main ChangeLog
2016-03-16[ARM] Support ARMv8.2 FP16 simd instructionsJiong Wang8-23/+766
gas/ * config/tc-arm.c (N_S_32): New. (N_F_16_32): Likewise. (N_SUF_32): Support N_F16. (N_IF_32): Likewise. (neon_dyadic_misc): Likewise. (do_neon_cmp): Likewise. (do_neon_cmp_inv): Likewise. (do_neon_mul): Likewise. (do_neon_fcmp_absolute): Likewise. (do_neon_step): Likewise. (do_neon_abs_neg): Likewise. (CVT_FLAVOR_VAR): Likewise. (do_neon_cvt_1): Likewise. (do_neon_recip_est): Likewise. (do_vmaxnm): Likewise. (do_vrint_1): Likewise. (neon_check_type): Check architecture support for FP16 extension. (insns): Update comments. * testsuite/gas/arm/armv8-2-fp16-simd.s: New test source. * testsuite/gas/arm/armv8-2-fp16-simd.d: New testcase for arm mode. * testsuite/gas/arm/armv8-2-fp16-simd-thumb.d: Likewise for thumb mode. * testsuite/gas/arm/armv8-2-fp16-simd-warning.d: New rejection test for arm mode. * testsuite/gas/arm/armv8-2-fp16-simd-warning-thumb.d: Likewise for thumb mode. * testsuite/gas/arm/armv8-2-fp16-simd-warning.l: New expected rejection error file. opcode/ * arm-dis.c (neon_opcodes): Support new FP16 instructions.
2016-03-16Fix checking bignum values that are being inserted into byte sized containers.Nick Clifton6-8/+80
* read.c (emit_expr_with_reloc): Add code check a bignum with nbytes == 1. * config/rx/rx-parse.y (rx_intop): Accept bignum values for sizes other than 32-bits. * testsuite/gas/elf/bignum.s: New test source file. * testsuite/gas/elf/bignum.d: New test driver file. * testsuite/gas/elf/elf.exp: Run the new test.
2016-03-15Update x86 register name documentation.Ulrich Drepper2-7/+48
* doc/c-i386.texi (Register Naming): Update to details of the latest architecture version.
2016-03-10PR gas/19744: Thumb-1 pcrop relocations don't work on Thumb-2 targetsMickael Guene7-8/+101
gas/ * config/tc-arm.c (do_arit): Protect against bad relocations usage. (do_mov): Likewise. (do_t_add_sub): Allow pcrop relocations for Thumb-2 targets. (do_t_mov_cmp): Likewise. (do_t_add_sub): Protect against bad relocations usage. (do_t_mov_cmp): Likewise. gas/testsuite/ * gas/arm/adds-thumb1-reloc-local-armv7-m.s: New. * gas/arm/adds-thumb1-reloc-local-armv7-m.d: New. * gas/arm/movs-thumb1-reloc-local-armv7-m.s: New. * gas/arm/movs-thumb1-reloc-local-armv7-m.d: New. ld/ * testsuite/ld-arm/arm-elf.exp: New tests. * testsuite/ld-arm/thumb1-adds-armv7-m.s: New. * testsuite/ld-arm/thumb1-movs-armv7-m.s: New.
2016-03-09fixup -Wshadow warnings on gcc-4.7Trevor Saunders2-17/+25
gcc 4.7 complains about variables that shadow function names, which now happens in tc-arm.c because there is a global function do_align (), and local variables do_align. The simplest fix for this seems to be to rename those variables to do_alignment. gas/ChangeLog: 2016-03-09 Trevor Saunders <tbsaunde+binutils@tbsaunde.org> * config/tc-arm.c (neon_alignment_bit): Rename do_align to do_alignment. (do_neon_ld_st_lane): Likewise. (do_neon_ld_dup): Likewise.
2016-03-08[ARC] Allow non-instruction relocations within .text sectionsClaudiu Zissulescu3-0/+16
bfd/ 2016-03-08 Cupertino Miranda <Cupertino.Miranda@synopsys.com> Andrew Burgess <andrew.burgess@embecosm.com> * elf32-arc.c (arc_bfd_get_32): Becomes an alias for bfd_get_32. (arc_bfd_put_32): Becomes an alias for bfd_put_32. (arc_elf_howto_init): Added assert to validate relocations. (get_middle_endian_relocation): Delete. (middle_endian_convert): New function. (ME): Redefine, now does nothing. (IS_ME): New define. (arc_do_relocation): Extend the attached 'ARC_RELOC_HOWTO' definition to call middle_endian_convert. Add a new local variable and make use of this throughout. Added call to arc_bfd_get_8 and arc_bfd_put_8 for 8 bit relocations. gas/ 2016-03-08 Andrew Burgess <andrew.burgess@embecosm.com> * testsuite/gas/arc/inline-data-1.d: New file. * testsuite/gas/arc/inline-data-1.s: New file. include/ 2016-03-08 Cupertino Miranda <Cupertino.Miranda@synopsys.com> Andrew Burgess <andrew.burgess@embecosm.com> * elf/arc-reloc.def: Add a call to ME within the formula for each relocation that requires middle-endian correction.
2016-03-07[ARM] Add support for Cortex-R8Thomas Preud'homme3-0/+9
2016-03-07 Andre Vieira <andre.simoesdiasvieira@arm.com> gas/ * config/tc-arm.c (arm_cpus): Add cortex-r8. * doc/c-arm.texi: Add cortex-r8.
2016-03-07Add const qualifiers at various places.Trevor Saunders16-147/+154
opcodes * mcore-opc.h: Add const qualifiers. * microblaze-opc.h (struct op_code_struct): Likewise. * sh-opc.h: Likewise. * tic4x-dis.c (tic4x_print_indirect): Likewise. (tic4x_print_op): Likewise. include * opcode/dlx.h (struct dlx_opcode): Add const qualifiers. * opcode/h8300.h (struct h8_opcode): Likewise. * opcode/hppa.h (struct pa_opcode): Likewise. * opcode/msp430.h: Likewise. * opcode/spu.h (struct spu_opcode): Likewise. * opcode/tic30.h (struct _register): Likewise. * opcode/tic4x.h (struct tic4x_register): Likewise. (struct tic4x_cond): Likewise. (struct tic4x_indirect): Likewise. (struct tic4x_inst): Likewise. * opcode/visium.h (struct reg_entry): Likewise. gas * config/tc-arc.c: Add const qualifiers. * config/tc-h8300.c (md_begin): Likewise. * config/tc-ia64.c (print_prmask): Likewise. * config/tc-msp430.c (msp430_operands): Likewise. * config/tc-nds32.c (struct suffix_name): Likewise. (struct nds32_parse_option_table): Likewise. (struct nds32_set_option_table): Likewise. (do_pseudo_pushpopm): Likewise. (do_pseudo_pushpop_stack): Likewise. (nds32_relax_relocs): Likewise. (nds32_flag): Likewise. (struct nds32_hint_map): Likewise. (nds32_find_reloc_table): Likewise. (nds32_match_hint_insn): Likewise. * config/tc-s390.c: Likewise. * config/tc-sh.c (get_specific): Likewise. * config/tc-tic30.c: Likewise. * config/tc-tic4x.c (tic4x_inst_add): Likewise. (tic4x_indirect_parse): Likewise. * config/tc-vax.c (vax_cons): Likewise. * config/tc-z80.c (struct reg_entry): Likewise. * config/tc-epiphany.c (md_assemble): Adjust. (epiphany_assemble): New function. (epiphany_elf_section_rtn): Call do_align directly. (epiphany_elf_section_text): Likewise. * config/tc-ip2k.c (ip2k_elf_section_rtn): Likewise. (ip2k_elf_section_text): Likewise. * read.c (do_align): Make it not static. * read.h (do_align): New prototype.
2016-03-04[ARM] Build attributes for ARMv8.1-A AdvSIMDMatthew Wahab4-1/+46
binutils/ 2016-03-04 Matthew Wahab <matthew.wahab@arm.com> * readelf.c (arm_attry_tag_FP_arch): Add "NEON for ARMv8.1". gas/ 2016-03-04 Matthew Wahab <matthew.wahab@arm.com> * config/tc-arm.c (aeabi_set_public_attributes): Emit attribute for ARMv8.1 AdvSIMD use. * testsuite/gas/arm/attr-march-armv8-a+rdma.d: New. * testsuite/gas/arm/attr-march-armv8_1-a+simd.d: New. Change-Id: I3c356e0681b97df2f9c0dabd7c0fd1b441cc2755
2016-03-04[ARM] Add feature check for ARMv8.1 AdvSIMD instructions.Matthew Wahab7-48/+255
gas/ 2016-03-04 Matthew Wahab <matthew.wahab@arm.com> * config/gas/tc-arm.c (fpu_neon_ext_v8_1): Restrict to the ARMv8.1 RDMA feature. (record_feature_use): New. (mark_feature_used): Use record_feature_use. (do_neon_qrdmlah): New. (insns): Use do_neon_qrdmlah for vqrdmlah and vqrdmlsh and variants. (arm_extensions): Put into alphabetical order. Re-indent "simd" and "rdma" entries. Fix the incorrect merge value for "+rdma". * testsuite/gas/arm/armv8-a+rdma-warning.d: New. * testsuite/gas/arm/armv8-a+rdma.d: Add assembler command line options. Make source file explicit. * testsuite/gas/arm/armv8-a+rdma.l: New. * testsuite/gas/arm/armv8-a+rdma.s: Remove .arch and .arch_extension directives. Fix white-space. * testsuite/gas/arm/armv8_1-a+simd.d: New. include/opcode 2016-03-04 Matthew Wahab <matthew.wahab@arm.com> * arm.h (ARM_ARCH_V8_1A): Add FPU_NEON_EXT_RDMA. (ARM_CPU_HAS_FEATURE): Add comment. Change-Id: Ie19250e8fa50aed44e44ab40ff30b04b38bc1a3d
2016-03-02Adjust testsuite/gas/i386/x86_64-intel.d for COFFH.J. Lu2-1/+5
* testsuite/gas/i386/x86_64-intel.d: Adjusted for COFF.
2016-02-29[ARC] Local symbols relocation cleanupClaudiu Zissulescu6-37/+66
bfd/ 2016-02-29 Cupertino Miranda <cmiranda@synopsys.com> * elf32-arc.c (elf_arc_relocate_section): Added rules to fix the relocation addend when sections get merged. gas/ 2016-02-29 Cupertino Miranda <cmiranda@synopsys.com> Claudiu Zissulescu <Claudiu.Zissulescu@synopsys.com> * config/tc-arc.c (arc_extra_reloc): Change size to 0. (tc_arc_fix_adjustable): Changed default return value to 1. * testsuite/gas/arc/j.d: Updated expected symbol * testsuite/gas/arc/jl.d: Likewise * testsuite/gas/arc/relax-avoid1.d: Likewise * testsuite/gas/arc/st.d: Likewise ld/ 2016-02-29 Cupertino Miranda <cmiranda@synopsys.com> * testsuite/ld-elf/merge.d: Removed xfail for ARC. * testsuite/ld-elf/merge2.d: Likewise. * testsuite/ld-elf/merge3.d: Likewise.
2016-02-29[ARC] General fixes.Claudiu Zissulescu2-1/+5
bfd/ 2016-02-29 Cupertino Miranda <Cupertino.Miranda@synopsys.com> * elf32-arc.c (arc_elf_final_write_processing): Add condition to the flag change. (elf_arc_relocate_section): Fixes and conditions to support PIE. Assert for code sections dynamic relocs. gas/ 2016-02-29 Claudiu Zissulescu <Claudiu.Zissulescu@synopsys.com> * config/tc-arc.c: Enable code density instructions for ARC EM. ld/ 2016-02-29 Cupertino Miranda <Cupertino.Miranda@synopsys.com> * scripttempl/arclinux.sc: Force .tdata and .tbss to always be generated.
2016-02-26Add aarch64-*-rtems* targetJoel Sherrill1-1/+1
2016-02-26Add ChangeLog entries for PR ld/19645H.J. Lu1-0/+38
2016-02-26Properly implement STT_COMMONH.J. Lu20-8/+342
The BFD configure option, --enable-elf-stt-common, can't be to used to verify STT_COMMON implementation with the normal binutils build. Instead, this patch removes it from BFD. It adds --elf-stt-common=[no|yes] to ELF assembler/objcopy and adds -z common/-z nocommon to ld. A configure option, --enable-elf-stt-common, is added to gas to specify whether ELF assembler should generate common symbols with the STT_COMMON type by default. Since BSF_KEEP_G is never used, it is renamed to BSF_ELF_COMMON for ELF common symbols. bfd/ PR ld/19645 * bfd.c (bfd): Change flags to 20 bits. (BFD_CONVERT_ELF_COMMON): New. (BFD_USE_ELF_STT_COMMON): Likewise. (BFD_FLAGS_SAVED): Add BFD_CONVERT_ELF_COMMON and BFD_USE_ELF_STT_COMMON. (BFD_FLAGS_FOR_BFD_USE_MASK): Likewise. * configure.ac: Remove --enable-elf-stt-common. * elf.c (swap_out_syms): Choose STT_COMMON or STT_OBJECT for common symbol depending on BFD_CONVERT_ELF_COMMON and BFD_USE_ELF_STT_COMMON. * elfcode.h (elf_slurp_symbol_table): Set BSF_ELF_COMMON for STT_COMMON. * elflink.c (bfd_elf_link_mark_dynamic_symbol): Also check STT_COMMON. (elf_link_convert_common_type): New function. (elf_link_output_extsym): Choose STT_COMMON or STT_OBJECT for common symbol depending on BFD_CONVERT_ELF_COMMON and BFD_USE_ELF_STT_COMMON. Set sym.st_info after sym.st_shndx. * elfxx-target.h (TARGET_BIG_SYM): Add BFD_CONVERT_ELF_COMMON and BFD_USE_ELF_STT_COMMON to object_flags. (TARGET_LITTLE_SYM): Likewise. * syms.c (BSF_KEEP_G): Renamed to ... (BSF_ELF_COMMON): This. * bfd-in2.h: Regenerated. * config.in: Likewise. * configure: Likewise. binutils/ PR ld/19645 * NEWS: Mention --elf-stt-common= for objcopy. * doc/binutils.texi: Document --elf-stt-common= for objcopy. * objcopy.c (do_elf_stt_common): New. (command_line_switch): Add OPTION_ELF_STT_COMMON. (copy_options): Add --elf-stt-common=. (copy_usage): Add --elf-stt-common=. (copy_object): Also check do_elf_stt_common for ELF targets. (copy_file): Handle do_elf_stt_common. (copy_main): Handle OPTION_ELF_STT_COMMON. * readelf.c (apply_relocations): Support STT_COMMON. * testsuite/binutils-all/common-1.s: New file. * testsuite/binutils-all/common-1a.d: Likewise. * testsuite/binutils-all/common-1b.d: Likewise. * testsuite/binutils-all/common-1c.d: Likewise. * testsuite/binutils-all/common-1d.d: Likewise. * testsuite/binutils-all/common-1e.d: Likewise. * testsuite/binutils-all/common-1f.d: Likewise. * testsuite/binutils-all/common-2.s: Likewise. * testsuite/binutils-all/common-2a.d: Likewise. * testsuite/binutils-all/common-2b.d: Likewise. * testsuite/binutils-all/common-2c.d: Likewise. * testsuite/binutils-all/common-2d.d: Likewise. * testsuite/binutils-all/common-2e.d: Likewise. * testsuite/binutils-all/common-2f.d: Likewise. * testsuite/binutils-all/objcopy.exp (objcopy_test_elf_common_symbols): New proc. Run objcopy_test_elf_common_symbols for ELF targets gas/ PR ld/19645 * NEWS: Mention --enable-elf-stt-common and --elf-stt-common= for ELF assemblers. * as.c (flag_use_elf_stt_common): New. (show_usage): Add --elf-stt-common=. (option_values): Add OPTION_ELF_STT_COMMON. (std_longopts): Add --elf-stt-common=. (parse_args): Handle --elf-stt-common=. * as.h (flag_use_elf_stt_common): New. * config.in: Regenerated. * configure: Likewise. * configure.ac: Add --enable-elf-stt-common and define DEFAULT_GENERATE_ELF_STT_COMMON. * gas/write.c (write_object_file): Set BFD_CONVERT_ELF_COMMON and BFD_USE_ELF_STT_COMMON if flag_use_elf_stt_common is set. * doc/as.texinfo: Document --elf-stt-common=. * testsuite/gas/elf/common3.s: New file. * testsuite/gas/elf/common3a.d: Likewise. * testsuite/gas/elf/common3b.d: Likewise. * testsuite/gas/elf/common4.s: Likewise. * testsuite/gas/elf/common4a.d: Likewise. * testsuite/gas/elf/common4b.d: Likewise. * testsuite/gas/i386/dw2-compress-3b.d: Likewise. * testsuite/gas/i386/dw2-compressed-3b.d: Likewise. * testsuite/gas/elf/elf.exp: Run common3a, common3b, common4a and common4b. * testsuite/gas/i386/dw2-compress-3.d: Renamed to ... * testsuite/gas/i386/dw2-compress-3a.d: This. Pass --elf-stt-common=no to as. * testsuite/gas/i386/dw2-compressed-3.d: Renamed to ... * testsuite/gas/i386/dw2-compressed-3a.d: This. Pass --elf-stt-common=no to as. * testsuite/gas/i386/i386.exp: Run dw2-compress-3a, dw2-compress-3b, dw2-compressed-3a and dw2-compressed-3b instead of dw2-compress-3 and dw2-compressed-3. include/ PR ld/19645 * bfdlink.h (bfd_link_elf_stt_common): New enum. (bfd_link_info): Add elf_stt_common. ld/ PR ld/19645 * NEWS: Mention -z common/-z nocommon for ELF targets. * emultempl/elf32.em (gld${EMULATION_NAME}_handle_option): Handle -z common and -z nocommon. * ld.texinfo: Document -z common/-z nocommon. * lexsup.c (elf_shlib_list_options): Add -z common/-z nocommon. * testsuite/ld-elf/tls_common.exp: Test --elf-stt-common=no and --elf-stt-common=yes with assembler. * testsuite/ld-elfcomm/common-1.s: New file. * testsuite/ld-elfcomm/common-1a.d: Likewise. * testsuite/ld-elfcomm/common-1b.d: Likewise. * testsuite/ld-elfcomm/common-1c.d: Likewise. * testsuite/ld-elfcomm/common-1d.d: Likewise. * testsuite/ld-elfcomm/common-1e.d: Likewise. * testsuite/ld-elfcomm/common-1f.d: Likewise. * testsuite/ld-elfcomm/common-2.s: Likewise. * testsuite/ld-elfcomm/common-2a.d: Likewise. * testsuite/ld-elfcomm/common-2b.d: Likewise. * testsuite/ld-elfcomm/common-2c.d: Likewise. * testsuite/ld-elfcomm/common-2d.d: Likewise. * testsuite/ld-elfcomm/common-2e.d: Likewise. * testsuite/ld-elfcomm/common-2f.d: Likewise. * testsuite/ld-elfcomm/common-3a.rd: Likewise. * testsuite/ld-elfcomm/common-3b.rd: Likewise. * testsuite/ld-i386/pr19645.d: Likewise. * testsuite/ld-i386/pr19645.s: Likewise. * testsuite/ld-x86-64/largecomm-1.s: Likewise. * testsuite/ld-x86-64/largecomm-1a.d: Likewise. * testsuite/ld-x86-64/largecomm-1b.d: Likewise. * testsuite/ld-x86-64/largecomm-1c.d: Likewise. * testsuite/ld-x86-64/largecomm-1d.d: Likewise. * testsuite/ld-x86-64/largecomm-1e.d: Likewise. * testsuite/ld-x86-64/largecomm-1f.d: Likewise. * testsuite/ld-x86-64/pr19645.d: Likewise. * testsuite/ld-x86-64/pr19645.s: Likewise. * testsuite/ld-elfcomm/elfcomm.exp: Test --elf-stt-common=yes with assembler. (assembler_generates_commons): Removed. Run -z common/-z nocommon tests. Run *.d tests. * testsuite/ld-i386/i386.exp: Run pr19645. * testsuite/ld-x86-64/x86-64.exp: Likewise. * testsuite/ld-x86-64/dwarfreloc.exp: Test --elf-stt-common with assembler. Test STT_COMMON with readelf.
2016-02-25Convert more variables to a constant form.Trevor Saunders42-135/+205
* as.c (select_emulation_mode): Add const qualifiers. * as.h: Likewise. * config/bfin-defs.h: Likewise. * config/bfin-parse.y: Likewise. * config/rx-parse.y: Likewise. * config/tc-aarch64.c (struct aarch64_option_table): Likewise. (struct aarch64_cpu_option_table): Likewise. (struct aarch64_arch_option_table): Likewise. (struct aarch64_option_cpu_value_table): Likewise. (struct aarch64_long_option_table): Likewise. (struct aarch64_option_abi_value_table): Likewise. * config/tc-arm.c (struct reloc_entry): Likewise. (tc_gen_reloc): Likewise. (struct arm_option_table): Likewise. (struct arm_legacy_option_table): Likewise. (struct arm_cpu_option_table): Likewise. (struct arm_arch_option_table): Likewise. (struct arm_option_extension_value_table): Likewise. (struct arm_option_fpu_value_table): Likewise. (struct arm_option_value_table): Likewise. (struct arm_long_option_table): Likewise. * config/tc-avr.c (struct avr_opcodes_s): Likewise. (struct mcu_type_s): Likewise. (struct exp_mod_s): Likewise. (avr_operand): Likewise. (avr_operands): Likewise. * config/tc-d10v.c (md_begin): Likewise. * config/tc-dlx.c: Likewise. * config/tc-fr30.c (fr30_is_colon_insn): Likewise. * config/tc-ft32.c (parse_condition): Likewise. * config/tc-h8300.c (do_a_fix_imm): Likewise. * config/tc-hppa.c (pa_ip): Likewise. (hppa_regname_to_dw2regnum): Likewise. * config/tc-i370.c (i370_elf_suffix): Likewise. * config/tc-i960.c (struct tabentry): Likewise. * config/tc-m32r.c: Likewise. * config/tc-m68k.c: Likewise. * config/tc-m68k.h: Likewise. * config/tc-mcore.c (parse_psrmod): Likewise. * config/tc-metag.c (struct metag_core_option): Likewise. (struct metag_long_option): Likewise. * config/tc-microblaze.c: Likewise. * config/tc-mips.c (macro): Likewise. * config/tc-mn10200.c: Likewise. * config/tc-mn10300.c: Likewise. * config/tc-msp430.c (struct rcodes_s): Likewise. (struct hcodes_s): Likewise. (md_parse_option): Likewise. * config/tc-ns32k.c (struct ns32k_option): Likewise. (optlist): Likewise. * config/tc-ppc.c (ppc_elf_suffix): Likewise. (tc_ppc_regname_to_dw2regnum): Likewise. * config/tc-ppc.h: Likewise. * config/tc-rl78.c: Likewise. * config/tc-rx.c (struct cpu_type): Likewise. * config/tc-sh.c (sh_regname_to_dw2regnum): Likewise. * config/tc-sparc.c (struct priv_reg_entry): Likewise. (sparc_ip): Likewise. * config/tc-spu.c (insn_fmt_string): Likewise. * config/tc-tic54x.c (tic54x_set_default_include): Likewise. * config/tc-v850.c: Likewise. * config/tc-visium.c (struct visium_arch_option_table): Likewise. (struct visium_long_option_table): Likewise. * config/tc-xgate.c: Likewise. * config/tc-z8k.c: Likewise. * read.c (add_include_dir): Likewise. * read.h: Likewise.
2016-02-25gas: Update tests for big-endian arc targetsAndrew Burgess4-3/+10
Some gas tests are excluded for arc targets using the pattern arc-*-*, however this only covers little endian arc targets. This commit extends the patter to cover big endian arc targets, the pattern is now arc*-*-*. gas/ChangeLog: * testsuite/gas/all/gas.exp: Change target pattern to cover arceb-*. * testsuite/gas/all/redef3.d: Likewise. * testsuite/gas/elf/elf.exp: Likewise.
2016-02-24[GAS][ARM][3/3]Add armv8.2 fp16 scalar instruction support. Based on SE_H ↵Renlin Li8-39/+801
instruction shape. gas/ 2016-02-24 Renlin Li <renlin.li@arm.com> * config/tc-arm.c (BAD_FP16): New error message macro. (do_scalar_fp16_v82_encode): Change the coproc field to 9 for armv8.2 fp16 scalar instructions. (neon_check_type): Allow different size from key. (do_vfp_nsyn_add_sub): Add support SE_H shape support. (try_vfp_nsyn): Likewise. (do_vfp_nsyn_mla_mls): Likewise. (do_vfp_nsyn_fma_fms): Likewise. (do_vfp_nsyn_ldm_stm): Likewise (do_vfp_nsyn_sqrt): Likewise (do_vfp_nsyn_div): Likewise (do_vfp_nsyn_nmul): Likewise. (do_vfp_nsyn_cmp): Likewise. (do_neon_shll): Likewise. (do_vfp_nsyn_cvt_fpv8): Likewise. (do_neon_cvttb_2): Likewise. (do_neon_mov): Likewise. (do_neon_rshift_round_imm): Likewise. (do_neon_ldr_str): Likewise. (do_vfp_nsyn_fpv8): Likewise. (do_vmaxnm): Likewise. (do_vrint_1): Likewise. (insns): New entry for vins, vmovx. (md_apply_fix): Left shift 1 bit for fp16 vldr/vstr. * testsuite/gas/arm/armv8-2-fp16-scalar-thumb.d: New. * testsuite/gas/arm/armv8-2-fp16-scalar.d: New. * testsuite/gas/arm/armv8-2-fp16-scalar.s: New. * testsuite/gas/arm/armv8-2-fp16-scalar-bad.s: New * testsuite/gas/arm/armv8-2-fp16-scalar-bad.d: New * testsuite/gas/arm/armv8-2-fp16-scalar-bad.l: New
2016-02-24[GAS][ARM][2/3]Add SE_H shape to represent fp16 type.Renlin Li2-7/+86
gas/ 2016-02-24 Renlin Li <renlin.li@arm.com> * config/tc-arm.c (NEON_ENC_TAB): Add fp16 instruction shape. (neon_shape_class): New SC_HALF. (neon_shape_el): New SE_H. (neon_shape_el_size): New size for SE_H. (N_F_ALL): New macro to aggregate N_F16, N_F32, N_64. (neon_select_shape): Add SE_H support code. (el_type_of_type_chk): Use N_F_ALL. (do_vfp_nsyn_cvt): Add SE_H shape support. (do_neon_cvtz): Likewise. (do_neon_cvt_1): Likewise. (do_neon_cvttb_1): Likewise.
2016-02-24[OPCODES][ARM][1/3]Add armv8.2 fp16 instruction dissembler support.Renlin Li3-3/+8
opcodes/ 2016-02-24 Renlin Li <renlin.li@arm.com> * arm-dis.c (coprocessor_opcodes): Add fp16 instruction entries. (print_insn_coprocessor): Support fp16 instruction. gas/ 2016-02-24 Renlin Li <renlin.li@arm.com> * testsuite/gas/arm/copro.d: Adjust output. * testsuite/gas/arm/copro.s: Adjust co-processor num.
2016-02-24[OPCODES][ARM]Fix mask for a few coprocessor opcodes.Renlin Li3-0/+50
opcodes/ 2016-02-24 Renlin Li <renlin.li@arm.com> * arm-dis.c (coprocessor_opcodes): Fix mask for vsel, vmaxnm, vminnm, vrint(mpna). gas/ 2016-02-24 Renlin Li <renlin.li@arm.com> * testsuite/gas/arm/mask_1.d: New. * testsuite/gas/arm/mask_1.s: New.
2016-02-24[OPCODE][ARM]Correct disassembler for cdp/cdp2, mcr/mcr2, mrc/mrc2, ↵Renlin Li3-2/+8
ldc/ldc2, stc/stc2 opcodes/ 2016-02-24 Renlin Li <renlin.li@arm.com> * arm-dis.c (print_insn_coprocessor): Check co-processor number for cpd/cpd2, mcr/mcr2, mrc/mrc2, ldc/ldc2, stc/stc2. gas/ 2016-02-24 Renlin Li <renlin.li@arm.com> * testsuite/gas/arm/copro.s: Use coprocessor other than 10, 11. * testsuite/gas/arm/copro.d: Update.
2016-02-24[ARM][gas] Add support for Cortex-A32Kyrylo Tkachov3-0/+8
2016-02-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com> * config/tc-arm.c (arm_cpus): Add entry for cortex-a32. * doc/c-arm.texi (ARM Options): Document cortex-a32.
2016-02-24[ARM][doc] Document cortex-a17 mcpu optionKyrylo Tkachov2-0/+5
2016-02-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com> * doc/c-arm.texi (ARM Options): Document cortex-a17.
2016-02-23Skip tests for common directive on hpuxH.J. Lu2-2/+10
hpux has a non-standard common directive. * testsuite/gas/elf/elf.exp: Skip tests for common directive on hpux.
2016-02-22Add more const type qualifiers to GAS sources.Trevor Saunders46-189/+315
* output-file.c (output_file_create): Make file name argument const. (output_file_close): Likewise. * output-file.h (output_file_create): Adjust. (output_file_close): Likewise. * depend.c (quote_string_for_make): Make src argument const char *. (register_dependency): Likewise. (wrap_output): Likewise. * as.h (register_dependency): Adjust. * config/tc-xtensa.c (finish_vinsn): Remove unnecessary calls to as_where (); * symbols.c (S_SET_EXTERNAL): Likewise. * input-scrub.c (as_where): Return the file name. * as.h (as_where): Adjust prototype. * app.c (do_scrub_chars): Adjust. * cond.c (s_elseif): Likewise. (s_else): Likewise. (initialize_cframe): Likewise. * config/obj-coff.c (obj_coff_init_stab_section): Likewise. * config/obj-elf.c (obj_elf_init_stab_section): Likewise. * config/obj-som.c (obj_som_init_stab_section): Likewise. * config/tc-aarch64.c (output_info): Likewise. * config/tc-ia64.c (md_assemble): Likewise. (dot_alias): Likewise. * config/tc-m68k.c (m68k_frob_label): Likewise. * config/tc-mmix.c (s_bspec): Likewise. (mmix_handle_mmixal): Likewise. * config/tc-rx.c (rx_include): Likewise. * config/tc-tic54x.c (tic54x_set_default_include): Likewise. (tic54x_adjust_symtab): Likewise. * config/tc-xtensa.c (directive_push): Likewise. (xtensa_sanity_check): Likewise. (xtensa_relax_frag): Likewise. (md_convert_frag): Likewise. (tinsn_to_slotbuf): Likewise. * dwarf2dbg.c (dwarf2_where): Likewise. * ecoff.c (add_file): Likewise. (ecoff_generate_asm_lineno): Likewise. * expr.c (make_expr_symbol): Likewise. * frags.c (frag_new): Likewise. (frag_var_init): Likewise. * listing.c (listing_newline): Likewise. * messages.c (identify): Likewise. (as_show_where): Likewise. (as_warn_internal): Likewise. (as_bad_internal): Likewise. * read.c (s_irp): Likewise. (s_macro): Likewise. (s_reloc): Likewise. * stabs.c (stabs_generate_asm_file): Likewise. (stabs_generate_asm_lineno): Likewise. (stabs_generate_asm_func): Likewise. * write.c (fix_new_internal): Likewise. * as.h (PRINTF_WHERE_LIKE): Make file name argument const. (as_warn_value_out_of_range): Adjust prototype. (as_bad_value_out_of_range): Adjust prototype. * messages.c (identify): Make file name argument const char *. (as_warn_internal): Likewise. (as_warn_where): Likewise. (as_bad_internal): Likewise. (as_bad_where): Likewise. (as_internal_value_out_of_range): Likewise. (as_warn_value_out_of_range): Likewise. (as_bad_value_out_of_range): Likewise. * as.h (found_comment_file): Change type to const char *. * cond.c (file_line::file): Likewise. * config/obj-coff.c (obj_coff_init_stab_section): Make variable const. * config/obj-elf.c (obj_elf_init_stab_section): Likewise. * config/obj-som.c (obj_som_init_stab_section): Likewise. * config/tc-aarch64.c (output_info): Likewise. * config/tc-alpha.c (insert_operand): Likewise. * config/tc-arc.c (insert_operand): Likewise. * config/tc-d30v.c (check_size): Likewise. * config/tc-ia64.c (struct alias): Likewise. * config/tc-m68k.c (struct label_line): Likewise. * config/tc-mcore.c (md_apply_fix): Likewise. * config/tc-microblaze.c (md_estimate_size_before_relax): Likewise. * config/tc-mips.c (mips16_immed): Likewise. * config/tc-mmix.c (mmix_handle_mmixal): Likewise. * config/tc-ppc.c (ppc_insert_operand): Likewise. * config/tc-rx.c (rx_include): Likewise. * config/tc-s390.c (s390_insert_operand): Likewise. * config/tc-tic54x.c (tic54x_set_default_include): Likewise. (tic54x_adjust_symtab): Likewise. * config/tc-tilegx.c (insert_operand): Likewise. (apply_special_operator): Likewise. * config/tc-tilepro.c (insert_operand): Likewise. * config/tc-xtensa.c (directive_push): Likewise. * ecoff.c (add_file): Likewise. (ecoff_generate_asm_lineno): Likewise. * listing.c (listing_newline): Likewise. * read.c (s_irp): Likewise. * write.c (install_reloc): Likewise. * write.h (struct fix): Likewise. * input-file.c (file_name): Change type to const char *. (saved_file::file_name): Likewise. (input_file_open): Change type of argument to const char *. * input-file.h (input_file_open): Adjust. * input-scrub.c (logical_input_file): change type to const char *. (physical_input_file): Likewise. (struct input_save): Adjust. (input_scrub_push): Adjust. (input_scrub_begin): Adjust. (as_where): Adjust. * input-scrub.c (input_scrub_new_file): Make file name argument const. (input_scrub_include_file): Likewise. (new_logical_line_flags): Likewise. (new_logical_line): Likewise. * as.h: Adjust. * frags.h (struct frag): Change type of fr_file to const char *. * expr.c (expr_symbol_where): Change type of file argument to const char **. * expr.h (expr_symbol_where): Likewise. * config/tc-i370.c (md_apply_fix): adjust. * config/tc-mmix.c (mmix_md_end): Likewise. * config/tc-ppc.c (md_apply_fix): Likewise. * config/tc-s390.c (md_apply_fix): Likewise. * symbols.c (report_op_error): Likewise. (resolve_symbol_value): Likewise. * config/tc-ia64.c (slot::src_file): Change type to const char *. (rsrc::file): Likewise. * config/tc-xtensa.c (xtensa_sanity_check): Change type of variable to const char *. (xtensa_relax_frag): Likewise. (md_convert_frag): Likewise. (tinsn_to_slotbuf): Likewise. * expr.c (expr_symbol_line): Likewise. * macro.c (define_macro): Likewise. * macro.h (macro_struct): Likewise. * messages.c (as_show_where): Likewise. * read.c (s_macro): Likewise. * stabs.c (stabs_generate_asm_file): Likewise. (generate_asm_file): Likewise. (stabs_generate_asm_lineno): Likewise. * write.h (struct reloc_list): Likewise. * input-scrub.c (as_where): Change return type to const char *. * as.h (as_wheree): Adjust.
2016-02-21Set BFD compression bits in write_object_fileH.J. Lu2-3/+13
There is no need to set BFD compression bits for each section. We should just set it once in write_object_file. * write.c (compress_debug): Move BFD compression bits setting to ... (write_object_file): Here.
2016-02-20[i386] Check RegVRex in register_numberH.J. Lu5-0/+17
Increment register number by 16 if RegVRex is set. * config/tc-i386.c (register_number): Check RegVRex. * testsuite/gas/i386/x86-64-avx512f.s: Add a test for vgatherqpd with %zmm19 and %zmm3. * testsuite/gas/i386/x86-64-avx512f-intel.d: Updated. * testsuite/gas/i386/x86-64-avx512f.d: Likewise.
2016-02-19Fix snafu - add missing const declaration to 'string' local variable in ↵Nick Clifton1-1/+2
s_stab_generic.
2016-02-19[ARM] Add FP16 feature extension for ARMv8.2 architectureJiong Wang2-0/+12
include/ * opcode/arm.h (ARM_EXT2_FP16_INSN): New. gas/ * config/tc-arm.c (arm_ext_fp16): New. (arm_extensions): New entry for "fp16".
2016-02-19Prevent seg-fault in gas reading a binary input file.Nick Clifton2-0/+11
PR 19630 * read.c (read_a_source_file): Check for assemble_one returning with input_line_pointer set to NULL.
2016-02-19Change the return type of the rebuffer_line function to void.Trevor Saunders2-9/+8
* listing.c (rebuffer_line): Change return type to void.
2016-02-19Add const to various variables in the gas sources.Trevor Saunders7-26/+46
* symbols.c (decode_local_label_name): Make type a const char *. * listing.c (print_source): Make type of p const char *. (print_line): Make type of string const char *. (buffer_line): Return const char *. (title): Make type const char *. (subtitle): Likewise. (listing_listing): Make type of p const char *. * messages.c (as_internal_value_out_of_range): Make type of prefix const char *. * stabs.c (s_stab_generic): make type of stab_secname, stabstr_secname and string const char *. * read.c (_bfd_rel): Make type of name const char *. * app.c (out_string): Change type to const char *. (struct app_save::out_string): Likewise.
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