Age | Commit message (Collapse) | Author | Files | Lines |
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(xmalloc, xrealloc): Don't declare.
* as.c: Don't include libiberty.h.
* expr.c, read.c, stabs.c, config/obj-coff.c: Likewise.
* config/tc-mips.c: Likewise.
* messages.c: Likewise.
(xstrerror): Don't declare.
* xmalloc.c: Remove.
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(system_registers, cc_names): Likewise.
(address_registers, data_registers, other_registers): New register
arrays.
(register_name, system_register_name, cc_name): Remove.
(mn10300_reloc_prefix): Likewise.
(data_register_name): New function.
(address_register_name, other_register_name): Likewise.
(md_assemble): Rough cut at parsing operands. Remove lots of
unwanted code.
(md_apply_fix3): Disable for now.
Checkpointing today's Matsushita work.
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<schwab@issan.informatik.uni-dortmund.de>
* config/tc-m68k.c (select_control_regs): New function, extracted
out of m68k_init_after_args.
(m68k_init_after_args): Use it.
(mri_chip): Use it here as well to update set of allowed control
regs for movec.
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(obj_elf_section): Add the section symbol to the symbol table.
* config/obj-elf.h (obj_begin): Define.
(elf_begin): Declare.
* as.c (perform_an_assembly_pass): Call obj_begin if it is
defined.
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from a PC relative reloc if TC_M68K.
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.uaxword available even if not OBJ_ELF.
(md_atof): Remove unused local variable wordP.
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with a single generic configuration. So break them up into two different
configurations. See the individual ChangeLogs for additional detail.
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for Matsushita MN10x00 support.
* configure.in: Recognize mn10x00-*-*
* configure: Rebuilt.
More Matsushita stuff.
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Keep stubbing out Matsushita stuff.
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* obj-evax.h: move openvms definitions from here to tc-alpha.c.
* tc-alpha.c: add support for vms_case_hack like in vax/vms.
(load_expression): track clobbering of base reg before jmp/jsr.
(s_alpha_file): pass case_hack flags and source filename via
symbol table to bfd.
* tc-alpha.h (TC_CONS_FIX_NEW): define
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pseudo-op.
(s_space): In m68k MRI mode, align to a word boundary.
* macro.c (define_macro): Add namep parameter. Change all
callers.
* macro.h (define_macro): Update declaration.
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* configure.in (mips-*-rtems*): New target, like mips-*-elf*.
* configure: Rebuild.
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printing.
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(parse_args): Change version printing to match current GNU
standards.
* gasp.c (show_usage): Print bug report address.
(main): Change version printing to match current GNU standards.
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register numbers. From Ken Rose <rose@netcom.com>.
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(alpha_macros): Move to top of file. Make static.
(alpha_num_macros): Move to top of file.
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generated by DWARF.
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defined.
PR 10716.
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* tc-d10v.c (md_operand): Created. Allows operands to
start with '#'.
* tc-d10v.h (md_operand): Undefined.
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(md_assemble): A fixup width of '3' means a 1 byte reloc.
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reloc for the i960 for a reloc in the same section. This undoes
one of the two changes made Aug 19.
PR 10672.
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symbols to the position of the debugging information.
PR 10668.
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PR 10630.
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* gas/h8300/basic.exp: Test them.
Somehow I forgot to test "stmac".
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* config/tc-arm.c (md_apply_fix3): Update two thumb instruction
slots when processing BL fixups.
* config/tc-arm.c (output_inst): Ensure Thumb BL fixup is marked
on the first half of the instruction.
Thu Sep 12 10:28:44 1996 James G. Smith <jsmith@cygnus.co.uk>
* gas/arm/thumb.s (back): Check assembly of Thumb BL.
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stabs expression, rather than giving an error.
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the same file.
PR 10595.
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jump, rather than creating a reloc.
PR 10589.
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registers.
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sets a condition code with an instruction which uses a condition
code.
(mips_ip): In cases 'N' and 'M', look for $fccN rather than an
immediate value.
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mips_cpu is 5000, set interlocks and cop_interlocks.
(mips_ip): Give a better error message if the ISA level is wrong.
(md_parse_option): Recognize -mcpu=[v][r]5000.
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* config/tc-mips.c (COUNT_TOP_ZEROES): Added macro to count
leading zeroes.
(load_register): Ensure hi32 bits are not lost during lo32bit
processing. Fix shift offset that was overflowing into the next
instruction field. Add code to generate shorter sequences for
constants with a single contiguous seqeuence of ones.
Fri Sep 6 18:23:54 1996 James G. Smith <jsmith@cygnus.co.uk>
* gas/mips/dli.{s,d}: More test cases added.
NOTE: The COUNT_TOP_ZEROES macro is a bit bulky, and the same result
can be achieved by using a "standard" ffs() routine:
count = ffs(~v);
count = count == 0 ? 0 : 33 - count;
However the following timings (VR4300 CPU clock ticks on a CMA101
board) show the performance gain.
Number of ffs() for loop if/then/else conditional
leading ?:
zeroes
-------------------------------------------------------------------------------
0 167 179 266 251
1 1718 283 263 259
2 1670 379 287 295
3 1622 475 311 311
4 1574 571 295 287
5 1534 667 311 319
6 1478 763 307 299
7 1430 859 323 323
8 1382 962 287 295
9 1334 1051 319 311
10 1286 1154 299 307
11 1238 1250 323 331
12 1183 1346 299 307
13 1135 1442 331 323
14 1087 1546 311 319
15 1039 1642 335 343
16 991 1730 295 287
17 950 1834 311 319
18 895 1922 307 299
19 847 2026 331 323
20 799 2122 307 299
21 751 2218 323 323
22 703 2314 311 311
23 655 2417 343 335
24 599 2506 307 299
25 559 2602 331 331
26 511 2705 311 319
27 463 2801 343 335
28 407 2897 311 319
29 367 2993 343 335
30 311 3097 323 331
31 271 3185 355 355
32 215 3233 379 371
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* config/tc-d10v.c (d10v_dot_word): New function to support
"@word" with the word pseudo-op.
(md_apply_fix3): Cleanup and changes to support correct sizes
for 16 and 18-bit relocs.
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* configure: Regenerated.
* config/te-sparcaout.h: New file.
* config/tc-sparc.h (TARGET_BYTES_BIG_ENDIAN): Define.
Ifdef TE_SPARCOUT define TARGET_FORMAT and SPARC_BIENDIAN.
* config/tc-sparc.c (INSN_BIG_ENDIAN): New macro.
(SPECIAL_CASE_{SETSW,SETX}): Define.
({NOP,OR,FMOVS,SETHI,SLLX,SRA}_INSN): Define.
(md_begin): Delete setting of `target_big_endian'.
(output_insn): New function.
(md_assemble): Rewrite. Add `setx' support.
(sparc_ip): Handle `0' operand char. Recognize setuw, setsw, setx
special cases.
(md_atof): Add little endian support.
(md_number_to_chars): Likewise.
(md_apply_fix): Likewise.
(md_longopts): Recognize -EL,-EB ifdef SPARC_BIENDIAN.
(md_parse_option): Likewise.
(md_show_usage): Print -EL, -EB ifdef SPARC_BIENDIAN.
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* ecoff.h (ecoff_new_file): Declare.
* config/obj-ecoff.h (obj_app_file): Define.
PR 10548.
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* config/tc-mips.c (load_register): Remove unnecessary code that
was causing the high 32bits of 64bit constants to be lost.
Fixes PR10503. The compiler was producing the assembler code:
dli $3,0xfffffffffffff
when constructing the softfloat library. Unfortunately it was being
incorrectly assembled.
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(v850_reloc_prefix): Provide prototype.
(postfix, get_reloc, build_insn): Remove prototypes for nonexistant
functions.
(md_begin, md_assemble, md_apply_fix3): Remove unused variables.
(md_assemble): Add default to case statement.
Minor cleanups.
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from the opcode.
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word fixups too.
Fixes "difference between forward references".
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(do_jumps): Likewise.
Now that we can resolve known branch targets.
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routines to fetch/store the updated instruction from/to memory.
(v850_insert_operand): If the operand has a specialized insert
routine, call it.
Getting fixups closer. At least br <target> works now.
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be like identical function found in tc-ppc.c.
(get_reloc): Removed.
(v850_reloc_prefix): New function, parse lo(), hi() and hi0().
(md_assemble): emit fixups.
(md_pcrel_from): renamed from md_pcrel_from_section, emit proper
displacement.
(md_apply_fix3): handle fixups/relocs.
* config/tc-v850.h (MD_PCREL_FROM_SECTION): Removed definition.
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* configure.in (sh-*-elf*): New target.
* config/tc-sh.h (TARGET_ARCH): Define.
(WORKING_DOT_WORD): Define.
(TC_COFF_FIX2RTYPE): Only define if OBJ_COFF.
(BFD_ARCH, COFF_MAGIC, TC_COUNT_RELOC): Likewise.
(TC_RELOC_MANGLE, tc_coff_symbol_emit_hook): Likewise.
(DO_NOT_STRIP, NEED_FX_R_TYPE, TC_KEEP_FX_OFFSET): Likewise.
(TC_COFF_SIZEMACHDEP, tc_frob_file): Likewise.
(SUB_SEGMENT_ALIGN): Likewise.
(RELOC_32): Don't define.
(tc_frob_file_before_adjust): Define if BFD_ASSEMBLER.
(target_big_endian): Declare if OBJ_ELF.
(TARGET_FORMAT): Define if OBJ_ELF.
* config/tc-sh.c: Use BFD reloc codes instead of SH COFF reloc
numbers throughout.
(tc_crawl_symbol_chain): Only define if OBJ_COFF.
(tc_headers_hook, tc_coff_sizemachdep): Likewise.
(struct sh_count_relocs): Define.
(sh_count_relocs): New static function, broken out of
sh_frob_file. Add BFD_ASSEMBLER code.
(sh_frob_section): Likewise.
(sh_frob_file): Call sh_frob_section.
(md_convert_frag): If BFD_ASSEMBLER, change type of headers, and
call section_symbol rather than seg_info (seg)->dot.
(md_section_align): Add OBJ_ELF version.
(SWITCH_TABLE_CONS): Define.
(SWITCH_TABLE): Use SWITCH_TABLE_CONS.
(md_apply_fix): Change parameter types if BFD_ASSEMBLER. Only
handle fx_r_type == 0 if not BFD_ASSEMBLER. Return 0 if
BFD_ASSEMBLER.
(struct reloc_map): Define if not BFD_ASSEMBLER.
(coff_reloc_map): Likewise.
(sh_coff_reloc_mangle): Use coff_reloc_map to convert fx_r_type.
(tc_gen_reloc): New function if BFD_ASSEMBLER.
* write.c (write_relocs): Ifdef out fx_where test which triggers
inappropriately for SH ELF.
(write_object_file): Call tc_frob_file_before_adjust and
obj_frob_file_before_adjust if they are defined.
* write.c (write_object_file): Use BFD_RELOC_16, not
BFD_RELOC_NONE, when calling fix_new_exp for a broken word.
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