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* ppc-dis.c (print_insn_powerpc): Don't print tabs. Handle
PPC_OPERANDS_GPR_0.
* ppc-opc.c (RA0): Define.
(RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
(RAOPT): Rename from RAO. Update all uses.
(powerpc_opcodes): Use RA0 as appropriate. Add "lsdx", "lsdi",
"stsdx", "stsdi", "lmd" and "stmd" insns.
include/opcode/
* ppc.h (PPC_OPERAND_GPR_0): Define. Bump other operand defines.
gas/testsuite/
Update gas/ppc/.
ld/testsuite/
Update ld-powerpc/.
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* gas/i386/padlock.d: Adjust.
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* gas/i386/padlock.s, gas/i386/padlock.d: New tests for
VIA PadLock instructions.
* gas/i386/i386.exp: Run padlock tests.
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(M, Mp): Use OP_M.
(None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
(GRPPADLCK): Define.
(dis386): Use NOP_Fixup on "nop".
(dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
(twobyte_has_modrm): Set for 0xa7.
(padlock_table): Delete. Move to..
(grps): ..here, using OP_0f07. Use OP_Ofae on lfence, mfence
and clflush.
(print_insn): Revert PADLOCK_SPECIAL code.
(OP_E): Delete sfence, lfence, mfence checks.
* gas/i386/katmai.d: Revert last change.
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* gas/config/tc-i386.c (output_insn): Handle PadLock instructions.
* gas/config/tc-i386.h (CpuPadLock): New define.
(CpuUnknownFlags): Added CpuPadLock.
* include/opcode/i386.h (i386_optab): Added xstore/xcrypt insns.
* opcodes/i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
(dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
(padlock_table): New struct with PadLock instructions.
(print_insn): Handle PADLOCK_SPECIAL.
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* i386-dis.c (grps): Use clflush by default for 0x0fae/7.
(OP_E): Twiddle clflush to sfence here.
gas/testsuite/
* gas/i386/katmai.d: Adjust for clflush change.
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(cfi_finish): Likewise for fde.
* gas/alpha/elf-reloc-8.d, gas/cfi/cfi-alpha-1.d,
gas/cfi/cfi-alpha-2.d, gas/cfi/cfi-alpha-3.d, gas/cfi/cfi-common-1.d,
gas/cfi/cfi-common-2.d, gas/cfi/cfi-common-3.d: Adjust offsets.
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* config/tc-ia64.c (md_assemble): Properly handle NULL
align_frag.
(ia64_handle_align): Don't abort if failed to add a stop bit.
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* Makefile.in: Regenerated.
* aclocal.m4: Likewise.
* configure: Likewise.
* doc/Makefile.in: Likewise.
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* config/tc-ia64.c (dot_align): New.
(ia64_do_align): Make it static.
(md_pseudo_table): Use "dot_align" for "align".
(ia64_md_do_align): Don't set align_frag here.
(ia64_handle_align): Add a stop bit to the previous bundle if
needed.
* config/tc-ia64.h (ia64_do_align): Removed.
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opcodes:
* sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
nofpu mode. Add BFD type bfd_mach_sh4_nommu_nofpu.
* sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
accordingly.
bfd:
* archures.c: Add bfd_mach_sh4_nommu_nofpu.
* cpu-sh.c: Ditto.
* elf32-sh.c: Ditto.
* bfd-in2.h: Regenerate.
include/elf:
* sh.h: Add EF_SH4_NOMMU_NOFPU.
gas:
* config/tc-sh.c (md_parse_option): Add -isa=sh4-nofpu and
-isa=sh4-nommu-nofpu options. Adjust help messages accordingly.
(sh_elf_final_processing): Output BFD type sh4_nofpu if that is
the most general type or the user specifically requested it.
(md_assemble): Add a new error message for when an instruction
is understood, but is not allowed due to an -isa option.
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* config/tc-ia64.c (align_frag): New.
(md_assemble): Set the tc_frag_data field in align_frag for
IA64_OPCODE_FIRST instructions.
(ia64_md_do_align): Set align_frag.
(ia64_handle_align): Add a stop bit if needed.
* config/tc-ia64.h (TC_FRAG_TYPE): New.
(TC_FRAG_INIT): New.
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* frv.cpu (r-store, r-store-dual, r-store-quad): Delete.
(rstb, rsth, rst, rstd, rstq): Delete.
(rstbf, rsthf, rstf, rstdf, rstqf): Delete.
gas/testsuite/
* gas/frv/allinsn.s (rstb, rsth, rst, rstd, rstq): Replace with nops.
(rstbf, rsthf, rstf, rstdf, rstqf): Likewise.
* gas/frv/allinsn.d: Update accordingly.
opcodes/
* frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
sim/frv/
* decode.c, decode.h, model.c, sem.c: Regenerate.
sim/testsuite/
* sim/frv/{rstb,rsth,rst,rstd,rstq}.cgs: Delete.
* sim/frv/{rstbf,rsthf,rstf,rstdf,rstqf}.cgs: Delete.
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Fix underlying problem by changing the order of tests of rel->howto.
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.insn pseudo operation.
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* config/tc-mips.c (mips_dwarf2_addr_size): New.
* config/tc-mips.h (DWARF2_ADDR_SIZE): Use.
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gas:
* tc-sh.c (build_Mytes): Add REG_N_D and REG_N_B01
nibble types to assembler.
opcodes:
* sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
ensure that double registers have even numbers.
Add REG_N_B01 for nn01 (binary 01) nibble to ensure
that reserved instruction 0xfffd does not decode the same
as 0xfdfd (ftrv).
* sh-opc.h: Add REG_N_D nibble type and use it whereever
REG_N refers to a double register.
Add REG_N_B01 nibble type and use it instead of REG_NM
in ftrv.
Adjust the bit patterns in a few comments.
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2004-02-25 Fred Fish <fnf@redhat.com>
* config/tc-iq2000.c: Add missing \n\ in multiline string literal.
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* config/tc-ia64.c (slot_index): New arg before_relax. Use instead of
finalize_syms.
(fixup_unw_records): New arg before_relax. Pass to slot_index.
(ia64_estimate_size_before_relax): New.
(ia64_convert_frag): Pass 0 to fixup_unw_records. Add comment.
(generate_unwind_image): Pass 1 to fixup_unw_records.
* config/tc-ia64.h (ia64_estimate_size_before_relax): Declare.
(md_estimate_size_before_relax): Call ia64_estimate_size_before_relax.
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* stabs.c (generate_asm_file): Avoid warning about use of
uninitialized variable.
binutils/
* objcopy.c (copy_section): Avoid warnings.
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* config/tc-ia64.c (ia64_flush_insns): In addition to prologue,
body, and endp, allow unwind records which do not have a "t"
(time/instruction) field.
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Jakub Jelinek <jakub@redhat.com>
* dwarf2dbg.c (get_filenum): Do not read beyond allocated memory.
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* config/tc-ia64.h (ia64_frob_symbol): New declaration.
(tc_frob_symbol): New macro definition.
* config/tc-ia64.c (ia64_frob_symbol): New routine.
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read-only.
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(TC_CASE_SENSITIVE): ... this.
* read.c: Replace IGNORE_OPCODE_CASE with TC_CASE_SENSITIVE.
* doc/internals.texi (TC_CASE_SENSITIVE): Document.
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* config/tc-ia64.c (dot_endp): Delete call to output_endp.
(generate_unwind_image): Re-add it here.
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* dwarf2dbg.c (DWARF2_ADDR_SIZE): Remove trailing ';'
* read.h (SKIP_WHITESPACE): Turn into an expression.
* read.c (read_a_source_file): A pseudo is removed by having a
NULL handler.
testsuite:
* gas/macros/test2.s: Lowercase it.
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* config/tc-ia64.c (output_endp): New.
(count_bits): Delete.
(ia64_flush_insns, process_one_record, optimize_unw_records): Handle
endp unwind records.
(fixup_unw_records): Handle endp unwind records. Delete code for
shortening prologue regions not followed by a body record.
(dot_endp): Call add_unwind_entry to emit endp unwind record.
* config/tc-ia64.h (unw_record_type): Add endp.
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* config/tc-ia64.c (ia64_convert_frag): Call md_number_to_chars to
fill padding bytes with zeroes.
(emit_one_bundle): New locals last_ptr, end_ptr. Rewrite code that
sets unwind_record slot_number and slot_frag fields.
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* config/tc-mips.c (add_got_offset_hilo): New function.
(macro): Use load_register() and add_got_offset_hilo() to load
constants instead of hardcoding code sequences throughout.
gas/testsuite/
* gas/mips/div.d: Update to accomodate changes in macro
expansions.
gas/mips/elf-rel-got-n32.d: Likewise.
gas/mips/elf-rel-got-n64.d: Likewise.
gas/mips/elf-rel-xgot-n32.d: Likewise.
gas/mips/elf-rel-xgot-n64.d: Likewise.
gas/mips/la-svr4pic.d: Likewise.
gas/mips/la-xgot.d: Likewise.
gas/mips/lca-svr4pic.d: Likewise.
gas/mips/lca-xgot.d: Likewise.
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* gas/sh/sh4a-fp.s: Likewise.
* gas/sh/err-sh4a-fp.s: Likewise.
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* config/tc-ia64.c (emit_one_bundle): Add proper indentation.
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(RELAXABLE_SYMBOL): Use EXTERN_FORCE_RELOC instead of hard-coded test for
TARGET_OS=elf.
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* config/tc-mips.c (hilo_interlocks): Change definition
so that MIPS32, MIPS64 and later ISAs are included, along with
the already-included machines. Update comments.
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* gas/mips/relax-swap1.s: Add extra space at end, so the
disassembly will consistently have "..." at its end.
* gas/mips/relax-swap2.s: Likewise.
* gas/mips/relax-swap1-mips2.d: Expect "..." at end of disassembly.
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undefined local labels.
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* gas/arm/undefined.s, gas/arm/undefined.l: New files.
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NewABI GP relaxation.
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