Age | Commit message (Collapse) | Author | Files | Lines |
|
* config/tc-i386.c (md_assemble): Check implicit registers
only for instructions with 3 operands or less.
|
|
compile time warning.
|
|
2009-07-16 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (md_assemble): Only check i.operands for AX.
(md_estimate_size_before_relax): Don't relax IFUNC symbols.
gas/testsuite/
2009-07-16 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Run ifunc and x86-64-ifunc.
* gas/i386/ifunc.d: New,
* gas/i386/ifunc.s: Likewise.
* gas/i386/x86-64-ifunc.d: Likewise.
|
|
* config/tc-arm.c (md_apply_fix <BFD_RELOC_ARM_TARGET2>): Write
the offset for REL targets here.
gas/testsuite/
* gas/arm/target-reloc-1.s: New.
* gas/arm/target-reloc-1.d: New.
ld/testsuite/
* ld-arm/arm-target2.s: Add addend cases.
* ld-arm/arm-target2-rel.d: Adjust.
* ld-arm/arm-target2-abs.d: Adjust.
* ld-arm/arm-target2-got-rel.d: Adjust.
|
|
* listing.c (print_source): Initialize cache by NULL.
|
|
(mimplicit-it): Added right option.
|
|
(MAX_MEM_FOR_RS_ALIGN_CODE): Define in terms of
MAX_MEM_ALIGNMENT_BYTES.
* config/tc-arm.c (arm_frag_align_code): Replace hard coded
constant with MAX_MEM_FOR_RS_ALIGN_CODE.
* gas/arm/align64.s: New test case.
* gas/arm/align64.d: Expected disassembly.
|
|
* config/tc-arm.h (THUMB_IS_FUNC): Handle a NULL pointer.
(ARM_IS_FUNC): Likewise.
|
|
* config/tc-arm.c (md_assemble): Added validation.
gas/testsuite
* gas/arm/thumb-w-bad.d: New test case.
* gas/arm/thumb-w-bad.l: New file.
* gas/arm/thumb-w-bad.s: New file.
* gas/arm/thumb-w-good.d: New test case.
* gas/arm/thumb-w-good.s: New file.
|
|
2009-07-10 H.J. Lu <hongjiu.lu@intel.com>
* Makefile.am: Run "make dep-am".
* Makefile.in: Regenerated.
binutils/
2009-07-10 H.J. Lu <hongjiu.lu@intel.com>
* Makefile.am: Run "make dep-am".
* Makefile.in: Regenerated.
gas/
2009-07-10 H.J. Lu <hongjiu.lu@intel.com>
* Makefile.am: Run "make dep-am".
* Makefile.in: Regenerated.
|
|
* Makefile.am (dwarf2.lo): Use dwarf2.h, not elf/dwarf2.h.
(elf-eh-frame.lo): Likewise.
(elf32-bfin.lo): Likewise.
(elf32-frv.lo): Likewise.
(elf32-xc16x.lo): Likewise.
* Makefile.in: Rebuild.
* dwarf2.c: Included dwarf.h, not elf/dwarf2.h.
* elf-eh-frame.c: Likewise.
* elf32-bfin.c: Likewise.
* elf32-frv.c: Likewise.
* elf32-xc16x.c: Likewise.
binutils
* Makefile.am (dwarf.o): Refer to dwarf2.h, not elf/dwarf2.h.
* Makefile.in: Rebuild.
* dwarf.c: Include dwarf2.h, not elf/dwarf2.h.
gas
* Makefile.am (DEPTC_alpha_ecoff): Refer to dwarf2.h, not
elf/dwarf2.h.
(DEPTC_alpha_elf): Likewise.
(DEPTC_alpha_evax): Likewise.
(DEPTC_arm_elf): Likewise.
(DEPTC_hppa_elf): Likewise.
(DEPTC_i386_aout): Likewise.
(DEPTC_i386_coff): Likewise.
(DEPTC_i386_elf): Likewise.
(DEPTC_m68k_aout): Likewise.
(DEPTC_m68k_coff): Likewise.
(DEPTC_m68k_elf): Likewise.
(DEPTC_mips_coff): Likewise.
(DEPTC_mips_ecoff): Likewise.
(DEPTC_mips_elf): Likewise.
(DEPTC_ppc_coff): Likewise.
(DEPTC_ppc_elf): Likewise.
(DEPTC_s390_elf): Likewise.
(DEPTC_sh_coff): Likewise.
(DEPTC_sh_elf): Likewise.
(DEPTC_sh64_elf): Likewise.
(DEPTC_sparc_aout): Likewise.
(DEPTC_sparc_coff): Likewise.
(DEPTC_sparc_elf): Likewise.
(as.o): Likewise.
(dwarf2dbg.o): Likewise.
(dw2gencfi.o): Likewise.
(ehopt.o): Likewise.
(read.o): Likewise.
* Makefile.in: Rebuild.
* dw2gencfi.h: Include dwarf2.h, not elf/dwarf2.h.
* dwarf2dbg.c: Likewise.
* ehopt.c: Likewise.
gdb
* dwarf2-frame.c: Include dwarf2.h, not elf/dwarf2.h.
* dwarf2expr.c: Likewise.
* dwarf2loc.c: Likewise.
* dwarf2read.c: Likewise.
* sh-tdep.c: Likewise.
* xtensa-tdep.c: Likewise.
include
* dwarf2.h: New file, moved from elf/.
include/elf
* dwarf2.h: Move to `..'.
|
|
(set_it_insn_type_nonvoid): New macro.
(emit_thumb32_expr): New function.
(thumb_insn_size): New function.
(emit_insn): New function.
(s_arm_elf_inst): New function.
(md_pseudo_table): New pseudo-opcode entries added.
* doc/c-arm.texi: New directive added.
* gas/arm/inst-po.d: New testcase.
* gas/arm/inst-po.s: New file.
* gas/arm/inst-po-2.d: New testcase.
* gas/arm/inst-po-2.s: New file.
* gas/arm/inst-po-2.l: New file.
* gas/arm/inst-po-3.d: New testcase.
* gas/arm/inst-po-3.s: New file.
* gas/arm/inst-po-be.d: New testcase.
|
|
when enabling other options without a specific configuration.
|
|
* config/tc-arm.c (insns): Fix encoding for torvsc.
gas/testsuite/
* gas/arm/iwmmxt2.d: Fix insn pattern for torvsc,
add patterns for waddsubhx.
* gas/arm/iwmmxt2.s: Add tests for waddsubhx.
opcodes/
* arm-dis.c (coprocessor_opcodes): Fix mask for waddbhus.
|
|
* gas/i386/fma4.d: Append "#pass".
* gas/i386/x86-64-fma4.d: Likewise.
|
|
* gas/i386/jump.d: Adjust to be relocated offset for jump to external
symbol.
|
|
2009-07-06 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
* config/tc-i386.c (cpu_arch): Add .fma4 and CPU_FMA4_FLAGS.
(build_modrm_byte): Add support to handle FMA4 instructions.
(md_show_usage): Add fma4.
<gas/testsuite changes>
2009-07-06 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
* gas/i386/i386.exp: Add FMA4 tests.
* gas/i386/x86-64-fma4.d: Ditto.
* gas/i386/fma4.d: Ditto.
* gas/i386/x86-64-fma4.s: Ditto.
* gas/i386/fma4.s: Ditto.
<opcodes changes>
2009-07-06 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
* i386-opc.h (CpuFMA4): Add CpuFMA4.
(i386_cpu_flags): New.
* i386-gen.c: Add CPU_FMA4_FLAGS.
* i386-opc.tbl: Add FMA4 instructions.
* i386-tbl.h: Regenerate.
* i386-init.h: Regenerate.
* i386-dis.c (OP_VEX_FMA): New. Handle FMA4.
(OP_XMM_VexW): Ditto.
(OP_EX_VexW): Ditto.
(VEXI4_Fixup): Ditto.
(VexI4, VexFMA, Vex128FMA, EXVexW, EXdVexW, XMVexW): New Macros.
(PREFIX_VEX_3A5C, PREFIX_VEX_3A5D, PREFIX_VEX_3A5E): New.
(PREFIX_VEX_3A5F, PREFIX_VEX_3A60): New.
(PREFIX_VEX_3A68, PREFIX_VEX_3A69, PREFIX_VEX_3A6A): New.
(PREFIX_VEX_3A6B, PREFIX_VEX_3A6C, PREFIX_VEX_3A6D): New.
(PREFIX_VEX_3A6E, PREFIX_VEX_3A6F, PREFIX_VEX_3A7A): New.
(PREFIX_VEX_3A7B, PREFIX_VEX_3A7C, PREFIX_VEX_3A7D): New.
(PREFIX_VEX_3A7E, PREFIX_VEX_3A7F): New.
(VEX_LEN_3A6A_P_2,VEX_LEN_3A6B_P_2, VEX_LEN_3A6E_P_2): New.
(VEX_LEN_3A6F_P_2,VEX_LEN_3A7A_P_2, VEX_LEN_3A7B_P_2): New.
(VEX_LEN_3A7E_P_2,VEX_LEN_3A7F_P_2): New.
(get_vex_imm8): New. handle FMA4.
(OP_EX_VexReg): Ditto.
|
|
|
|
* Makefile.am (OBJ_FORMATS): Add macho.
(CPU_OBJ_VALID): Ditto.
(OBJ_FORMAT_CFILES): Add config/obj-macho.c
(OBJ_FORMAT_HFILES): Add config/obj-macho.h
(obj-macho.o): New rule.
* Makefile.in: Regenerated.
* configure.tgt (generic_target): Add i386-*-darwin*.
* config/tc-i386.h: Use i386_target_format for Mach-O.
* config/tc-i386.c (i386_target_format): Define it for Mach-O.
(i386_target_format): Add a case for bfd_target_mach_o_flavour.
* config/obj-macho.h: New file.
* config/obj-macho.c: New file.
|
|
* config/tc-arm.c (do_t_pkhtb): Swap Rm and Rn when encoding as
PKHBT.
* gas/arm/thumb32.d: Fix expected disassembly of PKHTB insn.
|
|
gas/
* config/tc-arm.c (MISSING_FNSTART): Define.
(s_arm_unwind_fnstart): Diagnose duplicate directive.
(s_arm_unwind_handlerdata, s_arm_unwind_fnend, s_arm_unwind_fnend,
s_arm_unwind_cantunwind, s_arm_unwind_personalityindex,
s_arm_unwind_personality, s_arm_unwind_save, s_arm_unwind_movsp,
s_arm_unwind_pad, s_arm_unwind_setfp, s_arm_unwind_raw): Error if
not inside function unwinding region.
gas/testsuite/
* gas/arm/fp-save.s: Add .fnstart and .fnend directives.
|
|
* arm-dis.c (coprocessor): Print the LDC and STC versions of the
LFM and SFM instructions as comments,.
Improve consistency of formatting for instructions displayed as
comments and decimal values displayed with their hexadecimal
equivalents.
Formatting tidy ups.
Updated expected disassembler regexps.
|
|
* config/tc-i386.c: Reformat.
|
|
* arm-dis.c (enum opcode_sentinels): New: Used to mark the
boundary between variaant and generic coprocessor instuctions.
(coprocessor): Use it.
Fix architecture version of MCRR and MRRC instructions.
(arm_opcdes): Fix patterns for STRB and STRH instructions.
(print_insn_coprocessor): Check architecture and extension masks.
Print a hexadecimal version of any decimal constant that is
outside of the range of -16 to +32.
(print_arm_address): Add a return value of the offset used in the
adress, if it is worth printing a hexadecimal version of it.
(print_insn_neon): Print a hexadecimal version of any decimal
constant that is outside of the range of -16 to +32.
(print_insn_arm): Likewise.
(print_insn_thumb16): Likewise.
(print_insn_thumb32): Likewise.
PR 10297
* arm-dis.c (UNDEFINED_INSTRUCTION): New macro for a description
of an undefined instruction.
(arm_opcodes): Use it.
(thumb_opcod): Use it.
(thumb32_opc): Use it.
Update expected disassembly regrexps in GAS and LD testsuites.
|
|
32 bits for relaxable branches so that we can relax them later.
(md_estimate_size_before_relax): Assume IVC2 branches will be relaxed.
(mep_relax_frag): New.
(md_convert_frag): Relax IVC2 branches in-place.
* config/tc-mep.h ((mep_relax_frag): New.
|
|
|
|
gas/config/atof-ieee.c, gas/config/obj-aout.c,
gas/config/obj-coff.c, gas/config/obj-ecoff.c,
gas/config/obj-elf.c, gas/config/obj-som.c, gas/config/tc-alpha.c,
gas/config/tc-arc.c, gas/config/tc-arm.c, gas/config/tc-cr16.c,
gas/config/tc-cris.c, gas/config/tc-crx.c, gas/config/tc-d30v.c,
gas/config/tc-dlx.c, gas/config/tc-hppa.c, gas/config/tc-i370.c,
gas/config/tc-i386-intel.c, gas/config/tc-i386.c,
gas/config/tc-i860.c, gas/config/tc-i960.c, gas/config/tc-ia64.c,
gas/config/tc-iq2000.c, gas/config/tc-m32c.c,
gas/config/tc-m32r.c, gas/config/tc-m68hc11.c,
gas/config/tc-m68k.c, gas/config/tc-maxq.c, gas/config/tc-mcore.c,
gas/config/tc-mep.c, gas/config/tc-mips.c, gas/config/tc-mmix.c,
gas/config/tc-mn10300.c, gas/config/tc-moxie.c,
gas/config/tc-ns32k.c, gas/config/tc-pj.c, gas/config/tc-ppc.c,
gas/config/tc-s390.c, gas/config/tc-score.c,
gas/config/tc-score7.c, gas/config/tc-sh.c, gas/config/tc-sparc.c,
gas/config/tc-spu.c, gas/config/tc-tic30.c, gas/config/tc-vax.c,
gas/config/tc-xtensa.c, gas/config/xtensa-relax.c,
gas/dw2gencfi.c, gas/dwarf2dbg.c, gas/ehopt.c, gas/expr.c,
gas/frags.c, gas/input-file.c, gas/read.c, gas/sb.c,
gas/subsegs.c, gas/symbols.c, gas/write.c: Change the name of the
gas macro `assert' to `gas_assert'.
|
|
(implicit_it_mode): New global.
(it_instruction_type): New enum.
(arm_parse_it_mode): New function.
(arm_long_opts): New option added.
(arm_it): New field.
(it_state): New enum.
(now_it): New macro.
(check_it_blocks_finished): New function.
(insns[]): Use the IT Thumb opcodes for ARM too.
(arm_cleanup): Call check_it_blocks_finished.
(now_it_compatible): New function.
(conditional_insn): New function.
(set_it_insn_type): New macro.
(set_it_insn_type_last): New macro.
(do_it): Call automatic IT machinery functions.
(do_t_add_sub): Likewise
(do_t_arit3): Likewise.
(do_t_arit3c): Likewise.
(do_t_blx): Likewise.
(do_t_branch): Likewise.
(do_t_bkpt): Likewise.
(do_t_branch23): Likewise.
(do_t_bx): Likewise.
(do_t_bxj): Likewise.
(do_t_cps): Likewise.
(do_t_cpsi): Likewise.
(do_t_cbz): Likewise.
(do_t_it): Likewise.
(encode_thumb2_ldmstm): Likewise.
(do_t_ldst): Likewise.
(do_t_mov_cmp): Likewise.
(do_t_mvn_tst): Likewise.
(do_t_mul): Likewise.
(do_t_neg): Likewise.
(do_t_setend): Likewise.
(do_t_shift): Likewise.
(do_t_tb): Likewise.
(output_it_inst): New function.
(new_automatic_it_block): New function.
(close_automatic_it_block): New function.
(now_it_add_mask): New function.
(it_fsm_pre_encode): New function.
(handle_it_state): New function.
(it_fsm_post_encode): New function.
(force_automatic_it_block_close): New function.
(in_it_block): New function.
(md_assemble): Call automatic IT block machinery functions.
(arm_frob_label): Likewise.
(arm_opts): New element.
* config/tc-arm.h (it_state): New enum.
(current_it): New struct.
(arm_segment_info_type): New member added.
* doc/c-arm.texi: New option -mimplicit-it documented.
* gas/arm/arm-it-auto.d: New test.
* gas/arm/arm-it-auto.s: New file.
* gas/arm/arm-it-auto-2.d: New test case.
* gas/arm/arm-it-auto-2.s: New file.
* gas/arm/arm-it-auto-3.d: New test case.
* gas/arm/arm-it-auto-3.s: New file.
* gas/arm/arm-it-bad.d: New test case.
* gas/arm/arm-it-bad.l: New file.
* gas/arm/arm-it-bad.s: New file.
* gas/arm/arm-it-bad-2.d: New test case.
* gas/arm/arm-it-bad-2.l: New file.
* gas/arm/arm-it-bad-2.s: New file.
* gas/arm/arm-it-bad-3.d: New test case.
* gas/arm/arm-it-bad-3.l: New file.
* gas/arm/arm-it-bad-3.s: New file.
* gas/arm/thumb2_it_auto.d: New test.
* gas/arm/thumb2_it_bad.l: Error message updated.
* gas/arm/thumb2_it_bad_auto.d: New test.
* gas/arm/thumb2_it.d: Comment added.
* gas/arm/thumb2_it_bad.d: Comment added.
|
|
* doc/as.texinfo (Section <ELF "M,S" flag>): Clarify tail merge.
|
|
without operands if all operands are tagged as optional.
|
|
* gas/cfi/cfi-common-7.d: Adjust.
|
|
* gas/tc-arm.c (do_t_ssat): Move common code from here...
(do_t_usat): ... and here to...
(do_t_ssat_usat): New function: ... here. Add code to check that
the shift value, if present, is in range.
* gas/arm/thumb2_bad_reg.s: Add tests for SSAT and USAT with an
out of range shift.
* gas/arm/thumb2_bad_reg.l: Update expected error messages.
|
|
|
|
* arm-dis.c (print_insn_coprocessor): Check that a user specified
ARM architecture supports the matched instruction.
(print_insn_arm): Likewise.
(select_arm_features): New function. Fills in the fields of an
arm_feature_set structure based on a given arm machine number.
(print_insn): Initialise an arm_feature_set structure.
* objdump.c (disassemble_bytes): Set the
USER_SPECIFIED_MACHINE_TYPE flag in the disassemble_info structure
if the user has invoked the -m switch.
* doc/binutils.texi: Document the additional behaviour of
objdump's -m switch for ARM targets.
* dis-asm.h (USER_SPECIFIED_MACHINE_TYPE): New value for the flags
field of struct disassemble_info.
* gas/arm/align.s: Add labels so that COFF based targets can
correctly locate THUMB code.
* gas/arm/copro.d: Do not pass --architecture switch to objdump.
|
|
Merge cegcc and mingw32ce target name changes from CeGCC project,
replacing "arm-*-" by "arm*-*-" where needed.
2008-09-24 Pedro Alves <pedroalves@users.sourceforge.net>
ld/
* configure.tgt (arm*-*-cegcc*): Set LIB_PATH to
${tooldir}/lib/w32api.
2007-12-25 Pedro Alves <pedro_alves@portugalmail.pt>
bfd/
* config.bfd: Add arm*-*-cegcc* target.
2007-12-25 Pedro Alves <pedro_alves@portugalmail.pt>
binutils/
* configure.in: Add arm*-*-cegcc* and arm*-*-mingw32ce* targets.
* configure: Regenerate.
2007-12-25 Pedro Alves <pedro_alves@portugalmail.pt>
gas/
* configure.tgt: Add arm*-*-cegcc* target.
2007-12-25 Pedro Alves <pedro_alves@portugalmail.pt>
ld/
* configure.tgt: Add arm*-*-cegcc* target.
2007-12-17 Pedro Alves <pedro_alves@portugalmail.pt>
bfd/
* config.bfd: Add arm-*-mingw32ce* target.
2007-12-17 Pedro Alves <pedro_alves@portugalmail.pt>
gas/
* configure.tgt: Add arm-*-mingw32ce* target.
2007-12-17 Pedro Alves <pedro_alves@portugalmail.pt>
ld/
* configure.tgt: Add arm-*-mingw32ce* target.
|
|
* elf32-vax.c (elf_vax_check_relocs): Handle the visibility
attribute.
(elf_vax_relocate_section): Likewise.
gas/
* config/tc-vax.c (md_estimate_size_before_relax): Accept
indirect symbol references in the PIC mode and emit a
PC-relative relocation instead of a GOT/PLT one. Likewise
for symbols known to be hidden at this point.
|
|
* arm-dis.c (thumb32_opcodes): Fix binary value of SEV.W
instruction.
* gas/arm/thumb32.d: Fix expected binary value of SEV.W instruction.
* config/tc-arm.c (T16_32_TAB): Fix binary value of SEV.W
instruction.
|
|
2009-06-13 H.J. Lu <hongjiu.lu@intel.com>
PR ld/10269
* elf32-i386.c: Include "objalloc.h" and "hashtab.h".
(elf_i386_link_hash_table): Add loc_hash_table and
loc_hash_memory.
(elf_i386_local_hash): New.
(elf_i386_local_htab_hash): Likewise.
(elf_i386_local_htab_eq): Likewise.
(elf_i386_get_local_sym_hash): Likewise.
(elf_i386_link_hash_table_free): Likewise.
(elf_i386_allocate_local_dynrelocs): Likewise.
(elf_i386_finish_local_dynamic_symbol): Likewise.
(bfd_elf64_bfd_link_hash_table_free): Likewise.
(elf_i386_link_hash_table_create): Create loc_hash_table and
loc_hash_memory.
(elf_i386_check_relocs): Handle local STT_GNU_IFUNC symbols.
(elf_i386_size_dynamic_sections): Likewise.
(elf_i386_relocate_section): Likewise.
(elf_i386_finish_dynamic_sections): Likewise.
(elf_i386_finish_dynamic_symbol): Check _DYNAMIC only if sym
isn't NULL.
* elf64-x86-64.c: Include "objalloc.h" and "hashtab.h".
(elf64_x86_64_link_hash_table): Add loc_hash_table and
loc_hash_memory.
(elf64_x86_64_local_hash): New.
(elf64_x86_64_local_htab_hash): Likewise.
(elf64_x86_64_local_htab_eq): Likewise.
(elf64_x86_64_get_local_sym_hash): Likewise.
(elf64_x86_64_link_hash_table_free): Likewise.
(elf64_x86_64_allocate_local_dynrelocs): Likewise.
(elf64_x86_64_finish_local_dynamic_symbol): Likewise.
(bfd_elf64_bfd_link_hash_table_free): Likewise.
(elf64_x86_64_link_hash_table_create): Create loc_hash_table
and loc_hash_memory.
(elf64_x86_64_check_relocs): Handle local STT_GNU_IFUNC
symbols.
(elf64_x86_64_size_dynamic_sections): Likewise.
(elf64_x86_64_relocate_section): Likewise.
(elf64_x86_64_finish_dynamic_sections): Likewise.
(elf64_x86_64_finish_dynamic_symbol): Check _DYNAMIC only if
sym isn't NULL.
gas/
2009-06-13 H.J. Lu <hongjiu.lu@intel.com>
PR ld/10269
* config/tc-i386.c (md_apply_fix): Use TC_FORCE_RELOCATION
instead of generic_force_reloc.
* config/tc-i386.h (TC_FORCE_RELOCATION): New.
ld/testsuite/
2009-06-13 H.J. Lu <hongjiu.lu@intel.com>
PR ld/10269
*: ld-ifunc/ifunc-1-local-x86.d: New.
*: ld-ifunc/ifunc-1-local-x86.s: Likewise.
*: ld-ifunc/ifunc-2-local-i386.d: Likewise.
*: ld-ifunc/ifunc-2-local-i386.s: Likewise.
*: ld-ifunc/ifunc-2-local-x86-64.d: Likewise.
*: ld-ifunc/ifunc-2-local-x86-64.s: Likewise.
*: ld-ifunc/ifunc-4-local-x86.d: Likewise.
*: ld-ifunc/ifunc-4-local-x86.s: Likewise.
*: ld-ifunc/ifunc-5-local-i386.s: Likewise.
*: ld-ifunc/ifunc-5-local-x86-64.s: Likewise.
*: ld-ifunc/ifunc-5a-local-i386.d: Likewise.
*: ld-ifunc/ifunc-5a-local-x86-64.d: Likewise.
*: ld-ifunc/ifunc-5b-local-i386.d: Likewise.
*: ld-ifunc/ifunc-5b-local-x86-64.d: Likewise.
|
|
|
|
|
|
to DW_CFA_advance_loc4.
* gas/cfi/cfi-common-7.d: New test.
* gas/cfi/cfi-common-7.s: New.
* gas/cfi/cfi.exp: Add cfi-common-7 test.
|
|
* config/tc-i386.c (md_estimate_size_before_relax): Don't relax
branches to weak symbols.
(md_apply_fix): Don't convert fixes against weak symbols to
section-relative offsets, but save addend for later reloc emission.
(tc_gen_reloc): When emitting reloc against weak symbol, adjust
addend to pre-compensate for bfd_install_relocation.
|
|
|
|
* Makefile.am (DEP1, DEPTC, DEPOBJ, DEP2): LC_ALL for uniq.
* Makefile.in: Regenerate.
|
|
2009-06-01 H.J. Lu <hongjiu.lu@intel.com>
PR gas/10198
* config/tc-i386-intel.c (i386_intel_operand): Check '$' as '.'.
gas/testsuite/
2009-06-01 H.J. Lu <hongjiu.lu@intel.com>
PR gas/10198
* gas/i386/jump.s: Add test for "jmp $+2".
* gas/i386/jump16.s: Likewise.
* gas/i386/jump.d: Updated.
* gas/i386/jump16.d: Likewise.
|
|
|
|
|
|
gas/
* config/tc-mips.c (check_for_24k_errata): Remove.
(md_mips_end): Remove call to check_for_24k_errata.
(start_noreorder): Likewise.
(s_change_sec): Likewise.
(s_change_section): Likewise.
(insns_between): Add 24k errata checks.
(append_insn): Remove declaration and references to nhdx_24k.
Remove calls to check_for_24k_errata.
gas/testsuite:
* eret.s, eret.d eret.l: Remove.
* eret-1.s, eret-1.d: New.
* eret-2.s, eret-2.d: New.
* eret-3.s, eret-3.d: New.
* mips.exp: Run new tests. Remove old tests.
|
|
Update translation templates.
|
|
* config/bfin-parse.y (error): Use "%s" as format string for error
message.
|