aboutsummaryrefslogtreecommitdiff
path: root/gas
AgeCommit message (Collapse)AuthorFilesLines
2010-09-23 * gas/config/tc-arm.c (arm_ext_v6z): Remove.Matthew Gretton-Dann15-9/+92
(arm_ext_sec): New variable. (do_t_smc): In Thumb state SMC requires v7-A. (insns): Make SMC depend on Security Extensions. (arm_cpus): All -mcpu=cortex-a* options have the Security Extensions. (arm_extensions): Add 'sec' extension. (cpu_arch_ver): Reorder. (aeabi_set_public_attributes): Emit Tag_Virtualization_use as appropriate. * gas/doc/c-arm.texi: Document Security Extensions. * gas/testsuite/gas/arm/attr-march-all.d: Update for Security Extensions.. * gas/testsuite/gas/arm/attr-march-armv6k+sec.d: New test. * gas/testsuite/gas/arm/attr-march-armv6z.d: Update for Security Extensions. * gas/testsuite/gas/arm/attr-march-armv6zk.d: Likewise. * gas/testsuite/gas/arm/attr-march-armv6zkt2.d: Likewise. * gas/testsuite/gas/arm/attr-march-armv6zt2.d: Likewise. * gas/testsuite/gas/arm/attr-march-armv7-a+sec.d: New test. * gas/testsuite/gas/arm/attr-mcpu.d: Update for Security Extensions. * gas/testsuite/gas/arm/thumb32.d: Likewise. * gas/testsuite/gas/arm/thumb32.s: Likewise. * include/opcode/arm.h (ARM_EXT_V6Z): Remove. (ARM_EXT_SEC): New define. (ARM_AEXT_V6Z): Use Security Extensions. (ARM_AEXT_V6ZK): Likeiwse. (ARM_AEXT_V6ZT2): Likewise. (ARM_AEXT_V6ZKT2): Likewise. (ARM_AEXT_V7_ARM): Base v7 does not have Security Extensions. (ARM_ARCH_V7A_SEC): New define. (ARM_ARCH_V7A_MP): Rename... (ARM_ARCH_V7A_MP_SEC): ...to this and add Security Extensions. * ld/testsuite/ld-arm/attr-merge-6.attr: Update for Security Extensions. * ld/testsuite/ld-arm/attr-merge-7.attr: Likewise. * opcodes/arm-dis.c (arm_opcodes): SMC implies Security Extensions. (thumb32_opcodes): Likewise.
2010-09-23 * gas/config/tc-arm.c (arm_ext_mp): Add.Matthew Gretton-Dann12-5/+179
(do_pld): Update comment. (insns): Add support for pldw. (arm_cpus): Update cortex-a5, cortex-a9, and cortex-a15 to support MP extension. (arm_extensions): Add 'mp' extension. (aeabi_set_public_attributes): Emit correct build attribute when MP extension is enabled. * gas/doc/c-arm.texi: Update for MP extensions. * gas/testsuite/gas/arm/arch7a-mp.d: Add. * gas/testsuite/gas/arm/arch7ar-mp.s: Likewise. * gas/testsuite/gas/arm/arch7r-mp.d: Likewise. * gas/testsuite/gas/arm/armv2-mp-bad.d: Likewise. * gas/testsuite/gas/arm/armv2-mp-bad.l: Likewise. * gas/testsuite/gas/arm/attr-march-all.d: Update for MP extension. * gas/testsuite/gas/arm/attr-march-armv7-a+mp.d: Add. * gas/testsuite/gas/arm/attr-march-armv7-r+mp.d: Likewise. * include/opcode/arm.h (ARM_EXT_MP): Add. (ARM_ARCH_V7A_MP): Likewise. * opcodes/arm-dis.c (arm_opcodes): Add support for pldw. (thumb32_opcodes): Likewise.
2010-09-23 * gas/config/tc-arm.c (md_pseduo_table): Add .arch_extension directive.Matthew Gretton-Dann3-23/+199
(arm_option_extension_value_table): Add. (arm_extensions): Change type. (arm_option_cpu_table): Rename... (arm_option_fpu_table): ...to this. (arm_fpus): Change type. (arm_parse_extension): Enforce alphabetical order. Allow extensions to be removed. (arm_parse_arch): Allow extensions to be specified with -march. (s_arm_arch_extension): Add. (s_arm_fpu): Update for type changes. * gas/doc/c-arm.texi: Document changes to infrastructure.
2010-09-23 * gas/all/gas.exp: Update "forward" and "redef3" xfails.Alan Modra4-7/+15
* gas/m68k/all.exp: Don't xfail pcrel on uclinux. * gas/sh/arch/arch.exp: Don't pass dashes to send_log.
2010-09-23 * config/tc-mn10300.c (tc_gen_reloc): Replace absolute symbolsAlan Modra2-8/+14
with the absolute section symbol.
2010-09-23 * gas/mips/jal.d: Remove duplicate pattern.Maciej W. Rozycki2-1/+5
2010-09-22gas: blackfin: fix typo in BYTEOP16P commentMike Frysinger2-1/+5
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-09-22gas: blackfin: reject multiple store insns in parallel insnsMike Frysinger2-0/+38
Check for & reject attempts to use multiple store insns in a single parallel insn combination. These are illegal per the Blackfin ISA. Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-09-22gas: blackfin: add missing register move insnsMike Frysinger3-2/+10
The Blackfin ISA supports moving just about anything to/from EMUDAT, so make sure the assembler accepts these insns too. Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-09-22gas: blackfin: clarify some errors with register usage in insnsMike Frysinger4-4/+12
Using "Register mismatch" everywhere can be a bit vague, so clarify why exactly we're barfing on these unsupported insns. Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-09-22gas: blackfin: fix DBG/DBGCMPLX insn encodingMike Frysinger6-2/+188
Some extended registers when given to the DBG/DBGCMPLX pseudo insns are not encoded properly. So fix them, fix the display of them when being disassembled, and add testcases. Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-09-22gas: blackfin: handle multibyte symbolsMike Frysinger2-1/+5
Accept any 8bit char with the high bit set so as to support multibyte characters. Also use the locale safe regular expressions to match chars/digits. This brings the Blackfin assembler inline with the behavior of other assemblers. Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-09-22opcodes/gas: blackfin: handle more ASTAT flagsMike Frysinger3-1/+12
Support a few more ASTAT bits with the standard insns that operate on ASTAT bits directly. Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-09-22opcodes/gas: blackfin: support OUTC debug insnMike Frysinger4-0/+33
The disassembler has partial (but incomplete/broken) support already for the pseudo debug insn OUTC, so let's fix it up and finish it. And now that the disassembler can handle it, make sure our assembler can output it too. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-09-22opcodes: blackfin: fix decoding of LSHIFT insnsMike Frysinger6-12/+17
The Blackfin ISA does not have a "SHIFT" insn, it has either LSHIFT, ASHIFT, or BXORSHIFT. So be specific when disassembling. As fall out of this change, we need to update some assembler tests. Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-09-22gas: blackfin: support ABORT debug insnMike Frysinger3-1/+12
There is a pseudo debug insn named ABORT that is commonly used in simulation, so support it in the assembler too. The disassembler already supports it. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-09-22gas: blackfin: add support for BF51x-0.2 processorsMike Frysinger2-0/+8
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-09-22gas: blackfin: add support for BF592 processorsMike Frysinger3-3/+14
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-09-22gas: blackfin: allow end-of-line comments via #Mike Frysinger2-2/+6
We don't use the # character in the Blackfin assembly language, so let it start end-of-line comments like most other assemblers. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-09-20 * gas/config/tc-arm.c (arm_cpus): Correct canonical names for Cortex CPUs.Matthew Gretton-Dann5-13/+24
* gas/testsuite/gas/arm/attr-cpu-directive.d: Update test for change in canonical CPU name. * gas/testsuite/gas/arm/attr-mcpu.d: Likewise. * ld/testsuite/ld-arm/attr-merge-6.attr: Update tests for change in canonical CPU name. * ld/testsuite/ld-arm/attr-merge-7.attr: Likewise. * ld/testsuite/ld-arm/attr-merge-2.attr: Likewise. * ld/testsuite/ld-arm/attr-merge-arch-2.attr: Likewise.
2010-09-20Use bfd_elf_generic_reloc for alpha-elf.Richard Henderson2-16/+9
2010-09-20 * gas/elf/elf.exp: Disable symtab test for alpha.Richard Henderson2-1/+8
2010-09-172010-09-17 Tejas Belagod <tejas.belagod@arm.com>Matthew Gretton-Dann5-21/+83
* config/tc-arm.c (do_t_ldmstm): Add logic to handle single-register list for ldm/stm. 2010-09-17 Tejas Belagod <tejas.belagod@arm.com> * gas/arm/thumb2_ldmstm.d: Change single-register stmia to use 16-bit str encoding instead of str.w. Likewise for ldmia. * gas/arm/thumb2_ldmstm.s: Change stmia comment. Add tests for T1 ldmia-to-ldr.
2010-09-172010-09-17 Tejas Belagod <tejas.belagod@arm.com>Matthew Gretton-Dann14-1/+1038
* config/tc-arm.c (parse_psr): Add condition for matching "APSR" on non-M-arch cpus. (psrs): Add entry for PSR flags, g, nzcvq, nzcvqg. 2010-09-17 Tejas Belagod <tejas.belagod@arm.com> * gas/arm/msr-reg.s: New file. * gas/arm/msr-reg.d: Likewise. * gas/arm/msr-imm.s: Likewise. * gas/arm/msr-imm.d: Likewise. * gas/arm/msr-imm-bad.d: Likewise. * gas/arm/msr-imm-bad.l: Likewise. * gas/arm/msr-reg-bad.d: Likewise. * gas/arm/msr-imm-bad.d: Likewise. * gas/arm/msr-reg-thumb.d: Likewise. * gas/arm/arch7.s: Add tests for xpsr. * gas/arm/arch7.d: Likewise.
2010-09-172010-09-17 Tejas Belagod <tejas.belagod@arm.com>Matthew Gretton-Dann5-2/+17
* config/tc-arm.c (insns): Change MRC entry to accept APSR_RR instead of just RR. 2010-09-17 Tejas Belagod <tejas.belagod@arm.com> * gas/arm/copro.s: Add test for APSR_nzcv as a MRC operand. * gas/arm/copro.d: Change pc in MRC to disassemble as APSR_nzcv. Also add disassembly for test added in copro.s 2010-09-17 Tejas Belagod <tejas.belagod@arm.com> * arm_dis.c (coprocessor_opcodes): Add MRC entry for APSR_nzcv.
2010-09-16 PR gas/12011Alan Modra11-7/+30
* config/obj-elf.c (obj_elf_parse_section_letters): Correct test for error return from md_elf_section_letter. * config/tc-alpha.c (alpha_elf_section_letter): Correct error message. * config/tc-i386.c (x86_64_section_letter): Likewise. * config/tc-ia64.c (ia64_elf_section_letter): Likewise. * config/tc-mep.c (mep_elf_section_letter): Likewise. * gas/elf/bad-section-flag.d, * gas/elf/bad-section-flag.err, * gas/elf/bad-section-flag.s: New test. * gas/elf/elf.exp: Run it.
2010-09-16 * gas/all/redef3.d: Don't run on arc.Alan Modra3-6/+11
* gas/i386/i386.exp: Don't run intel-got32 on linuxaout. Move x86_64 mingw exclusions to equivalent elf only block of tests.
2010-09-15ChangeLog gasKai Tietz6-16/+113
2010-09-15 Kai Tietz <kai.tietz@onevision.com> * config/obj-coff-seh.c (seh_validate_seg): New funtion. (obj_coff_seh_endproc): Add check for segment. (obj_coff_seh_endprologue): Likewise. (obj_coff_seh_pushreg): Likewise. (obj_coff_seh_pushframe): Likewise. (obj_coff_seh_save): Likewise. (obj_coff_seh_setframe): Likewise. ChangeLog gas/testsuite 2010-09-15 Kai Tietz <kai.tietz@onevision.com> * gas/pe/pe.exp: Add new test. * gas/pe/seh-x64-err-1.l: New. * gas/pe/seh-x64-err-1.s: New.
2010-09-15ChangeLog gasKai Tietz9-26/+754
2010-09-15 Kai Tietz <kai.tietz@onevision.com> * config/obj-coff-seh.h (seh_context): New member code_seg. * config/obj-coff-seh.c: Implementing xdata/pdata section cloning for link-once code-segment. ChangeLog ld 2010-09-15 Kai Tietz <kai.tietz@onevision.com> * scripttempl/pep.sc: Add .xdata segment and put into .pdata all segments beginning with .pdata. ChangeLog gas/testsuite 2010-09-15 Kai Tietz <kai.tietz@onevision.com> * gas/pe/pe.exp: Add peseh-x64-4,5,6 tests. * gas/pe/peseh-x64-4.s: New. * gas/pe/peseh-x64-4.d: New. * gas/pe/peseh-x64-5.d: New. * gas/pe/peseh-x64-6.d: New.
2010-09-14 opcodes/Maciej W. Rozycki5-0/+94
* mips-opc.c (mips_builtin_opcodes): Add "sync_acquire", "sync_mb", "sync_release", "sync_rmb" and "sync_wmb". gas/testsuite/ * gas/mips/mips32r2-sync.d: New test for MIPS32r2 "sync" instruction variants. * gas/mips/octeon@mips32r2-sync.d: Likewise, Octeon version. * gas/mips/mips32r2-sync.s: Source for the new test. * gas/mips/mips.exp: Run the new test.
2010-09-14 * doc/c-arm.texi: Document -mcpu=cortex-m4.Jie Zhang2-0/+5
2010-09-132010-09-13 Kai Tietz <kai.tietz@onevision.com>Kai Tietz8-0/+114
* gas/pe/pe.exp: Add x64 SEH tests. * gas/pe/peseh-x64.s: New. * gas/pe/peseh-x64.d: New. * gas/pe/peseh-x64-2.s: New. * gas/pe/peseh-x64-2.d: New. * gas/pe/peseh-x64-3.s: New. * gas/pe/peseh-x64-3.d: New.
2010-09-09Check VEXW1 for 2-byte VEX prefix.H.J. Lu2-0/+6
2010-09-09 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (build_vex_prefix): Check VEXW1 for 2-byte VEX prefix.
2010-09-09 * doc/c-tic6x.texi (.c6xabi_attribute): Document directive.Joseph Myers2-0/+13
2010-09-09 * gas/config/tc-arm.c (arm_cpus): Add cortex-a15 entry.Matthew Gretton-Dann3-0/+8
* gas/doc/c-arm.texi: Document -mcpu=cortex-a15.
2010-09-09 * gas/config/tc-m68k.c (tc_gen_reloc): Handle references to definedNick Clifton2-6/+11
weak symbols first if generating an a.out object.
2010-09-09Fix PR number in previous delta.Nick Clifton4-4/+4
2010-09-09 PR gas/11931Nick Clifton4-0/+38
* gas/mn10300/pr11931.s: New file: Test case. * gas/mn10300/pr11931.d: New file: Expected output. * gas/mn10300/basic.exp: Run the new test.
2010-09-09 * config/tc-arm.c (md_apply_fix): Check if widened add, sub areNick Clifton6-9/+35
flag-setting and handle accordingly. * gas/arm/addsw-bad.s: New file. * gas/arm/addsw-bad.l: New file. * gas/arm/addsw-bad.d: New file.
2010-09-09 PR gas/11972Nick Clifton2-2/+26
* config/tc-arm.c (parse_big_immediate): Allow for bignums being extended to the size of a .octa.
2010-09-08 * config/tc-arm.c (create_neon_reg_alias): Deal with caseNathan Sidwell2-0/+14
sensitivity.
2010-09-08 PR gas/11973Nick Clifton2-0/+8
* config/tc-mn10300.c (md_convert_frag): Zero out top two bytes of long call instruction's displacement.
2010-09-03Check flag_code instead of use_rela_relocations for 64bit.H.J. Lu5-2/+19
gas/ 2010-09-03 H.J. Lu <hongjiu.lu@intel.com> PR gas/11974 * config/tc-i386.c (i386_finalize_immediate): Check flag_code instead of use_rela_relocations for 64bit. gas/testsuite/ 2010-09-03 H.J. Lu <hongjiu.lu@intel.com> PR gas/11974 * gas/i386/immed64.s: Add more movabs tests. * gas/i386/immed64.d: Updated.
2010-09-03binutils/Jan Kratochvil4-4/+10
* dwarf.c (regname): New declaration. (decode_location_expression): Print for registers also regname output. binutils/testsuite/ * binutils-all/objdump.W: Update DW_OP_reg5 expected output. gas/testsuite/ * gas/elf/dwarf2-1.d: Update DW_OP_reg5 expected output. * gas/elf/dwarf2-2.d: Likewise. * gas/i386/dw2-compress-1.d: Likewise.
2010-09-03 * gas/cfi/cfi-i386.d: Use objdump -Wf instead of readelf.Richard Henderson4-10/+11
* gas/cfi/cfi-i386.s: Remove .type directives. * gas/cfi/reloc-pe-i386.d: Adjust test for i386.
2010-09-02 * gas/cfi/reloc-pe-i386.d, gas/cfi/reloc-pe-i386.s: New test.Richard Henderson2-0/+15
2010-09-02 * dw2gencfi.c (TC_DWARF2_EMIT_OFFSET): Provide default.Richard Henderson12-27/+68
(output_fde): Use it. Make sure to fully init exp before using it. testsuite/ * gas/cfi/cfi-common-1.d: Use objdump instead of readelf to dump. * gas/cfi/cfi-common-2.d, gas/cfi/cfi-common-3.d, gas/cfi/cfi-common-4.d, gas/cfi/cfi-common-6.d, gas/cfi/cfi-common-7.d, gas/cfi/cfi-x86_64.d: Likewise. * gas/cfi/cfi-x86_64.s: Remove .type directives. * gas/cfi/cfi.exp: Run for pecoff objects too. * gas/cfi/reloc-pe-i386.d, gas/cfi/reloc-pe-i386.s: New test.
2010-08-31Fix "pushw imm16" for x86-64 disassembler.H.J. Lu4-50/+35
gas/testsuite/ 2010-08-31 H.J. Lu <hongjiu.lu@intel.com> PR binutils/11960 * gas/i386/opcode-intel.d: Updated. * gas/i386/x86-64-opcode.d: Likewise. * gas/i386/x86-64-opcode.s: Add a "pushw imm16" test. opcodes/ 2010-08-31 H.J. Lu <hongjiu.lu@intel.com> PR binutils/11960 * i386-dis.c (sIv): New. (dis386): Replace Iq with sIv on "pushT". (reg_table): Replace T with {T|} on callT, JcallT, jmpT and JjmpT. (x86_64_table): Replace {T|}/{P|} with P. (putop): Add 'w' to 'T'/'P' if needed for Intel syntax. (OP_sI): Update v_mode. Remove w_mode.
2010-08-312010-08-31 Kai Tietz <kai.tietz@onevision.com>Kai Tietz2-4/+9
* config/obj-coff-seh.c (obj_coff_seh_save): Correct comparison. (obj_coff_seh_stackalloc): Likewise.
2010-08-31 * config/obj-elf.c (obj_elf_init_stab_section): Fix assertion.Alan Modra2-2/+6
generated by cgit v1.1 at 2025-01-26 08:35:17 +0000